62 				struct amdgpu_ib *ib,  in si_dma_ring_emit_ib()  argument
71 	amdgpu_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0));  in si_dma_ring_emit_ib()
72 	amdgpu_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF));  in si_dma_ring_emit_ib()
276 	struct amdgpu_ib ib;  in si_dma_ring_test_ib()  local
292 	memset(&ib, 0, sizeof(ib));  in si_dma_ring_test_ib()
293 	r = amdgpu_ib_get(adev, NULL, 256, &ib);  in si_dma_ring_test_ib()
299 	ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, 1);  in si_dma_ring_test_ib()
300 	ib.ptr[1] = lower_32_bits(gpu_addr);  in si_dma_ring_test_ib()
301 	ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff;  in si_dma_ring_test_ib()
302 	ib.ptr[3] = 0xDEADBEEF;  in si_dma_ring_test_ib()
303 	ib.length_dw = 4;  in si_dma_ring_test_ib()
304 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, NULL, &f);  in si_dma_ring_test_ib()
327 	amdgpu_ib_free(adev, &ib, NULL);  in si_dma_ring_test_ib()
344 static void si_dma_vm_copy_pte(struct amdgpu_ib *ib,  in si_dma_vm_copy_pte()  argument
350 	ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY,  in si_dma_vm_copy_pte()
352 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in si_dma_vm_copy_pte()
353 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in si_dma_vm_copy_pte()
354 	ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;  in si_dma_vm_copy_pte()
355 	ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff;  in si_dma_vm_copy_pte()
369 static void si_dma_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in si_dma_vm_write_pte()  argument
375 	ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw);  in si_dma_vm_write_pte()
376 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in si_dma_vm_write_pte()
377 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in si_dma_vm_write_pte()
379 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in si_dma_vm_write_pte()
380 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in si_dma_vm_write_pte()
397 static void si_dma_vm_set_pte_pde(struct amdgpu_ib *ib,  in si_dma_vm_set_pte_pde()  argument
416 		ib->ptr[ib->length_dw++] = DMA_PTE_PDE_PACKET(ndw);  in si_dma_vm_set_pte_pde()
417 		ib->ptr[ib->length_dw++] = pe; /* dst addr */  in si_dma_vm_set_pte_pde()
418 		ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;  in si_dma_vm_set_pte_pde()
419 		ib->ptr[ib->length_dw++] = flags; /* mask */  in si_dma_vm_set_pte_pde()
420 		ib->ptr[ib->length_dw++] = 0;  in si_dma_vm_set_pte_pde()
421 		ib->ptr[ib->length_dw++] = value; /* value */  in si_dma_vm_set_pte_pde()
422 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in si_dma_vm_set_pte_pde()
423 		ib->ptr[ib->length_dw++] = incr; /* increment size */  in si_dma_vm_set_pte_pde()
424 		ib->ptr[ib->length_dw++] = 0;  in si_dma_vm_set_pte_pde()
437 static void si_dma_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in si_dma_ring_pad_ib()  argument
439 	while (ib->length_dw & 0x7)  in si_dma_ring_pad_ib()
440 		ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0);  in si_dma_ring_pad_ib()
843 static void si_dma_emit_copy_buffer(struct amdgpu_ib *ib,  in si_dma_emit_copy_buffer()  argument
848 	ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY,  in si_dma_emit_copy_buffer()
850 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in si_dma_emit_copy_buffer()
851 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in si_dma_emit_copy_buffer()
852 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset) & 0xff;  in si_dma_emit_copy_buffer()
853 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset) & 0xff;  in si_dma_emit_copy_buffer()
866 static void si_dma_emit_fill_buffer(struct amdgpu_ib *ib,  in si_dma_emit_fill_buffer()  argument
871 	ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_CONSTANT_FILL,  in si_dma_emit_fill_buffer()
873 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in si_dma_emit_fill_buffer()
874 	ib->ptr[ib->length_dw++] = src_data;  in si_dma_emit_fill_buffer()
875 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset) << 16;  in si_dma_emit_fill_buffer()