Lines Matching refs:smumgr
61 static int fiji_start_smu_in_protection_mode(struct pp_smumgr *smumgr) in fiji_start_smu_in_protection_mode() argument
69 SMUM_WRITE_VFPF_INDIRECT_FIELD(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
72 result = smu7_upload_smu_firmware_image(smumgr); in fiji_start_smu_in_protection_mode()
77 cgs_write_ind_register(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
80 SMUM_WRITE_VFPF_INDIRECT_FIELD(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
84 SMUM_WRITE_VFPF_INDIRECT_FIELD(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
92 SMUM_WRITE_VFPF_INDIRECT_FIELD(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
96 cgs_write_ind_register(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
99 SMUM_WAIT_VFPF_INDIRECT_FIELD(smumgr, SMC_IND, RCU_UC_EVENTS, in fiji_start_smu_in_protection_mode()
102 cgs_write_register(smumgr->device, mmSMC_MSG_ARG_0, 0x20000); in fiji_start_smu_in_protection_mode()
103 cgs_write_register(smumgr->device, mmSMC_MESSAGE_0, PPSMC_MSG_Test); in fiji_start_smu_in_protection_mode()
104 SMUM_WAIT_FIELD_UNEQUAL(smumgr, SMC_RESP_0, SMC_RESP, 0); in fiji_start_smu_in_protection_mode()
107 SMUM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(smumgr, SMC_IND, in fiji_start_smu_in_protection_mode()
111 if (SMUM_READ_VFPF_INDIRECT_FIELD(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
118 SMUM_WAIT_VFPF_INDIRECT_FIELD(smumgr, SMC_IND, in fiji_start_smu_in_protection_mode()
124 static int fiji_start_smu_in_non_protection_mode(struct pp_smumgr *smumgr) in fiji_start_smu_in_non_protection_mode() argument
129 SMUM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(smumgr, SMC_IND, in fiji_start_smu_in_non_protection_mode()
133 cgs_write_ind_register(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_non_protection_mode()
137 SMUM_WRITE_VFPF_INDIRECT_FIELD(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_non_protection_mode()
140 result = smu7_upload_smu_firmware_image(smumgr); in fiji_start_smu_in_non_protection_mode()
145 smu7_program_jump_on_start(smumgr); in fiji_start_smu_in_non_protection_mode()
148 SMUM_WRITE_VFPF_INDIRECT_FIELD(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_non_protection_mode()
152 SMUM_WRITE_VFPF_INDIRECT_FIELD(smumgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_non_protection_mode()
156 SMUM_WAIT_VFPF_INDIRECT_FIELD(smumgr, SMC_IND, in fiji_start_smu_in_non_protection_mode()
162 int fiji_setup_pwr_virus(struct pp_smumgr *smumgr) in fiji_setup_pwr_virus() argument
167 struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); in fiji_setup_pwr_virus()
175 cgs_write_register(smumgr->device, reg, data); in fiji_setup_pwr_virus()
192 static int fiji_start_avfs_btc(struct pp_smumgr *smumgr) in fiji_start_avfs_btc() argument
195 struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); in fiji_start_avfs_btc()
199 if (!smum_send_msg_to_smc_with_parameter(smumgr, in fiji_start_avfs_btc()
201 if (!smum_send_msg_to_smc(smumgr, PPSMC_MSG_EnableAvfs)) { in fiji_start_avfs_btc()
207 smum_send_msg_to_smc(smumgr, PPSMC_MSG_DisableAvfs); in fiji_start_avfs_btc()
218 cgs_write_register(smumgr->device, mmCP_MEC_CNTL, 0x50000000); in fiji_start_avfs_btc()
220 cgs_write_register(smumgr->device, mmGRBM_SOFT_RESET, 0xffffffff); in fiji_start_avfs_btc()
222 cgs_write_register(smumgr->device, mmGRBM_SOFT_RESET, 0); in fiji_start_avfs_btc()
227 int fiji_setup_pm_fuse_for_avfs(struct pp_smumgr *smumgr) in fiji_setup_pm_fuse_for_avfs() argument
237 PP_ASSERT_WITH_CODE(0 == smu7_read_smc_sram_dword(smumgr, in fiji_setup_pm_fuse_for_avfs()
249 result = smu7_copy_bytes_to_smc(smumgr, charz_freq_addr, in fiji_setup_pm_fuse_for_avfs()
255 result = smu7_copy_bytes_to_smc(smumgr, inversion_voltage_addr, in fiji_setup_pm_fuse_for_avfs()
263 int fiji_setup_graphics_level_structure(struct pp_smumgr *smumgr) in fiji_setup_graphics_level_structure() argument
270 PP_ASSERT_WITH_CODE(0 == smu7_read_smc_sram_dword(smumgr, in fiji_setup_graphics_level_structure()
285 PP_ASSERT_WITH_CODE(0 == smu7_copy_bytes_to_smc(smumgr, vr_config_addr, in fiji_setup_graphics_level_structure()
293 PP_ASSERT_WITH_CODE(0 == smu7_copy_bytes_to_smc(smumgr, level_addr, in fiji_setup_graphics_level_structure()
302 int fiji_restore_vft_table(struct pp_smumgr *smumgr) in fiji_restore_vft_table() argument
304 struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); in fiji_restore_vft_table()
314 int fiji_save_vft_table(struct pp_smumgr *smumgr) in fiji_save_vft_table() argument
316 struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); in fiji_save_vft_table()
325 int fiji_avfs_event_mgr(struct pp_smumgr *smumgr, bool smu_started) in fiji_avfs_event_mgr() argument
327 struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); in fiji_avfs_event_mgr()
332 PP_ASSERT_WITH_CODE(0 == fiji_restore_vft_table(smumgr), in fiji_avfs_event_mgr()
340 PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(smumgr, in fiji_avfs_event_mgr()
346 PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(smumgr, in fiji_avfs_event_mgr()
357 PP_ASSERT_WITH_CODE(0 == fiji_setup_pm_fuse_for_avfs(smumgr), in fiji_avfs_event_mgr()
362 PP_ASSERT_WITH_CODE(0 == fiji_setup_graphics_level_structure(smumgr), in fiji_avfs_event_mgr()
367 PP_ASSERT_WITH_CODE(0 == fiji_setup_pwr_virus(smumgr), in fiji_avfs_event_mgr()
372 PP_ASSERT_WITH_CODE(0 == fiji_start_avfs_btc(smumgr), in fiji_avfs_event_mgr()
377 PP_ASSERT_WITH_CODE(0 == fiji_save_vft_table(smumgr), in fiji_avfs_event_mgr()
393 static int fiji_start_smu(struct pp_smumgr *smumgr) in fiji_start_smu() argument
396 struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); in fiji_start_smu()
399 if (!smu7_is_smc_ram_running(smumgr)) { in fiji_start_smu()
400 fiji_avfs_event_mgr(smumgr, false); in fiji_start_smu()
403 if (0 == SMUM_READ_VFPF_INDIRECT_FIELD(smumgr->device, in fiji_start_smu()
406 result = fiji_start_smu_in_non_protection_mode(smumgr); in fiji_start_smu()
410 result = fiji_start_smu_in_protection_mode(smumgr); in fiji_start_smu()
414 fiji_avfs_event_mgr(smumgr, true); in fiji_start_smu()
418 cgs_set_clockgating_state(smumgr->device, in fiji_start_smu()
420 cgs_set_clockgating_state(smumgr->device, in fiji_start_smu()
422 cgs_set_clockgating_state(smumgr->device, in fiji_start_smu()
424 cgs_set_clockgating_state(smumgr->device, in fiji_start_smu()
430 smu7_read_smc_sram_dword(smumgr, in fiji_start_smu()
435 result = smu7_request_smu_load_fw(smumgr); in fiji_start_smu()
440 static bool fiji_is_hw_avfs_present(struct pp_smumgr *smumgr) in fiji_is_hw_avfs_present() argument
446 if (!atomctrl_read_efuse(smumgr->device, AVFS_EN_LSB, AVFS_EN_MSB, in fiji_is_hw_avfs_present()
461 static int fiji_smu_init(struct pp_smumgr *smumgr) in fiji_smu_init() argument
463 struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); in fiji_smu_init()
466 if (smu7_init(smumgr)) in fiji_smu_init()
470 if (fiji_is_hw_avfs_present(smumgr)) in fiji_smu_init()
513 int fiji_smum_init(struct pp_smumgr *smumgr) in fiji_smum_init() argument
522 smumgr->backend = fiji_smu; in fiji_smum_init()
523 smumgr->smumgr_funcs = &fiji_smu_funcs; in fiji_smum_init()