675 static int gsc_src_set_buf_seq(struct gsc_context *ctx, u32 buf_id,  in gsc_src_set_buf_seq()  argument
681 	u32 mask = 0x00000001 << buf_id;  in gsc_src_set_buf_seq()
683 	DRM_DEBUG_KMS("buf_id[%d]buf_type[%d]\n", buf_id, buf_type);  in gsc_src_set_buf_seq()
702 	cfg |= masked << buf_id;  in gsc_src_set_buf_seq()
711 		struct drm_exynos_ipp_buf_info *buf_info, u32 buf_id,  in gsc_src_set_addr()  argument
727 		property->prop_id, buf_id, buf_type);  in gsc_src_set_addr()
729 	if (buf_id > GSC_MAX_SRC) {  in gsc_src_set_addr()
730 		dev_info(ippdrv->dev, "invalid buf_id %d.\n", buf_id);  in gsc_src_set_addr()
738 			GSC_IN_BASE_ADDR_Y(buf_id));  in gsc_src_set_addr()
740 			GSC_IN_BASE_ADDR_CB(buf_id));  in gsc_src_set_addr()
742 			GSC_IN_BASE_ADDR_CR(buf_id));  in gsc_src_set_addr()
745 		gsc_write(0x0, GSC_IN_BASE_ADDR_Y(buf_id));  in gsc_src_set_addr()
746 		gsc_write(0x0, GSC_IN_BASE_ADDR_CB(buf_id));  in gsc_src_set_addr()
747 		gsc_write(0x0, GSC_IN_BASE_ADDR_CR(buf_id));  in gsc_src_set_addr()
754 	return gsc_src_set_buf_seq(ctx, buf_id, buf_type);  in gsc_src_set_addr()
1114 static int gsc_dst_set_buf_seq(struct gsc_context *ctx, u32 buf_id,  in gsc_dst_set_buf_seq()  argument
1120 	u32 mask = 0x00000001 << buf_id;  in gsc_dst_set_buf_seq()
1123 	DRM_DEBUG_KMS("buf_id[%d]buf_type[%d]\n", buf_id, buf_type);  in gsc_dst_set_buf_seq()
1145 	cfg |= masked << buf_id;  in gsc_dst_set_buf_seq()
1166 		struct drm_exynos_ipp_buf_info *buf_info, u32 buf_id,  in gsc_dst_set_addr()  argument
1182 		property->prop_id, buf_id, buf_type);  in gsc_dst_set_addr()
1184 	if (buf_id > GSC_MAX_DST) {  in gsc_dst_set_addr()
1185 		dev_info(ippdrv->dev, "invalid buf_id %d.\n", buf_id);  in gsc_dst_set_addr()
1193 			GSC_OUT_BASE_ADDR_Y(buf_id));  in gsc_dst_set_addr()
1195 			GSC_OUT_BASE_ADDR_CB(buf_id));  in gsc_dst_set_addr()
1197 			GSC_OUT_BASE_ADDR_CR(buf_id));  in gsc_dst_set_addr()
1200 		gsc_write(0x0, GSC_OUT_BASE_ADDR_Y(buf_id));  in gsc_dst_set_addr()
1201 		gsc_write(0x0, GSC_OUT_BASE_ADDR_CB(buf_id));  in gsc_dst_set_addr()
1202 		gsc_write(0x0, GSC_OUT_BASE_ADDR_CR(buf_id));  in gsc_dst_set_addr()
1209 	return gsc_dst_set_buf_seq(ctx, buf_id, buf_type);  in gsc_dst_set_addr()
1237 	u32 buf_id = GSC_MAX_SRC;  in gsc_get_src_buf_index()  local
1247 			buf_id = i;  in gsc_get_src_buf_index()
1252 	if (buf_id == GSC_MAX_SRC) {  in gsc_get_src_buf_index()
1257 	ret = gsc_src_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE);  in gsc_get_src_buf_index()
1264 		curr_index, buf_id);  in gsc_get_src_buf_index()
1266 	return buf_id;  in gsc_get_src_buf_index()
1272 	u32 buf_id = GSC_MAX_DST;  in gsc_get_dst_buf_index()  local
1282 			buf_id = i;  in gsc_get_dst_buf_index()
1287 	if (buf_id == GSC_MAX_DST) {  in gsc_get_dst_buf_index()
1292 	ret = gsc_dst_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE);  in gsc_get_dst_buf_index()
1299 		curr_index, buf_id);  in gsc_get_dst_buf_index()
1301 	return buf_id;  in gsc_get_dst_buf_index()
1312 	int buf_id[EXYNOS_DRM_OPS_MAX];  in gsc_irq_handler()  local
1327 		buf_id[EXYNOS_DRM_OPS_SRC] = gsc_get_src_buf_index(ctx);  in gsc_irq_handler()
1328 		if (buf_id[EXYNOS_DRM_OPS_SRC] < 0)  in gsc_irq_handler()
1331 		buf_id[EXYNOS_DRM_OPS_DST] = gsc_get_dst_buf_index(ctx);  in gsc_irq_handler()
1332 		if (buf_id[EXYNOS_DRM_OPS_DST] < 0)  in gsc_irq_handler()
1336 			buf_id[EXYNOS_DRM_OPS_SRC], buf_id[EXYNOS_DRM_OPS_DST]);  in gsc_irq_handler()
1339 		event_work->buf_id[EXYNOS_DRM_OPS_SRC] =  in gsc_irq_handler()
1340 			buf_id[EXYNOS_DRM_OPS_SRC];  in gsc_irq_handler()
1341 		event_work->buf_id[EXYNOS_DRM_OPS_DST] =  in gsc_irq_handler()
1342 			buf_id[EXYNOS_DRM_OPS_DST];  in gsc_irq_handler()