524 static inline uint32_t __offset_PIPE(enum mdp5_pipe idx)  in __offset_PIPE()  function
540 static inline uint32_t REG_MDP5_PIPE(enum mdp5_pipe i0) { return 0x00000000 + __offset_PIPE(i0); }  in REG_MDP5_PIPE()
542 static inline uint32_t REG_MDP5_PIPE_OP_MODE(enum mdp5_pipe i0) { return 0x00000200 + __offset_PIPE…  in REG_MDP5_PIPE_OP_MODE()
557 … uint32_t REG_MDP5_PIPE_HIST_CTL_BASE(enum mdp5_pipe i0) { return 0x000002c4 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_HIST_CTL_BASE()
559 … uint32_t REG_MDP5_PIPE_HIST_LUT_BASE(enum mdp5_pipe i0) { return 0x000002f0 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_HIST_LUT_BASE()
561 … uint32_t REG_MDP5_PIPE_HIST_LUT_SWAP(enum mdp5_pipe i0) { return 0x00000300 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_HIST_LUT_SWAP()
563 …_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0(enum mdp5_pipe i0) { return 0x00000320 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0()
577 …_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1(enum mdp5_pipe i0) { return 0x00000324 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1()
591 …_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_2(enum mdp5_pipe i0) { return 0x00000328 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_2()
605 …_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_3(enum mdp5_pipe i0) { return 0x0000032c + __offset_PIPE(i0); }  in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_3()
619 …_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_4(enum mdp5_pipe i0) { return 0x00000330 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_4()
627 …CSC_1_PRE_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x00000334 + __offset_PIPE(i0) + 0x4*i1; }  in REG_MDP5_PIPE_CSC_1_PRE_CLAMP()
629 …1_PRE_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000334 + __offset_PIPE(i0) + 0x4*i1; }  in REG_MDP5_PIPE_CSC_1_PRE_CLAMP_REG()
643 …SC_1_POST_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x00000340 + __offset_PIPE(i0) + 0x4*i1; }  in REG_MDP5_PIPE_CSC_1_POST_CLAMP()
645 …_POST_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000340 + __offset_PIPE(i0) + 0x4*i1; }  in REG_MDP5_PIPE_CSC_1_POST_CLAMP_REG()
659 …_CSC_1_PRE_BIAS(enum mdp5_pipe i0, uint32_t i1) { return 0x0000034c + __offset_PIPE(i0) + 0x4*i1; }  in REG_MDP5_PIPE_CSC_1_PRE_BIAS()
661 …_1_PRE_BIAS_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x0000034c + __offset_PIPE(i0) + 0x4*i1; }  in REG_MDP5_PIPE_CSC_1_PRE_BIAS_REG()
669 …CSC_1_POST_BIAS(enum mdp5_pipe i0, uint32_t i1) { return 0x00000358 + __offset_PIPE(i0) + 0x4*i1; }  in REG_MDP5_PIPE_CSC_1_POST_BIAS()
671 …1_POST_BIAS_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000358 + __offset_PIPE(i0) + 0x4*i1; }  in REG_MDP5_PIPE_CSC_1_POST_BIAS_REG()
679 …nline uint32_t REG_MDP5_PIPE_SRC_SIZE(enum mdp5_pipe i0) { return 0x00000000 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC_SIZE()
693 …e uint32_t REG_MDP5_PIPE_SRC_IMG_SIZE(enum mdp5_pipe i0) { return 0x00000004 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC_IMG_SIZE()
707 static inline uint32_t REG_MDP5_PIPE_SRC_XY(enum mdp5_pipe i0) { return 0x00000008 + __offset_PIPE(…  in REG_MDP5_PIPE_SRC_XY()
721 …nline uint32_t REG_MDP5_PIPE_OUT_SIZE(enum mdp5_pipe i0) { return 0x0000000c + __offset_PIPE(i0); }  in REG_MDP5_PIPE_OUT_SIZE()
735 static inline uint32_t REG_MDP5_PIPE_OUT_XY(enum mdp5_pipe i0) { return 0x00000010 + __offset_PIPE(…  in REG_MDP5_PIPE_OUT_XY()
749 …line uint32_t REG_MDP5_PIPE_SRC0_ADDR(enum mdp5_pipe i0) { return 0x00000014 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC0_ADDR()
751 …line uint32_t REG_MDP5_PIPE_SRC1_ADDR(enum mdp5_pipe i0) { return 0x00000018 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC1_ADDR()
753 …line uint32_t REG_MDP5_PIPE_SRC2_ADDR(enum mdp5_pipe i0) { return 0x0000001c + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC2_ADDR()
755 …line uint32_t REG_MDP5_PIPE_SRC3_ADDR(enum mdp5_pipe i0) { return 0x00000020 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC3_ADDR()
757 …e uint32_t REG_MDP5_PIPE_SRC_STRIDE_A(enum mdp5_pipe i0) { return 0x00000024 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC_STRIDE_A()
771 …e uint32_t REG_MDP5_PIPE_SRC_STRIDE_B(enum mdp5_pipe i0) { return 0x00000028 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC_STRIDE_B()
785 …nt32_t REG_MDP5_PIPE_STILE_FRAME_SIZE(enum mdp5_pipe i0) { return 0x0000002c + __offset_PIPE(i0); }  in REG_MDP5_PIPE_STILE_FRAME_SIZE()
787 …ine uint32_t REG_MDP5_PIPE_SRC_FORMAT(enum mdp5_pipe i0) { return 0x00000030 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC_FORMAT()
841 …ine uint32_t REG_MDP5_PIPE_SRC_UNPACK(enum mdp5_pipe i0) { return 0x00000034 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC_UNPACK()
867 …ne uint32_t REG_MDP5_PIPE_SRC_OP_MODE(enum mdp5_pipe i0) { return 0x00000038 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC_OP_MODE()
884 …32_t REG_MDP5_PIPE_SRC_CONSTANT_COLOR(enum mdp5_pipe i0) { return 0x0000003c + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC_CONSTANT_COLOR()
886 …e uint32_t REG_MDP5_PIPE_FETCH_CONFIG(enum mdp5_pipe i0) { return 0x00000048 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_FETCH_CONFIG()
888 …line uint32_t REG_MDP5_PIPE_VC1_RANGE(enum mdp5_pipe i0) { return 0x0000004c + __offset_PIPE(i0); }  in REG_MDP5_PIPE_VC1_RANGE()
890 …t32_t REG_MDP5_PIPE_REQPRIO_FIFO_WM_0(enum mdp5_pipe i0) { return 0x00000050 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_REQPRIO_FIFO_WM_0()
892 …t32_t REG_MDP5_PIPE_REQPRIO_FIFO_WM_1(enum mdp5_pipe i0) { return 0x00000054 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_REQPRIO_FIFO_WM_1()
894 …t32_t REG_MDP5_PIPE_REQPRIO_FIFO_WM_2(enum mdp5_pipe i0) { return 0x00000058 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_REQPRIO_FIFO_WM_2()
896 …32_t REG_MDP5_PIPE_SRC_ADDR_SW_STATUS(enum mdp5_pipe i0) { return 0x00000070 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SRC_ADDR_SW_STATUS()
898 …t32_t REG_MDP5_PIPE_CURRENT_SRC0_ADDR(enum mdp5_pipe i0) { return 0x000000a4 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_CURRENT_SRC0_ADDR()
900 …t32_t REG_MDP5_PIPE_CURRENT_SRC1_ADDR(enum mdp5_pipe i0) { return 0x000000a8 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_CURRENT_SRC1_ADDR()
902 …t32_t REG_MDP5_PIPE_CURRENT_SRC2_ADDR(enum mdp5_pipe i0) { return 0x000000ac + __offset_PIPE(i0); }  in REG_MDP5_PIPE_CURRENT_SRC2_ADDR()
904 …t32_t REG_MDP5_PIPE_CURRENT_SRC3_ADDR(enum mdp5_pipe i0) { return 0x000000b0 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_CURRENT_SRC3_ADDR()
906 …ine uint32_t REG_MDP5_PIPE_DECIMATION(enum mdp5_pipe i0) { return 0x000000b4 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_DECIMATION()
929 …(enum mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000000 + __offset_PIPE(i0) + __offset…  in REG_MDP5_PIPE_SW_PIX_EXT()
931 …(enum mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000000 + __offset_PIPE(i0) + __offset…  in REG_MDP5_PIPE_SW_PIX_EXT_LR()
957 …(enum mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000004 + __offset_PIPE(i0) + __offset…  in REG_MDP5_PIPE_SW_PIX_EXT_TB()
983 …(enum mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000008 + __offset_PIPE(i0) + __offset…  in REG_MDP5_PIPE_SW_PIX_EXT_REQ_PIXELS()
997 …e uint32_t REG_MDP5_PIPE_SCALE_CONFIG(enum mdp5_pipe i0) { return 0x00000204 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SCALE_CONFIG()
1037 …32_t REG_MDP5_PIPE_SCALE_PHASE_STEP_X(enum mdp5_pipe i0) { return 0x00000210 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SCALE_PHASE_STEP_X()
1039 …32_t REG_MDP5_PIPE_SCALE_PHASE_STEP_Y(enum mdp5_pipe i0) { return 0x00000214 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SCALE_PHASE_STEP_Y()
1041 …t REG_MDP5_PIPE_SCALE_CR_PHASE_STEP_X(enum mdp5_pipe i0) { return 0x00000218 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SCALE_CR_PHASE_STEP_X()
1043 …t REG_MDP5_PIPE_SCALE_CR_PHASE_STEP_Y(enum mdp5_pipe i0) { return 0x0000021c + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SCALE_CR_PHASE_STEP_Y()
1045 …32_t REG_MDP5_PIPE_SCALE_INIT_PHASE_X(enum mdp5_pipe i0) { return 0x00000220 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SCALE_INIT_PHASE_X()
1047 …32_t REG_MDP5_PIPE_SCALE_INIT_PHASE_Y(enum mdp5_pipe i0) { return 0x00000224 + __offset_PIPE(i0); }  in REG_MDP5_PIPE_SCALE_INIT_PHASE_Y()