64 	u32				timings[4];  member
421 		writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG));  in pmac_ide_apply_timings()
423 		writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG));  in pmac_ide_apply_timings()
438 		writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));  in pmac_ide_kauai_apply_timings()
439 		writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));  in pmac_ide_kauai_apply_timings()
441 		writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));  in pmac_ide_kauai_apply_timings()
442 		writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));  in pmac_ide_kauai_apply_timings()
502 	u32 *timings, t;  in pmac_ide_set_pio_mode()  local
508 	timings = &pmif->timings[drive->dn & 1];  in pmac_ide_set_pio_mode()
509 	t = *timings;  in pmac_ide_set_pio_mode()
569 		drive->name, pio,  *timings);  in pmac_ide_set_pio_mode()
572 	*timings = t;  in pmac_ide_set_pio_mode()
580 set_timings_udma_ata4(u32 *timings, u8 speed)  in set_timings_udma_ata4()  argument
591 	*timings = ((*timings) & ~(TR_66_UDMA_MASK | TR_66_MDMA_MASK)) |  in set_timings_udma_ata4()
598 		speed & 0xf,  *timings);  in set_timings_udma_ata4()
644 set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,  in set_timings_mdma()  argument
707 		*timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr;  in set_timings_mdma()
715 		*timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr;  in set_timings_mdma()
728 		*timings = ((*timings) & ~(TR_66_MDMA_MASK | TR_66_UDMA_MASK)) |  in set_timings_mdma()
741 		*timings = ((*timings) & ~TR_33_MDMA_MASK) |  in set_timings_mdma()
765 		*timings = ((*timings) & ~TR_33_MDMA_MASK) |  in set_timings_mdma()
769 			*timings |= TR_33_MDMA_HALFTICK;  in set_timings_mdma()
774 		drive->name, speed & 0xf,  *timings);  in set_timings_mdma()
782 	u32 *timings, *timings2, tl[2];  in pmac_ide_set_dma_mode()  local
786 	timings = &pmif->timings[unit];  in pmac_ide_set_dma_mode()
787 	timings2 = &pmif->timings[unit+2];  in pmac_ide_set_dma_mode()
790 	tl[0] = *timings;  in pmac_ide_set_dma_mode()
810 	*timings = tl[0];  in pmac_ide_set_dma_mode()
847 	pmif->timings[0] = pmif->timings[1] = value;  in sanitize_timings()
848 	pmif->timings[2] = pmif->timings[3] = value2;  in sanitize_timings()
862 	pmif->timings[0] = 0;  in pmac_ide_do_suspend()
863 	pmif->timings[1] = 0;  in pmac_ide_do_suspend()
1545 	if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) {  in pmac_ide_dma_setup()
1546 		writel(pmif->timings[unit] + (write ? 0 : 0x00800000UL),  in pmac_ide_dma_setup()