165 	dd->pcidev = pdev;  in hfi1_pcie_ddinit()
212 	pci_read_config_dword(dd->pcidev, PCI_ROM_ADDRESS, &dd->pci_rom);  in hfi1_pcie_ddinit()
213 	pci_read_config_word(dd->pcidev, PCI_COMMAND, &dd->pci_command);  in hfi1_pcie_ddinit()
214 	pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL, &dd->pcie_devctl);  in hfi1_pcie_ddinit()
215 	pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKCTL, &dd->pcie_lnkctl);  in hfi1_pcie_ddinit()
216 	pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL2,  in hfi1_pcie_ddinit()
218 	pci_read_config_dword(dd->pcidev, PCI_CFG_MSIX0, &dd->pci_msix0);  in hfi1_pcie_ddinit()
219 	pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE1, &dd->pci_lnkctl3);  in hfi1_pcie_ddinit()
220 	pci_read_config_dword(dd->pcidev, PCIE_CFG_TPH2, &dd->pci_tph2);  in hfi1_pcie_ddinit()
259 		pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVSTA, &status);  in hfi1_pcie_flr()
267 	pcie_capability_set_word(dd->pcidev, PCI_EXP_DEVCTL,  in hfi1_pcie_flr()
295 	ret = pci_enable_msix_range(dd->pcidev, msix_entry, 1, nvec);  in msix_setup()
314 	hfi1_enable_intx(dd->pcidev);  in msix_setup()
348 	pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKSTA, &linkstat);  in update_lbus_info()
362 	struct pci_dev *parent = dd->pcidev->bus->self;  in pcie_speeds()
364 	if (!pci_is_pcie(dd->pcidev)) {  in pcie_speeds()
372 	pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &linkcap);  in pcie_speeds()
383 	if (parent && dd->pcidev->bus->max_bus_speed != PCIE_SPEED_8_0GT) {  in pcie_speeds()
406 	pos = dd->pcidev->msix_cap;  in request_msix()
412 		hfi1_enable_intx(dd->pcidev);  in request_msix()
429 	pci_write_config_word(dd->pcidev, PCI_COMMAND, dd->pci_command);  in restore_pci_variables()
430 	pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0, dd->pcibar0);  in restore_pci_variables()
431 	pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1, dd->pcibar1);  in restore_pci_variables()
432 	pci_write_config_dword(dd->pcidev, PCI_ROM_ADDRESS, dd->pci_rom);  in restore_pci_variables()
433 	pcie_capability_write_word(dd->pcidev, PCI_EXP_DEVCTL, dd->pcie_devctl);  in restore_pci_variables()
434 	pcie_capability_write_word(dd->pcidev, PCI_EXP_LNKCTL, dd->pcie_lnkctl);  in restore_pci_variables()
435 	pcie_capability_write_word(dd->pcidev, PCI_EXP_DEVCTL2,  in restore_pci_variables()
437 	pci_write_config_dword(dd->pcidev, PCI_CFG_MSIX0, dd->pci_msix0);  in restore_pci_variables()
438 	pci_write_config_dword(dd->pcidev, PCIE_CFG_SPCIE1, dd->pci_lnkctl3);  in restore_pci_variables()
439 	pci_write_config_dword(dd->pcidev, PCIE_CFG_TPH2, dd->pci_tph2);  in restore_pci_variables()
464 	pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL, &ectl);  in tune_pcie_caps()
468 		pcie_capability_write_word(dd->pcidev, PCI_EXP_DEVCTL, ectl);  in tune_pcie_caps()
471 	parent = dd->pcidev->bus->self;  in tune_pcie_caps()
483 	if (!pci_is_pcie(parent) || !pci_is_pcie(dd->pcidev))  in tune_pcie_caps()
488 	ep_mpss = dd->pcidev->pcie_mpss;  in tune_pcie_caps()
489 	ep_mps = ffs(pcie_get_mps(dd->pcidev)) - 8;  in tune_pcie_caps()
506 		pcie_set_mps(dd->pcidev, 128 << ep_mps);  in tune_pcie_caps()
520 	ep_mrrs = pcie_get_readrq(dd->pcidev);  in tune_pcie_caps()
528 		pcie_set_readrq(dd->pcidev, ep_mrrs);  in tune_pcie_caps()
766 	struct pci_dev *pdev = dd->pcidev;  in load_eq_table()
782 		pci_read_config_dword(dd->pcidev, PCIE_CFG_REG_PL105,  in load_eq_table()
837 	struct pci_dev *dev = dd->pcidev;  in trigger_sbr()
935 	if (dd->pcidev->device == PCI_DEVICE_ID_INTEL1) { /* integrated */  in write_xmt_margin()
980 	struct pci_dev *parent = dd->pcidev->bus->self;  in do_pcie_gen3_transition()
1090 	pci_write_config_dword(dd->pcidev, PCIE_CFG_SPCIE2, 0xffff);  in do_pcie_gen3_transition()
1101 	pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL2, reg32);  in do_pcie_gen3_transition()
1111 	pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL100, reg32);  in do_pcie_gen3_transition()
1121 	if (dd->pcidev->device == PCI_DEVICE_ID_INTEL0) { /* discrete */  in do_pcie_gen3_transition()
1142 	pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL101,  in do_pcie_gen3_transition()
1164 	pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL106,  in do_pcie_gen3_transition()
1252 	pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKCTL2, &lnkctl2);  in do_pcie_gen3_transition()
1259 	pcie_capability_write_word(dd->pcidev, PCI_EXP_LNKCTL2, lnkctl2);  in do_pcie_gen3_transition()
1292 	ret = pci_read_config_word(dd->pcidev, PCI_VENDOR_ID, &vendor);  in do_pcie_gen3_transition()
1339 	pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE2, &reg32);  in do_pcie_gen3_transition()