Lines Matching refs:host
165 static inline void IRQ_ON(struct au1xmmc_host *host, u32 mask) in IRQ_ON() argument
167 u32 val = __raw_readl(HOST_CONFIG(host)); in IRQ_ON()
169 __raw_writel(val, HOST_CONFIG(host)); in IRQ_ON()
173 static inline void FLUSH_FIFO(struct au1xmmc_host *host) in FLUSH_FIFO() argument
175 u32 val = __raw_readl(HOST_CONFIG2(host)); in FLUSH_FIFO()
177 __raw_writel(val | SD_CONFIG2_FF, HOST_CONFIG2(host)); in FLUSH_FIFO()
184 __raw_writel(val, HOST_CONFIG2(host)); in FLUSH_FIFO()
188 static inline void IRQ_OFF(struct au1xmmc_host *host, u32 mask) in IRQ_OFF() argument
190 u32 val = __raw_readl(HOST_CONFIG(host)); in IRQ_OFF()
192 __raw_writel(val, HOST_CONFIG(host)); in IRQ_OFF()
196 static inline void SEND_STOP(struct au1xmmc_host *host) in SEND_STOP() argument
200 WARN_ON(host->status != HOST_S_DATA); in SEND_STOP()
201 host->status = HOST_S_STOP; in SEND_STOP()
203 config2 = __raw_readl(HOST_CONFIG2(host)); in SEND_STOP()
204 __raw_writel(config2 | SD_CONFIG2_DF, HOST_CONFIG2(host)); in SEND_STOP()
208 __raw_writel(STOP_CMD, HOST_CMD(host)); in SEND_STOP()
212 static void au1xmmc_set_power(struct au1xmmc_host *host, int state) in au1xmmc_set_power() argument
214 if (host->platdata && host->platdata->set_power) in au1xmmc_set_power()
215 host->platdata->set_power(host->mmc, state); in au1xmmc_set_power()
220 struct au1xmmc_host *host = mmc_priv(mmc); in au1xmmc_card_inserted() local
222 if (host->platdata && host->platdata->card_inserted) in au1xmmc_card_inserted()
223 return !!host->platdata->card_inserted(host->mmc); in au1xmmc_card_inserted()
230 struct au1xmmc_host *host = mmc_priv(mmc); in au1xmmc_card_readonly() local
232 if (host->platdata && host->platdata->card_readonly) in au1xmmc_card_readonly()
233 return !!host->platdata->card_readonly(mmc); in au1xmmc_card_readonly()
238 static void au1xmmc_finish_request(struct au1xmmc_host *host) in au1xmmc_finish_request() argument
240 struct mmc_request *mrq = host->mrq; in au1xmmc_finish_request()
242 host->mrq = NULL; in au1xmmc_finish_request()
243 host->flags &= HOST_F_ACTIVE | HOST_F_DMA; in au1xmmc_finish_request()
245 host->dma.len = 0; in au1xmmc_finish_request()
246 host->dma.dir = 0; in au1xmmc_finish_request()
248 host->pio.index = 0; in au1xmmc_finish_request()
249 host->pio.offset = 0; in au1xmmc_finish_request()
250 host->pio.len = 0; in au1xmmc_finish_request()
252 host->status = HOST_S_IDLE; in au1xmmc_finish_request()
254 mmc_request_done(host->mmc, mrq); in au1xmmc_finish_request()
259 struct au1xmmc_host *host = (struct au1xmmc_host *) param; in au1xmmc_tasklet_finish() local
260 au1xmmc_finish_request(host); in au1xmmc_tasklet_finish()
263 static int au1xmmc_send_command(struct au1xmmc_host *host, int wait, in au1xmmc_send_command() argument
303 __raw_writel(cmd->arg, HOST_CMDARG(host)); in au1xmmc_send_command()
307 IRQ_OFF(host, SD_CONFIG_CR); in au1xmmc_send_command()
309 __raw_writel((mmccmd | SD_CMD_GO), HOST_CMD(host)); in au1xmmc_send_command()
313 while (__raw_readl(HOST_CMD(host)) & SD_CMD_GO) in au1xmmc_send_command()
318 u32 status = __raw_readl(HOST_STATUS(host)); in au1xmmc_send_command()
321 status = __raw_readl(HOST_STATUS(host)); in au1xmmc_send_command()
324 __raw_writel(SD_STATUS_CR, HOST_STATUS(host)); in au1xmmc_send_command()
326 IRQ_ON(host, SD_CONFIG_CR); in au1xmmc_send_command()
332 static void au1xmmc_data_complete(struct au1xmmc_host *host, u32 status) in au1xmmc_data_complete() argument
334 struct mmc_request *mrq = host->mrq; in au1xmmc_data_complete()
338 WARN_ON((host->status != HOST_S_DATA) && (host->status != HOST_S_STOP)); in au1xmmc_data_complete()
340 if (host->mrq == NULL) in au1xmmc_data_complete()
346 status = __raw_readl(HOST_STATUS(host)); in au1xmmc_data_complete()
349 while ((host->flags & HOST_F_XMIT) && (status & SD_STATUS_DB)) in au1xmmc_data_complete()
350 status = __raw_readl(HOST_STATUS(host)); in au1xmmc_data_complete()
353 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma.dir); in au1xmmc_data_complete()
357 if (host->flags & HOST_F_XMIT) in au1xmmc_data_complete()
364 __raw_writel(SD_STATUS_WC | SD_STATUS_RC, HOST_STATUS(host)); in au1xmmc_data_complete()
369 if (host->flags & (HOST_F_DMA | HOST_F_DBDMA)) { in au1xmmc_data_complete()
370 u32 chan = DMA_CHANNEL(host); in au1xmmc_data_complete()
377 (data->blocks * data->blksz) - host->pio.len; in au1xmmc_data_complete()
380 au1xmmc_finish_request(host); in au1xmmc_data_complete()
385 struct au1xmmc_host *host = (struct au1xmmc_host *)param; in au1xmmc_tasklet_data() local
387 u32 status = __raw_readl(HOST_STATUS(host)); in au1xmmc_tasklet_data()
388 au1xmmc_data_complete(host, status); in au1xmmc_tasklet_data()
393 static void au1xmmc_send_pio(struct au1xmmc_host *host) in au1xmmc_send_pio() argument
401 data = host->mrq->data; in au1xmmc_send_pio()
403 if (!(host->flags & HOST_F_XMIT)) in au1xmmc_send_pio()
407 sg = &data->sg[host->pio.index]; in au1xmmc_send_pio()
408 sg_ptr = sg_virt(sg) + host->pio.offset; in au1xmmc_send_pio()
411 sg_len = data->sg[host->pio.index].length - host->pio.offset; in au1xmmc_send_pio()
414 max = (sg_len > host->pio.len) ? host->pio.len : sg_len; in au1xmmc_send_pio()
419 status = __raw_readl(HOST_STATUS(host)); in au1xmmc_send_pio()
426 __raw_writel((unsigned long)val, HOST_TXPORT(host)); in au1xmmc_send_pio()
430 host->pio.len -= count; in au1xmmc_send_pio()
431 host->pio.offset += count; in au1xmmc_send_pio()
434 host->pio.index++; in au1xmmc_send_pio()
435 host->pio.offset = 0; in au1xmmc_send_pio()
438 if (host->pio.len == 0) { in au1xmmc_send_pio()
439 IRQ_OFF(host, SD_CONFIG_TH); in au1xmmc_send_pio()
441 if (host->flags & HOST_F_STOP) in au1xmmc_send_pio()
442 SEND_STOP(host); in au1xmmc_send_pio()
444 tasklet_schedule(&host->data_task); in au1xmmc_send_pio()
448 static void au1xmmc_receive_pio(struct au1xmmc_host *host) in au1xmmc_receive_pio() argument
456 data = host->mrq->data; in au1xmmc_receive_pio()
458 if (!(host->flags & HOST_F_RECV)) in au1xmmc_receive_pio()
461 max = host->pio.len; in au1xmmc_receive_pio()
463 if (host->pio.index < host->dma.len) { in au1xmmc_receive_pio()
464 sg = &data->sg[host->pio.index]; in au1xmmc_receive_pio()
465 sg_ptr = sg_virt(sg) + host->pio.offset; in au1xmmc_receive_pio()
468 sg_len = sg_dma_len(&data->sg[host->pio.index]) - host->pio.offset; in au1xmmc_receive_pio()
479 status = __raw_readl(HOST_STATUS(host)); in au1xmmc_receive_pio()
485 DBG("RX CRC Error [%d + %d].\n", host->pdev->id, in au1xmmc_receive_pio()
486 host->pio.len, count); in au1xmmc_receive_pio()
491 DBG("RX Overrun [%d + %d]\n", host->pdev->id, in au1xmmc_receive_pio()
492 host->pio.len, count); in au1xmmc_receive_pio()
496 DBG("RX Underrun [%d + %d]\n", host->pdev->id, in au1xmmc_receive_pio()
497 host->pio.len, count); in au1xmmc_receive_pio()
501 val = __raw_readl(HOST_RXPORT(host)); in au1xmmc_receive_pio()
507 host->pio.len -= count; in au1xmmc_receive_pio()
508 host->pio.offset += count; in au1xmmc_receive_pio()
511 host->pio.index++; in au1xmmc_receive_pio()
512 host->pio.offset = 0; in au1xmmc_receive_pio()
515 if (host->pio.len == 0) { in au1xmmc_receive_pio()
517 IRQ_OFF(host, SD_CONFIG_NE); in au1xmmc_receive_pio()
519 if (host->flags & HOST_F_STOP) in au1xmmc_receive_pio()
520 SEND_STOP(host); in au1xmmc_receive_pio()
522 tasklet_schedule(&host->data_task); in au1xmmc_receive_pio()
529 static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status) in au1xmmc_cmd_complete() argument
531 struct mmc_request *mrq = host->mrq; in au1xmmc_cmd_complete()
536 if (!host->mrq) in au1xmmc_cmd_complete()
544 r[0] = __raw_readl(host->iobase + SD_RESP3); in au1xmmc_cmd_complete()
545 r[1] = __raw_readl(host->iobase + SD_RESP2); in au1xmmc_cmd_complete()
546 r[2] = __raw_readl(host->iobase + SD_RESP1); in au1xmmc_cmd_complete()
547 r[3] = __raw_readl(host->iobase + SD_RESP0); in au1xmmc_cmd_complete()
566 cmd->resp[0] = __raw_readl(host->iobase + SD_RESP0); in au1xmmc_cmd_complete()
574 trans = host->flags & (HOST_F_XMIT | HOST_F_RECV); in au1xmmc_cmd_complete()
577 IRQ_OFF(host, SD_CONFIG_TH | SD_CONFIG_RA | SD_CONFIG_RF); in au1xmmc_cmd_complete()
578 tasklet_schedule(&host->finish_task); in au1xmmc_cmd_complete()
582 host->status = HOST_S_DATA; in au1xmmc_cmd_complete()
584 if ((host->flags & (HOST_F_DMA | HOST_F_DBDMA))) { in au1xmmc_cmd_complete()
585 u32 channel = DMA_CHANNEL(host); in au1xmmc_cmd_complete()
589 if (host->flags & HOST_F_RECV) { in au1xmmc_cmd_complete()
593 status = __raw_readl(HOST_STATUS(host)); in au1xmmc_cmd_complete()
600 static void au1xmmc_set_clock(struct au1xmmc_host *host, int rate) in au1xmmc_set_clock() argument
602 unsigned int pbus = clk_get_rate(host->clk); in au1xmmc_set_clock()
606 config = __raw_readl(HOST_CONFIG(host)); in au1xmmc_set_clock()
611 __raw_writel(config, HOST_CONFIG(host)); in au1xmmc_set_clock()
615 static int au1xmmc_prepare_data(struct au1xmmc_host *host, in au1xmmc_prepare_data() argument
621 host->flags |= HOST_F_RECV; in au1xmmc_prepare_data()
623 host->flags |= HOST_F_XMIT; in au1xmmc_prepare_data()
625 if (host->mrq->stop) in au1xmmc_prepare_data()
626 host->flags |= HOST_F_STOP; in au1xmmc_prepare_data()
628 host->dma.dir = DMA_BIDIRECTIONAL; in au1xmmc_prepare_data()
630 host->dma.len = dma_map_sg(mmc_dev(host->mmc), data->sg, in au1xmmc_prepare_data()
631 data->sg_len, host->dma.dir); in au1xmmc_prepare_data()
633 if (host->dma.len == 0) in au1xmmc_prepare_data()
636 __raw_writel(data->blksz - 1, HOST_BLKSIZE(host)); in au1xmmc_prepare_data()
638 if (host->flags & (HOST_F_DMA | HOST_F_DBDMA)) { in au1xmmc_prepare_data()
640 u32 channel = DMA_CHANNEL(host); in au1xmmc_prepare_data()
644 for (i = 0; i < host->dma.len; i++) { in au1xmmc_prepare_data()
651 if (i == host->dma.len - 1) in au1xmmc_prepare_data()
654 if (host->flags & HOST_F_XMIT) { in au1xmmc_prepare_data()
668 host->pio.index = 0; in au1xmmc_prepare_data()
669 host->pio.offset = 0; in au1xmmc_prepare_data()
670 host->pio.len = datalen; in au1xmmc_prepare_data()
672 if (host->flags & HOST_F_XMIT) in au1xmmc_prepare_data()
673 IRQ_ON(host, SD_CONFIG_TH); in au1xmmc_prepare_data()
675 IRQ_ON(host, SD_CONFIG_NE); in au1xmmc_prepare_data()
682 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in au1xmmc_prepare_data()
683 host->dma.dir); in au1xmmc_prepare_data()
690 struct au1xmmc_host *host = mmc_priv(mmc); in au1xmmc_request() local
694 WARN_ON(host->status != HOST_S_IDLE); in au1xmmc_request()
696 host->mrq = mrq; in au1xmmc_request()
697 host->status = HOST_S_CMD; in au1xmmc_request()
702 au1xmmc_finish_request(host); in au1xmmc_request()
707 FLUSH_FIFO(host); in au1xmmc_request()
708 ret = au1xmmc_prepare_data(host, mrq->data); in au1xmmc_request()
712 ret = au1xmmc_send_command(host, 0, mrq->cmd, mrq->data); in au1xmmc_request()
716 au1xmmc_finish_request(host); in au1xmmc_request()
720 static void au1xmmc_reset_controller(struct au1xmmc_host *host) in au1xmmc_reset_controller() argument
723 __raw_writel(SD_ENABLE_CE, HOST_ENABLE(host)); in au1xmmc_reset_controller()
727 __raw_writel(SD_ENABLE_R | SD_ENABLE_CE, HOST_ENABLE(host)); in au1xmmc_reset_controller()
731 __raw_writel(~0, HOST_STATUS(host)); in au1xmmc_reset_controller()
734 __raw_writel(0, HOST_BLKSIZE(host)); in au1xmmc_reset_controller()
735 __raw_writel(0x001fffff, HOST_TIMEOUT(host)); in au1xmmc_reset_controller()
738 __raw_writel(SD_CONFIG2_EN, HOST_CONFIG2(host)); in au1xmmc_reset_controller()
741 __raw_writel(SD_CONFIG2_EN | SD_CONFIG2_FF, HOST_CONFIG2(host)); in au1xmmc_reset_controller()
745 __raw_writel(SD_CONFIG2_EN, HOST_CONFIG2(host)); in au1xmmc_reset_controller()
749 __raw_writel(AU1XMMC_INTERRUPTS, HOST_CONFIG(host)); in au1xmmc_reset_controller()
756 struct au1xmmc_host *host = mmc_priv(mmc); in au1xmmc_set_ios() local
760 au1xmmc_set_power(host, 0); in au1xmmc_set_ios()
762 au1xmmc_set_power(host, 1); in au1xmmc_set_ios()
765 if (ios->clock && ios->clock != host->clock) { in au1xmmc_set_ios()
766 au1xmmc_set_clock(host, ios->clock); in au1xmmc_set_ios()
767 host->clock = ios->clock; in au1xmmc_set_ios()
770 config2 = __raw_readl(HOST_CONFIG2(host)); in au1xmmc_set_ios()
783 __raw_writel(config2, HOST_CONFIG2(host)); in au1xmmc_set_ios()
793 struct au1xmmc_host *host = dev_id; in au1xmmc_irq() local
796 status = __raw_readl(HOST_STATUS(host)); in au1xmmc_irq()
802 mmc_signal_sdio_irq(host->mmc); in au1xmmc_irq()
804 if (host->mrq && (status & STATUS_TIMEOUT)) { in au1xmmc_irq()
806 host->mrq->cmd->error = -ETIMEDOUT; in au1xmmc_irq()
808 host->mrq->data->error = -ETIMEDOUT; in au1xmmc_irq()
811 IRQ_OFF(host, SD_CONFIG_NE | SD_CONFIG_TH); in au1xmmc_irq()
814 tasklet_schedule(&host->finish_task); in au1xmmc_irq()
819 if (!(host->flags & HOST_F_DMA) && (status & SD_STATUS_NE)) in au1xmmc_irq()
820 au1xmmc_receive_pio(host); in au1xmmc_irq()
822 au1xmmc_data_complete(host, status); in au1xmmc_irq()
828 if (host->status == HOST_S_CMD) in au1xmmc_irq()
829 au1xmmc_cmd_complete(host, status); in au1xmmc_irq()
831 } else if (!(host->flags & HOST_F_DMA)) { in au1xmmc_irq()
832 if ((host->flags & HOST_F_XMIT) && (status & STATUS_DATA_OUT)) in au1xmmc_irq()
833 au1xmmc_send_pio(host); in au1xmmc_irq()
834 else if ((host->flags & HOST_F_RECV) && (status & STATUS_DATA_IN)) in au1xmmc_irq()
835 au1xmmc_receive_pio(host); in au1xmmc_irq()
838 DBG("Unhandled status %8.8x\n", host->pdev->id, in au1xmmc_irq()
842 __raw_writel(status, HOST_STATUS(host)); in au1xmmc_irq()
862 struct au1xmmc_host *host = (struct au1xmmc_host *)dev_id; in au1xmmc_dbdma_callback() local
865 if (!host->mrq) in au1xmmc_dbdma_callback()
868 if (host->flags & HOST_F_STOP) in au1xmmc_dbdma_callback()
869 SEND_STOP(host); in au1xmmc_dbdma_callback()
871 tasklet_schedule(&host->data_task); in au1xmmc_dbdma_callback()
874 static int au1xmmc_dbdma_init(struct au1xmmc_host *host) in au1xmmc_dbdma_init() argument
879 res = platform_get_resource(host->pdev, IORESOURCE_DMA, 0); in au1xmmc_dbdma_init()
884 res = platform_get_resource(host->pdev, IORESOURCE_DMA, 1); in au1xmmc_dbdma_init()
892 host->tx_chan = au1xxx_dbdma_chan_alloc(memid, txid, in au1xmmc_dbdma_init()
893 au1xmmc_dbdma_callback, (void *)host); in au1xmmc_dbdma_init()
894 if (!host->tx_chan) { in au1xmmc_dbdma_init()
895 dev_err(&host->pdev->dev, "cannot allocate TX DMA\n"); in au1xmmc_dbdma_init()
899 host->rx_chan = au1xxx_dbdma_chan_alloc(rxid, memid, in au1xmmc_dbdma_init()
900 au1xmmc_dbdma_callback, (void *)host); in au1xmmc_dbdma_init()
901 if (!host->rx_chan) { in au1xmmc_dbdma_init()
902 dev_err(&host->pdev->dev, "cannot allocate RX DMA\n"); in au1xmmc_dbdma_init()
903 au1xxx_dbdma_chan_free(host->tx_chan); in au1xmmc_dbdma_init()
907 au1xxx_dbdma_set_devwidth(host->tx_chan, 8); in au1xmmc_dbdma_init()
908 au1xxx_dbdma_set_devwidth(host->rx_chan, 8); in au1xmmc_dbdma_init()
910 au1xxx_dbdma_ring_alloc(host->tx_chan, AU1XMMC_DESCRIPTOR_COUNT); in au1xmmc_dbdma_init()
911 au1xxx_dbdma_ring_alloc(host->rx_chan, AU1XMMC_DESCRIPTOR_COUNT); in au1xmmc_dbdma_init()
914 host->flags |= HOST_F_DMA | HOST_F_DBDMA; in au1xmmc_dbdma_init()
919 static void au1xmmc_dbdma_shutdown(struct au1xmmc_host *host) in au1xmmc_dbdma_shutdown() argument
921 if (host->flags & HOST_F_DMA) { in au1xmmc_dbdma_shutdown()
922 host->flags &= ~HOST_F_DMA; in au1xmmc_dbdma_shutdown()
923 au1xxx_dbdma_chan_free(host->tx_chan); in au1xmmc_dbdma_shutdown()
924 au1xxx_dbdma_chan_free(host->rx_chan); in au1xmmc_dbdma_shutdown()
930 struct au1xmmc_host *host = mmc_priv(mmc); in au1xmmc_enable_sdio_irq() local
933 IRQ_ON(host, SD_CONFIG_SI); in au1xmmc_enable_sdio_irq()
935 IRQ_OFF(host, SD_CONFIG_SI); in au1xmmc_enable_sdio_irq()
949 struct au1xmmc_host *host; in au1xmmc_probe() local
960 host = mmc_priv(mmc); in au1xmmc_probe()
961 host->mmc = mmc; in au1xmmc_probe()
962 host->platdata = pdev->dev.platform_data; in au1xmmc_probe()
963 host->pdev = pdev; in au1xmmc_probe()
972 host->ioarea = request_mem_region(r->start, resource_size(r), in au1xmmc_probe()
974 if (!host->ioarea) { in au1xmmc_probe()
979 host->iobase = ioremap(r->start, 0x3c); in au1xmmc_probe()
980 if (!host->iobase) { in au1xmmc_probe()
990 host->irq = r->start; in au1xmmc_probe()
1017 if (host->ioarea->start == AU1100_SD0_PHYS_ADDR) in au1xmmc_probe()
1022 ret = request_irq(host->irq, au1xmmc_irq, iflag, DRIVER_NAME, host); in au1xmmc_probe()
1028 host->clk = clk_get(&pdev->dev, ALCHEMY_PERIPH_CLK); in au1xmmc_probe()
1029 if (IS_ERR(host->clk)) { in au1xmmc_probe()
1031 ret = PTR_ERR(host->clk); in au1xmmc_probe()
1035 ret = clk_prepare_enable(host->clk); in au1xmmc_probe()
1041 host->status = HOST_S_IDLE; in au1xmmc_probe()
1044 if (host->platdata && host->platdata->cd_setup) { in au1xmmc_probe()
1045 ret = host->platdata->cd_setup(mmc, 1); in au1xmmc_probe()
1054 if (host->platdata) in au1xmmc_probe()
1055 mmc->caps &= ~(host->platdata->mask_host_caps); in au1xmmc_probe()
1057 tasklet_init(&host->data_task, au1xmmc_tasklet_data, in au1xmmc_probe()
1058 (unsigned long)host); in au1xmmc_probe()
1060 tasklet_init(&host->finish_task, au1xmmc_tasklet_finish, in au1xmmc_probe()
1061 (unsigned long)host); in au1xmmc_probe()
1064 ret = au1xmmc_dbdma_init(host); in au1xmmc_probe()
1070 if (host->platdata && host->platdata->led) { in au1xmmc_probe()
1071 struct led_classdev *led = host->platdata->led; in au1xmmc_probe()
1081 au1xmmc_reset_controller(host); in au1xmmc_probe()
1089 platform_set_drvdata(pdev, host); in au1xmmc_probe()
1092 " (mode=%s)\n", pdev->id, host->iobase, in au1xmmc_probe()
1093 host->flags & HOST_F_DMA ? "dma" : "pio"); in au1xmmc_probe()
1099 if (host->platdata && host->platdata->led) in au1xmmc_probe()
1100 led_classdev_unregister(host->platdata->led); in au1xmmc_probe()
1103 __raw_writel(0, HOST_ENABLE(host)); in au1xmmc_probe()
1104 __raw_writel(0, HOST_CONFIG(host)); in au1xmmc_probe()
1105 __raw_writel(0, HOST_CONFIG2(host)); in au1xmmc_probe()
1108 if (host->flags & HOST_F_DBDMA) in au1xmmc_probe()
1109 au1xmmc_dbdma_shutdown(host); in au1xmmc_probe()
1111 tasklet_kill(&host->data_task); in au1xmmc_probe()
1112 tasklet_kill(&host->finish_task); in au1xmmc_probe()
1114 if (host->platdata && host->platdata->cd_setup && in au1xmmc_probe()
1116 host->platdata->cd_setup(mmc, 0); in au1xmmc_probe()
1118 clk_disable_unprepare(host->clk); in au1xmmc_probe()
1119 clk_put(host->clk); in au1xmmc_probe()
1121 free_irq(host->irq, host); in au1xmmc_probe()
1123 iounmap((void *)host->iobase); in au1xmmc_probe()
1125 release_resource(host->ioarea); in au1xmmc_probe()
1126 kfree(host->ioarea); in au1xmmc_probe()
1135 struct au1xmmc_host *host = platform_get_drvdata(pdev); in au1xmmc_remove() local
1137 if (host) { in au1xmmc_remove()
1138 mmc_remove_host(host->mmc); in au1xmmc_remove()
1141 if (host->platdata && host->platdata->led) in au1xmmc_remove()
1142 led_classdev_unregister(host->platdata->led); in au1xmmc_remove()
1145 if (host->platdata && host->platdata->cd_setup && in au1xmmc_remove()
1146 !(host->mmc->caps & MMC_CAP_NEEDS_POLL)) in au1xmmc_remove()
1147 host->platdata->cd_setup(host->mmc, 0); in au1xmmc_remove()
1149 __raw_writel(0, HOST_ENABLE(host)); in au1xmmc_remove()
1150 __raw_writel(0, HOST_CONFIG(host)); in au1xmmc_remove()
1151 __raw_writel(0, HOST_CONFIG2(host)); in au1xmmc_remove()
1154 tasklet_kill(&host->data_task); in au1xmmc_remove()
1155 tasklet_kill(&host->finish_task); in au1xmmc_remove()
1157 if (host->flags & HOST_F_DBDMA) in au1xmmc_remove()
1158 au1xmmc_dbdma_shutdown(host); in au1xmmc_remove()
1160 au1xmmc_set_power(host, 0); in au1xmmc_remove()
1162 clk_disable_unprepare(host->clk); in au1xmmc_remove()
1163 clk_put(host->clk); in au1xmmc_remove()
1165 free_irq(host->irq, host); in au1xmmc_remove()
1166 iounmap((void *)host->iobase); in au1xmmc_remove()
1167 release_resource(host->ioarea); in au1xmmc_remove()
1168 kfree(host->ioarea); in au1xmmc_remove()
1170 mmc_free_host(host->mmc); in au1xmmc_remove()
1178 struct au1xmmc_host *host = platform_get_drvdata(pdev); in au1xmmc_suspend() local
1180 __raw_writel(0, HOST_CONFIG2(host)); in au1xmmc_suspend()
1181 __raw_writel(0, HOST_CONFIG(host)); in au1xmmc_suspend()
1182 __raw_writel(0xffffffff, HOST_STATUS(host)); in au1xmmc_suspend()
1183 __raw_writel(0, HOST_ENABLE(host)); in au1xmmc_suspend()
1191 struct au1xmmc_host *host = platform_get_drvdata(pdev); in au1xmmc_resume() local
1193 au1xmmc_reset_controller(host); in au1xmmc_resume()