Lines Matching refs:host
107 static bool dw_mci_reset(struct dw_mci *host);
108 static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset);
122 spin_lock_bh(&slot->host->lock); in dw_mci_req_show()
148 spin_unlock_bh(&slot->host->lock); in dw_mci_req_show()
194 struct dw_mci *host = slot->host; in dw_mci_init_debugfs() local
202 node = debugfs_create_file("regs", S_IRUSR, root, host, in dw_mci_init_debugfs()
212 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); in dw_mci_init_debugfs()
217 (u32 *)&host->pending_events); in dw_mci_init_debugfs()
222 (u32 *)&host->completed_events); in dw_mci_init_debugfs()
239 struct dw_mci *host = slot->host; in dw_mci_prepare_command() local
261 WARN_ON(slot->host->state != STATE_SENDING_CMD); in dw_mci_prepare_command()
262 slot->host->state = STATE_SENDING_CMD11; in dw_mci_prepare_command()
275 clk_en_a = mci_readl(host, CLKENA); in dw_mci_prepare_command()
277 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_command()
305 static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_prep_stop_abort() argument
313 stop = &host->stop_abort; in dw_mci_prep_stop_abort()
341 static void dw_mci_wait_while_busy(struct dw_mci *host, u32 cmd_flags) in dw_mci_wait_while_busy() argument
355 while (mci_readl(host, STATUS) & SDMMC_STATUS_BUSY) { in dw_mci_wait_while_busy()
358 dev_err(host->dev, "Busy; trying anyway\n"); in dw_mci_wait_while_busy()
366 static void dw_mci_start_command(struct dw_mci *host, in dw_mci_start_command() argument
369 host->cmd = cmd; in dw_mci_start_command()
370 dev_vdbg(host->dev, in dw_mci_start_command()
374 mci_writel(host, CMDARG, cmd->arg); in dw_mci_start_command()
376 dw_mci_wait_while_busy(host, cmd_flags); in dw_mci_start_command()
378 mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); in dw_mci_start_command()
381 static inline void send_stop_abort(struct dw_mci *host, struct mmc_data *data) in send_stop_abort() argument
383 struct mmc_command *stop = data->stop ? data->stop : &host->stop_abort; in send_stop_abort()
385 dw_mci_start_command(host, stop, host->stop_cmdr); in send_stop_abort()
389 static void dw_mci_stop_dma(struct dw_mci *host) in dw_mci_stop_dma() argument
391 if (host->using_dma) { in dw_mci_stop_dma()
392 host->dma_ops->stop(host); in dw_mci_stop_dma()
393 host->dma_ops->cleanup(host); in dw_mci_stop_dma()
397 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_stop_dma()
408 static void dw_mci_dma_cleanup(struct dw_mci *host) in dw_mci_dma_cleanup() argument
410 struct mmc_data *data = host->data; in dw_mci_dma_cleanup()
414 dma_unmap_sg(host->dev, in dw_mci_dma_cleanup()
420 static void dw_mci_idmac_reset(struct dw_mci *host) in dw_mci_idmac_reset() argument
422 u32 bmod = mci_readl(host, BMOD); in dw_mci_idmac_reset()
425 mci_writel(host, BMOD, bmod); in dw_mci_idmac_reset()
428 static void dw_mci_idmac_stop_dma(struct dw_mci *host) in dw_mci_idmac_stop_dma() argument
433 temp = mci_readl(host, CTRL); in dw_mci_idmac_stop_dma()
436 mci_writel(host, CTRL, temp); in dw_mci_idmac_stop_dma()
439 temp = mci_readl(host, BMOD); in dw_mci_idmac_stop_dma()
442 mci_writel(host, BMOD, temp); in dw_mci_idmac_stop_dma()
447 struct dw_mci *host = arg; in dw_mci_dmac_complete_dma() local
448 struct mmc_data *data = host->data; in dw_mci_dmac_complete_dma()
450 dev_vdbg(host->dev, "DMA complete\n"); in dw_mci_dmac_complete_dma()
452 if ((host->use_dma == TRANS_MODE_EDMAC) && in dw_mci_dmac_complete_dma()
455 dma_sync_sg_for_cpu(mmc_dev(host->cur_slot->mmc), in dw_mci_dmac_complete_dma()
460 host->dma_ops->cleanup(host); in dw_mci_dmac_complete_dma()
467 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_dmac_complete_dma()
468 tasklet_schedule(&host->tasklet); in dw_mci_dmac_complete_dma()
472 static int dw_mci_idmac_init(struct dw_mci *host) in dw_mci_idmac_init() argument
476 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
479 host->ring_size = in dw_mci_idmac_init()
483 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; in dw_mci_idmac_init()
485 p->des6 = (host->sg_dma + in dw_mci_idmac_init()
489 p->des7 = (u64)(host->sg_dma + in dw_mci_idmac_init()
500 p->des6 = host->sg_dma & 0xffffffff; in dw_mci_idmac_init()
501 p->des7 = (u64)host->sg_dma >> 32; in dw_mci_idmac_init()
507 host->ring_size = in dw_mci_idmac_init()
511 for (i = 0, p = host->sg_cpu; in dw_mci_idmac_init()
512 i < host->ring_size - 1; in dw_mci_idmac_init()
514 p->des3 = cpu_to_le32(host->sg_dma + in dw_mci_idmac_init()
521 p->des3 = cpu_to_le32(host->sg_dma); in dw_mci_idmac_init()
525 dw_mci_idmac_reset(host); in dw_mci_idmac_init()
527 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
529 mci_writel(host, IDSTS64, IDMAC_INT_CLR); in dw_mci_idmac_init()
530 mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
534 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff); in dw_mci_idmac_init()
535 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32); in dw_mci_idmac_init()
539 mci_writel(host, IDSTS, IDMAC_INT_CLR); in dw_mci_idmac_init()
540 mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
544 mci_writel(host, DBADDR, host->sg_dma); in dw_mci_idmac_init()
550 static inline int dw_mci_prepare_desc64(struct dw_mci *host, in dw_mci_prepare_desc64() argument
559 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc64()
617 dev_dbg(host->dev, "desciptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc64()
618 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc64()
619 dw_mci_idmac_init(host); in dw_mci_prepare_desc64()
624 static inline int dw_mci_prepare_desc32(struct dw_mci *host, in dw_mci_prepare_desc32() argument
633 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc32()
693 dev_dbg(host->dev, "desciptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc32()
694 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc32()
695 dw_mci_idmac_init(host); in dw_mci_prepare_desc32()
699 static int dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) in dw_mci_idmac_start_dma() argument
704 if (host->dma_64bit_address == 1) in dw_mci_idmac_start_dma()
705 ret = dw_mci_prepare_desc64(host, host->data, sg_len); in dw_mci_idmac_start_dma()
707 ret = dw_mci_prepare_desc32(host, host->data, sg_len); in dw_mci_idmac_start_dma()
716 dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET); in dw_mci_idmac_start_dma()
717 dw_mci_idmac_reset(host); in dw_mci_idmac_start_dma()
720 temp = mci_readl(host, CTRL); in dw_mci_idmac_start_dma()
722 mci_writel(host, CTRL, temp); in dw_mci_idmac_start_dma()
728 temp = mci_readl(host, BMOD); in dw_mci_idmac_start_dma()
730 mci_writel(host, BMOD, temp); in dw_mci_idmac_start_dma()
733 mci_writel(host, PLDMND, 1); in dw_mci_idmac_start_dma()
747 static void dw_mci_edmac_stop_dma(struct dw_mci *host) in dw_mci_edmac_stop_dma() argument
749 dmaengine_terminate_async(host->dms->ch); in dw_mci_edmac_stop_dma()
752 static int dw_mci_edmac_start_dma(struct dw_mci *host, in dw_mci_edmac_start_dma() argument
757 struct scatterlist *sgl = host->data->sg; in dw_mci_edmac_start_dma()
759 u32 sg_elems = host->data->sg_len; in dw_mci_edmac_start_dma()
761 u32 fifo_offset = host->fifo_reg - host->regs; in dw_mci_edmac_start_dma()
765 cfg.dst_addr = host->phy_regs + fifo_offset; in dw_mci_edmac_start_dma()
771 fifoth_val = mci_readl(host, FIFOTH); in dw_mci_edmac_start_dma()
775 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
780 ret = dmaengine_slave_config(host->dms->ch, &cfg); in dw_mci_edmac_start_dma()
782 dev_err(host->dev, "Failed to config edmac.\n"); in dw_mci_edmac_start_dma()
786 desc = dmaengine_prep_slave_sg(host->dms->ch, sgl, in dw_mci_edmac_start_dma()
790 dev_err(host->dev, "Can't prepare slave sg.\n"); in dw_mci_edmac_start_dma()
796 desc->callback_param = (void *)host; in dw_mci_edmac_start_dma()
800 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
801 dma_sync_sg_for_device(mmc_dev(host->cur_slot->mmc), sgl, in dw_mci_edmac_start_dma()
804 dma_async_issue_pending(host->dms->ch); in dw_mci_edmac_start_dma()
809 static int dw_mci_edmac_init(struct dw_mci *host) in dw_mci_edmac_init() argument
812 host->dms = kzalloc(sizeof(struct dw_mci_dma_slave), GFP_KERNEL); in dw_mci_edmac_init()
813 if (!host->dms) in dw_mci_edmac_init()
816 host->dms->ch = dma_request_slave_channel(host->dev, "rx-tx"); in dw_mci_edmac_init()
817 if (!host->dms->ch) { in dw_mci_edmac_init()
818 dev_err(host->dev, "Failed to get external DMA channel.\n"); in dw_mci_edmac_init()
819 kfree(host->dms); in dw_mci_edmac_init()
820 host->dms = NULL; in dw_mci_edmac_init()
827 static void dw_mci_edmac_exit(struct dw_mci *host) in dw_mci_edmac_exit() argument
829 if (host->dms) { in dw_mci_edmac_exit()
830 if (host->dms->ch) { in dw_mci_edmac_exit()
831 dma_release_channel(host->dms->ch); in dw_mci_edmac_exit()
832 host->dms->ch = NULL; in dw_mci_edmac_exit()
834 kfree(host->dms); in dw_mci_edmac_exit()
835 host->dms = NULL; in dw_mci_edmac_exit()
848 static int dw_mci_pre_dma_transfer(struct dw_mci *host, in dw_mci_pre_dma_transfer() argument
874 sg_len = dma_map_sg(host->dev, in dw_mci_pre_dma_transfer()
894 if (!slot->host->use_dma || !data) in dw_mci_pre_req()
902 if (dw_mci_pre_dma_transfer(slot->host, mrq->data, 1) < 0) in dw_mci_pre_req()
913 if (!slot->host->use_dma || !data) in dw_mci_post_req()
917 dma_unmap_sg(slot->host->dev, in dw_mci_post_req()
924 static void dw_mci_adjust_fifoth(struct dw_mci *host, struct mmc_data *data) in dw_mci_adjust_fifoth() argument
928 u32 fifo_width = 1 << host->data_shift; in dw_mci_adjust_fifoth()
934 if (!host->use_dma) in dw_mci_adjust_fifoth()
937 tx_wmark = (host->fifo_depth) / 2; in dw_mci_adjust_fifoth()
938 tx_wmark_invers = host->fifo_depth - tx_wmark; in dw_mci_adjust_fifoth()
961 mci_writel(host, FIFOTH, fifoth_val); in dw_mci_adjust_fifoth()
964 static void dw_mci_ctrl_thld(struct dw_mci *host, struct mmc_data *data) in dw_mci_ctrl_thld() argument
975 if (host->verid < DW_MMC_240A || in dw_mci_ctrl_thld()
976 (host->verid < DW_MMC_280A && data->flags & MMC_DATA_WRITE)) in dw_mci_ctrl_thld()
984 !(host->timing != MMC_TIMING_MMC_HS400)) in dw_mci_ctrl_thld()
992 if (host->timing != MMC_TIMING_MMC_HS200 && in dw_mci_ctrl_thld()
993 host->timing != MMC_TIMING_UHS_SDR104) in dw_mci_ctrl_thld()
996 blksz_depth = blksz / (1 << host->data_shift); in dw_mci_ctrl_thld()
997 fifo_depth = host->fifo_depth; in dw_mci_ctrl_thld()
1008 mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable)); in dw_mci_ctrl_thld()
1012 mci_writel(host, CDTHRCTL, 0); in dw_mci_ctrl_thld()
1015 static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data_dma() argument
1021 host->using_dma = 0; in dw_mci_submit_data_dma()
1024 if (!host->use_dma) in dw_mci_submit_data_dma()
1027 sg_len = dw_mci_pre_dma_transfer(host, data, 0); in dw_mci_submit_data_dma()
1029 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1033 host->using_dma = 1; in dw_mci_submit_data_dma()
1035 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_submit_data_dma()
1036 dev_vdbg(host->dev, in dw_mci_submit_data_dma()
1038 (unsigned long)host->sg_cpu, in dw_mci_submit_data_dma()
1039 (unsigned long)host->sg_dma, in dw_mci_submit_data_dma()
1047 if (host->prev_blksz != data->blksz) in dw_mci_submit_data_dma()
1048 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data_dma()
1051 temp = mci_readl(host, CTRL); in dw_mci_submit_data_dma()
1053 mci_writel(host, CTRL, temp); in dw_mci_submit_data_dma()
1056 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1057 temp = mci_readl(host, INTMASK); in dw_mci_submit_data_dma()
1059 mci_writel(host, INTMASK, temp); in dw_mci_submit_data_dma()
1060 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1062 if (host->dma_ops->start(host, sg_len)) { in dw_mci_submit_data_dma()
1063 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1065 dev_dbg(host->dev, in dw_mci_submit_data_dma()
1074 static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data() argument
1082 WARN_ON(host->data); in dw_mci_submit_data()
1083 host->sg = NULL; in dw_mci_submit_data()
1084 host->data = data; in dw_mci_submit_data()
1087 host->dir_status = DW_MCI_RECV_STATUS; in dw_mci_submit_data()
1089 host->dir_status = DW_MCI_SEND_STATUS; in dw_mci_submit_data()
1091 dw_mci_ctrl_thld(host, data); in dw_mci_submit_data()
1093 if (dw_mci_submit_data_dma(host, data)) { in dw_mci_submit_data()
1094 if (host->data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1099 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in dw_mci_submit_data()
1100 host->sg = data->sg; in dw_mci_submit_data()
1101 host->part_buf_start = 0; in dw_mci_submit_data()
1102 host->part_buf_count = 0; in dw_mci_submit_data()
1104 mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); in dw_mci_submit_data()
1106 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data()
1107 temp = mci_readl(host, INTMASK); in dw_mci_submit_data()
1109 mci_writel(host, INTMASK, temp); in dw_mci_submit_data()
1110 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data()
1112 temp = mci_readl(host, CTRL); in dw_mci_submit_data()
1114 mci_writel(host, CTRL, temp); in dw_mci_submit_data()
1121 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_submit_data()
1122 host->prev_blksz = 0; in dw_mci_submit_data()
1129 host->prev_blksz = data->blksz; in dw_mci_submit_data()
1135 struct dw_mci *host = slot->host; in mci_send_cmd() local
1139 mci_writel(host, CMDARG, arg); in mci_send_cmd()
1141 dw_mci_wait_while_busy(host, cmd); in mci_send_cmd()
1142 mci_writel(host, CMD, SDMMC_CMD_START | cmd); in mci_send_cmd()
1145 cmd_status = mci_readl(host, CMD); in mci_send_cmd()
1156 struct dw_mci *host = slot->host; in dw_mci_setup_bus() local
1163 if (host->state == STATE_WAITING_CMD11_DONE) in dw_mci_setup_bus()
1167 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1169 } else if (clock != host->current_speed || force_clkinit) { in dw_mci_setup_bus()
1170 div = host->bus_hz / clock; in dw_mci_setup_bus()
1171 if (host->bus_hz % clock && host->bus_hz > clock) in dw_mci_setup_bus()
1178 div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; in dw_mci_setup_bus()
1183 slot->id, host->bus_hz, clock, in dw_mci_setup_bus()
1184 div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1185 host->bus_hz, div); in dw_mci_setup_bus()
1188 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1189 mci_writel(host, CLKSRC, 0); in dw_mci_setup_bus()
1195 mci_writel(host, CLKDIV, div); in dw_mci_setup_bus()
1204 mci_writel(host, CLKENA, clk_en_a); in dw_mci_setup_bus()
1213 host->current_speed = clock; in dw_mci_setup_bus()
1216 mci_writel(host, CTYPE, (slot->ctype << slot->id)); in dw_mci_setup_bus()
1219 static void __dw_mci_start_request(struct dw_mci *host, in __dw_mci_start_request() argument
1229 host->cur_slot = slot; in __dw_mci_start_request()
1230 host->mrq = mrq; in __dw_mci_start_request()
1232 host->pending_events = 0; in __dw_mci_start_request()
1233 host->completed_events = 0; in __dw_mci_start_request()
1234 host->cmd_status = 0; in __dw_mci_start_request()
1235 host->data_status = 0; in __dw_mci_start_request()
1236 host->dir_status = 0; in __dw_mci_start_request()
1240 mci_writel(host, TMOUT, 0xFFFFFFFF); in __dw_mci_start_request()
1241 mci_writel(host, BYTCNT, data->blksz*data->blocks); in __dw_mci_start_request()
1242 mci_writel(host, BLKSIZ, data->blksz); in __dw_mci_start_request()
1252 dw_mci_submit_data(host, data); in __dw_mci_start_request()
1256 dw_mci_start_command(host, cmd, cmdflags); in __dw_mci_start_request()
1271 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_start_request()
1272 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in __dw_mci_start_request()
1273 mod_timer(&host->cmd11_timer, in __dw_mci_start_request()
1275 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_start_request()
1279 host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); in __dw_mci_start_request()
1281 host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd); in __dw_mci_start_request()
1284 static void dw_mci_start_request(struct dw_mci *host, in dw_mci_start_request() argument
1291 __dw_mci_start_request(host, slot, cmd); in dw_mci_start_request()
1295 static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, in dw_mci_queue_request() argument
1299 host->state); in dw_mci_queue_request()
1303 if (host->state == STATE_WAITING_CMD11_DONE) { in dw_mci_queue_request()
1311 host->state = STATE_IDLE; in dw_mci_queue_request()
1314 if (host->state == STATE_IDLE) { in dw_mci_queue_request()
1315 host->state = STATE_SENDING_CMD; in dw_mci_queue_request()
1316 dw_mci_start_request(host, slot); in dw_mci_queue_request()
1318 list_add_tail(&slot->queue_node, &host->queue); in dw_mci_queue_request()
1325 struct dw_mci *host = slot->host; in dw_mci_request() local
1341 spin_lock_bh(&host->lock); in dw_mci_request()
1343 dw_mci_queue_request(host, slot, mrq); in dw_mci_request()
1345 spin_unlock_bh(&host->lock); in dw_mci_request()
1351 const struct dw_mci_drv_data *drv_data = slot->host->drv_data; in dw_mci_set_ios()
1367 regs = mci_readl(slot->host, UHS_REG); in dw_mci_set_ios()
1377 mci_writel(slot->host, UHS_REG, regs); in dw_mci_set_ios()
1378 slot->host->timing = ios->timing; in dw_mci_set_ios()
1387 drv_data->set_ios(slot->host, ios); in dw_mci_set_ios()
1395 dev_err(slot->host->dev, in dw_mci_set_ios()
1402 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1404 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1407 if (!slot->host->vqmmc_enabled) { in dw_mci_set_ios()
1411 dev_err(slot->host->dev, in dw_mci_set_ios()
1414 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1418 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1422 dw_mci_ctrl_reset(slot->host, in dw_mci_set_ios()
1437 if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) in dw_mci_set_ios()
1439 slot->host->vqmmc_enabled = false; in dw_mci_set_ios()
1441 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1443 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1449 if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) in dw_mci_set_ios()
1450 slot->host->state = STATE_IDLE; in dw_mci_set_ios()
1462 status = mci_readl(slot->host, STATUS); in dw_mci_card_busy()
1470 struct dw_mci *host = slot->host; in dw_mci_switch_voltage() local
1471 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_switch_voltage()
1484 uhs = mci_readl(host, UHS_REG); in dw_mci_switch_voltage()
1500 mci_writel(host, UHS_REG, uhs); in dw_mci_switch_voltage()
1516 mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; in dw_mci_get_ro()
1528 struct dw_mci *host = slot->host; in dw_mci_get_cd() local
1537 present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) in dw_mci_get_cd()
1540 spin_lock_bh(&host->lock); in dw_mci_get_cd()
1548 spin_unlock_bh(&host->lock); in dw_mci_get_cd()
1556 struct dw_mci *host = slot->host; in dw_mci_hw_reset() local
1559 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_hw_reset()
1560 dw_mci_idmac_reset(host); in dw_mci_hw_reset()
1562 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET | in dw_mci_hw_reset()
1572 reset = mci_readl(host, RST_N); in dw_mci_hw_reset()
1574 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1577 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1584 struct dw_mci *host = slot->host; in dw_mci_init_card() local
1596 clk_en_a_old = mci_readl(host, CLKENA); in dw_mci_init_card()
1608 mci_writel(host, CLKENA, clk_en_a); in dw_mci_init_card()
1618 struct dw_mci *host = slot->host; in dw_mci_enable_sdio_irq() local
1622 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_enable_sdio_irq()
1625 int_mask = mci_readl(host, INTMASK); in dw_mci_enable_sdio_irq()
1630 mci_writel(host, INTMASK, int_mask); in dw_mci_enable_sdio_irq()
1632 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_enable_sdio_irq()
1638 struct dw_mci *host = slot->host; in dw_mci_execute_tuning() local
1639 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_execute_tuning()
1651 struct dw_mci *host = slot->host; in dw_mci_prepare_hs400_tuning() local
1652 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_prepare_hs400_tuning()
1655 return drv_data->prepare_hs400_tuning(host, ios); in dw_mci_prepare_hs400_tuning()
1676 static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) in dw_mci_request_end() argument
1677 __releases(&host->lock) in dw_mci_request_end()
1678 __acquires(&host->lock) in dw_mci_request_end()
1681 struct mmc_host *prev_mmc = host->cur_slot->mmc; in dw_mci_request_end()
1683 WARN_ON(host->cmd || host->data); in dw_mci_request_end()
1685 host->cur_slot->mrq = NULL; in dw_mci_request_end()
1686 host->mrq = NULL; in dw_mci_request_end()
1687 if (!list_empty(&host->queue)) { in dw_mci_request_end()
1688 slot = list_entry(host->queue.next, in dw_mci_request_end()
1691 dev_vdbg(host->dev, "list not empty: %s is next\n", in dw_mci_request_end()
1693 host->state = STATE_SENDING_CMD; in dw_mci_request_end()
1694 dw_mci_start_request(host, slot); in dw_mci_request_end()
1696 dev_vdbg(host->dev, "list empty\n"); in dw_mci_request_end()
1698 if (host->state == STATE_SENDING_CMD11) in dw_mci_request_end()
1699 host->state = STATE_WAITING_CMD11_DONE; in dw_mci_request_end()
1701 host->state = STATE_IDLE; in dw_mci_request_end()
1704 spin_unlock(&host->lock); in dw_mci_request_end()
1706 spin_lock(&host->lock); in dw_mci_request_end()
1709 static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_command_complete() argument
1711 u32 status = host->cmd_status; in dw_mci_command_complete()
1713 host->cmd_status = 0; in dw_mci_command_complete()
1718 cmd->resp[3] = mci_readl(host, RESP0); in dw_mci_command_complete()
1719 cmd->resp[2] = mci_readl(host, RESP1); in dw_mci_command_complete()
1720 cmd->resp[1] = mci_readl(host, RESP2); in dw_mci_command_complete()
1721 cmd->resp[0] = mci_readl(host, RESP3); in dw_mci_command_complete()
1723 cmd->resp[0] = mci_readl(host, RESP0); in dw_mci_command_complete()
1742 static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data) in dw_mci_data_complete() argument
1744 u32 status = host->data_status; in dw_mci_data_complete()
1752 if (host->dir_status == in dw_mci_data_complete()
1761 } else if (host->dir_status == in dw_mci_data_complete()
1770 dev_dbg(host->dev, "data error, status 0x%08x\n", status); in dw_mci_data_complete()
1776 dw_mci_reset(host); in dw_mci_data_complete()
1785 static void dw_mci_set_drto(struct dw_mci *host) in dw_mci_set_drto() argument
1790 drto_clks = mci_readl(host, TMOUT) >> 8; in dw_mci_set_drto()
1791 drto_ms = DIV_ROUND_UP(drto_clks, host->bus_hz / 1000); in dw_mci_set_drto()
1796 mod_timer(&host->dto_timer, jiffies + msecs_to_jiffies(drto_ms)); in dw_mci_set_drto()
1801 struct dw_mci *host = (struct dw_mci *)priv; in dw_mci_tasklet_func() local
1809 spin_lock(&host->lock); in dw_mci_tasklet_func()
1811 state = host->state; in dw_mci_tasklet_func()
1812 data = host->data; in dw_mci_tasklet_func()
1813 mrq = host->mrq; in dw_mci_tasklet_func()
1826 &host->pending_events)) in dw_mci_tasklet_func()
1829 cmd = host->cmd; in dw_mci_tasklet_func()
1830 host->cmd = NULL; in dw_mci_tasklet_func()
1831 set_bit(EVENT_CMD_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
1832 err = dw_mci_command_complete(host, cmd); in dw_mci_tasklet_func()
1835 __dw_mci_start_request(host, host->cur_slot, in dw_mci_tasklet_func()
1868 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
1869 send_stop_abort(host, data); in dw_mci_tasklet_func()
1875 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
1892 &host->pending_events)) { in dw_mci_tasklet_func()
1893 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
1895 !(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
1897 send_stop_abort(host, data); in dw_mci_tasklet_func()
1903 &host->pending_events)) { in dw_mci_tasklet_func()
1908 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
1909 dw_mci_set_drto(host); in dw_mci_tasklet_func()
1913 set_bit(EVENT_XFER_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
1929 &host->pending_events)) { in dw_mci_tasklet_func()
1930 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
1932 !(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
1934 send_stop_abort(host, data); in dw_mci_tasklet_func()
1944 &host->pending_events)) { in dw_mci_tasklet_func()
1950 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
1951 dw_mci_set_drto(host); in dw_mci_tasklet_func()
1955 host->data = NULL; in dw_mci_tasklet_func()
1956 set_bit(EVENT_DATA_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
1957 err = dw_mci_data_complete(host, data); in dw_mci_tasklet_func()
1963 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
1969 send_stop_abort(host, data); in dw_mci_tasklet_func()
1981 &host->pending_events)) { in dw_mci_tasklet_func()
1982 host->cmd = NULL; in dw_mci_tasklet_func()
1983 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
1998 &host->pending_events)) in dw_mci_tasklet_func()
2003 dw_mci_reset(host); in dw_mci_tasklet_func()
2005 host->cmd = NULL; in dw_mci_tasklet_func()
2006 host->data = NULL; in dw_mci_tasklet_func()
2009 dw_mci_command_complete(host, mrq->stop); in dw_mci_tasklet_func()
2011 host->cmd_status = 0; in dw_mci_tasklet_func()
2013 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2018 &host->pending_events)) in dw_mci_tasklet_func()
2026 host->state = state; in dw_mci_tasklet_func()
2028 spin_unlock(&host->lock); in dw_mci_tasklet_func()
2033 static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_set_part_bytes() argument
2035 memcpy((void *)&host->part_buf, buf, cnt); in dw_mci_set_part_bytes()
2036 host->part_buf_count = cnt; in dw_mci_set_part_bytes()
2040 static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_part_bytes() argument
2042 cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); in dw_mci_push_part_bytes()
2043 memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); in dw_mci_push_part_bytes()
2044 host->part_buf_count += cnt; in dw_mci_push_part_bytes()
2049 static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_part_bytes() argument
2051 cnt = min_t(int, cnt, host->part_buf_count); in dw_mci_pull_part_bytes()
2053 memcpy(buf, (void *)&host->part_buf + host->part_buf_start, in dw_mci_pull_part_bytes()
2055 host->part_buf_count -= cnt; in dw_mci_pull_part_bytes()
2056 host->part_buf_start += cnt; in dw_mci_pull_part_bytes()
2062 static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_final_bytes() argument
2064 memcpy(buf, &host->part_buf, cnt); in dw_mci_pull_final_bytes()
2065 host->part_buf_start = cnt; in dw_mci_pull_final_bytes()
2066 host->part_buf_count = (1 << host->data_shift) - cnt; in dw_mci_pull_final_bytes()
2069 static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data16() argument
2071 struct mmc_data *data = host->data; in dw_mci_push_data16()
2075 if (unlikely(host->part_buf_count)) { in dw_mci_push_data16()
2076 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2080 if (host->part_buf_count == 2) { in dw_mci_push_data16()
2081 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2082 host->part_buf_count = 0; in dw_mci_push_data16()
2098 mci_fifo_writew(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data16()
2106 mci_fifo_writew(host->fifo_reg, *pdata++); in dw_mci_push_data16()
2111 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2115 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2119 static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data16() argument
2131 aligned_buf[i] = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2143 *pdata++ = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2147 host->part_buf16 = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2148 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data16()
2152 static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data32() argument
2154 struct mmc_data *data = host->data; in dw_mci_push_data32()
2158 if (unlikely(host->part_buf_count)) { in dw_mci_push_data32()
2159 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2163 if (host->part_buf_count == 4) { in dw_mci_push_data32()
2164 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2165 host->part_buf_count = 0; in dw_mci_push_data32()
2181 mci_fifo_writel(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data32()
2189 mci_fifo_writel(host->fifo_reg, *pdata++); in dw_mci_push_data32()
2194 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2198 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2202 static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data32() argument
2214 aligned_buf[i] = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2226 *pdata++ = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2230 host->part_buf32 = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2231 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data32()
2235 static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data64() argument
2237 struct mmc_data *data = host->data; in dw_mci_push_data64()
2241 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64()
2242 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2247 if (host->part_buf_count == 8) { in dw_mci_push_data64()
2248 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2249 host->part_buf_count = 0; in dw_mci_push_data64()
2265 mci_fifo_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64()
2273 mci_fifo_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64()
2278 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2282 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2286 static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data64() argument
2298 aligned_buf[i] = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2311 *pdata++ = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2315 host->part_buf = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2316 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data64()
2320 static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data() argument
2325 len = dw_mci_pull_part_bytes(host, buf, cnt); in dw_mci_pull_data()
2332 host->pull_data(host, buf, cnt); in dw_mci_pull_data()
2335 static void dw_mci_read_data_pio(struct dw_mci *host, bool dto) in dw_mci_read_data_pio() argument
2337 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_read_data_pio()
2340 struct mmc_data *data = host->data; in dw_mci_read_data_pio()
2341 int shift = host->data_shift; in dw_mci_read_data_pio()
2350 host->sg = sg_miter->piter.sg; in dw_mci_read_data_pio()
2356 fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) in dw_mci_read_data_pio()
2357 << shift) + host->part_buf_count; in dw_mci_read_data_pio()
2361 dw_mci_pull_data(host, (void *)(buf + offset), len); in dw_mci_read_data_pio()
2368 status = mci_readl(host, MINTSTS); in dw_mci_read_data_pio()
2369 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_read_data_pio()
2372 (dto && SDMMC_GET_FCNT(mci_readl(host, STATUS)))); in dw_mci_read_data_pio()
2384 host->sg = NULL; in dw_mci_read_data_pio()
2386 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_read_data_pio()
2389 static void dw_mci_write_data_pio(struct dw_mci *host) in dw_mci_write_data_pio() argument
2391 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_write_data_pio()
2394 struct mmc_data *data = host->data; in dw_mci_write_data_pio()
2395 int shift = host->data_shift; in dw_mci_write_data_pio()
2398 unsigned int fifo_depth = host->fifo_depth; in dw_mci_write_data_pio()
2405 host->sg = sg_miter->piter.sg; in dw_mci_write_data_pio()
2412 SDMMC_GET_FCNT(mci_readl(host, STATUS))) in dw_mci_write_data_pio()
2413 << shift) - host->part_buf_count; in dw_mci_write_data_pio()
2417 host->push_data(host, (void *)(buf + offset), len); in dw_mci_write_data_pio()
2424 status = mci_readl(host, MINTSTS); in dw_mci_write_data_pio()
2425 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_write_data_pio()
2438 host->sg = NULL; in dw_mci_write_data_pio()
2440 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_write_data_pio()
2443 static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) in dw_mci_cmd_interrupt() argument
2445 if (!host->cmd_status) in dw_mci_cmd_interrupt()
2446 host->cmd_status = status; in dw_mci_cmd_interrupt()
2450 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd_interrupt()
2451 tasklet_schedule(&host->tasklet); in dw_mci_cmd_interrupt()
2454 static void dw_mci_handle_cd(struct dw_mci *host) in dw_mci_handle_cd() argument
2458 for (i = 0; i < host->num_slots; i++) { in dw_mci_handle_cd()
2459 struct dw_mci_slot *slot = host->slot[i]; in dw_mci_handle_cd()
2467 msecs_to_jiffies(host->pdata->detect_delay_ms)); in dw_mci_handle_cd()
2473 struct dw_mci *host = dev_id; in dw_mci_interrupt() local
2477 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_interrupt()
2481 if ((host->state == STATE_SENDING_CMD11) && in dw_mci_interrupt()
2485 mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH); in dw_mci_interrupt()
2492 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_interrupt()
2493 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2494 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_interrupt()
2496 del_timer(&host->cmd11_timer); in dw_mci_interrupt()
2500 mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); in dw_mci_interrupt()
2501 host->cmd_status = pending; in dw_mci_interrupt()
2503 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2508 mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); in dw_mci_interrupt()
2509 host->data_status = pending; in dw_mci_interrupt()
2511 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_interrupt()
2512 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2516 del_timer(&host->dto_timer); in dw_mci_interrupt()
2518 mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); in dw_mci_interrupt()
2519 if (!host->data_status) in dw_mci_interrupt()
2520 host->data_status = pending; in dw_mci_interrupt()
2522 if (host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_interrupt()
2523 if (host->sg != NULL) in dw_mci_interrupt()
2524 dw_mci_read_data_pio(host, true); in dw_mci_interrupt()
2526 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2527 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2531 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_interrupt()
2532 if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) in dw_mci_interrupt()
2533 dw_mci_read_data_pio(host, false); in dw_mci_interrupt()
2537 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_interrupt()
2538 if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) in dw_mci_interrupt()
2539 dw_mci_write_data_pio(host); in dw_mci_interrupt()
2543 mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); in dw_mci_interrupt()
2544 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2548 mci_writel(host, RINTSTS, SDMMC_INT_CD); in dw_mci_interrupt()
2549 dw_mci_handle_cd(host); in dw_mci_interrupt()
2553 for (i = 0; i < host->num_slots; i++) { in dw_mci_interrupt()
2554 struct dw_mci_slot *slot = host->slot[i]; in dw_mci_interrupt()
2560 mci_writel(host, RINTSTS, in dw_mci_interrupt()
2568 if (host->use_dma != TRANS_MODE_IDMAC) in dw_mci_interrupt()
2572 if (host->dma_64bit_address == 1) { in dw_mci_interrupt()
2573 pending = mci_readl(host, IDSTS64); in dw_mci_interrupt()
2575 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2577 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2578 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2579 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2582 pending = mci_readl(host, IDSTS); in dw_mci_interrupt()
2584 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2586 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2587 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2588 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2595 static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) in dw_mci_init_slot() argument
2599 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_init_slot()
2603 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); in dw_mci_init_slot()
2609 slot->sdio_id = host->sdio_id0 + id; in dw_mci_init_slot()
2611 slot->host = host; in dw_mci_init_slot()
2612 host->slot[id] = slot; in dw_mci_init_slot()
2615 if (device_property_read_u32_array(host->dev, "clock-freq-min-max", in dw_mci_init_slot()
2632 if (host->pdata->caps) in dw_mci_init_slot()
2633 mmc->caps = host->pdata->caps; in dw_mci_init_slot()
2641 if (host->pdata->pm_caps) in dw_mci_init_slot()
2642 mmc->pm_caps = host->pdata->pm_caps; in dw_mci_init_slot()
2644 if (host->dev->of_node) { in dw_mci_init_slot()
2645 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); in dw_mci_init_slot()
2649 ctrl_id = to_platform_device(host->dev)->id; in dw_mci_init_slot()
2654 if (host->pdata->caps2) in dw_mci_init_slot()
2655 mmc->caps2 = host->pdata->caps2; in dw_mci_init_slot()
2662 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_slot()
2663 mmc->max_segs = host->ring_size; in dw_mci_init_slot()
2666 mmc->max_req_size = mmc->max_seg_size * host->ring_size; in dw_mci_init_slot()
2668 } else if (host->use_dma == TRANS_MODE_EDMAC) { in dw_mci_init_slot()
2706 slot->host->slot[id] = NULL; in dw_mci_cleanup_slot()
2710 static void dw_mci_init_dma(struct dw_mci *host) in dw_mci_init_dma() argument
2713 struct device *dev = host->dev; in dw_mci_init_dma()
2726 host->use_dma = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON)); in dw_mci_init_dma()
2727 if (host->use_dma == DMA_INTERFACE_IDMA) { in dw_mci_init_dma()
2728 host->use_dma = TRANS_MODE_IDMAC; in dw_mci_init_dma()
2729 } else if (host->use_dma == DMA_INTERFACE_DWDMA || in dw_mci_init_dma()
2730 host->use_dma == DMA_INTERFACE_GDMA) { in dw_mci_init_dma()
2731 host->use_dma = TRANS_MODE_EDMAC; in dw_mci_init_dma()
2737 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_dma()
2742 addr_config = SDMMC_GET_ADDR_CONFIG(mci_readl(host, HCON)); in dw_mci_init_dma()
2746 host->dma_64bit_address = 1; in dw_mci_init_dma()
2747 dev_info(host->dev, in dw_mci_init_dma()
2749 if (!dma_set_mask(host->dev, DMA_BIT_MASK(64))) in dw_mci_init_dma()
2750 dma_set_coherent_mask(host->dev, in dw_mci_init_dma()
2754 host->dma_64bit_address = 0; in dw_mci_init_dma()
2755 dev_info(host->dev, in dw_mci_init_dma()
2760 host->sg_cpu = dmam_alloc_coherent(host->dev, in dw_mci_init_dma()
2762 &host->sg_dma, GFP_KERNEL); in dw_mci_init_dma()
2763 if (!host->sg_cpu) { in dw_mci_init_dma()
2764 dev_err(host->dev, in dw_mci_init_dma()
2770 host->dma_ops = &dw_mci_idmac_ops; in dw_mci_init_dma()
2771 dev_info(host->dev, "Using internal DMA controller.\n"); in dw_mci_init_dma()
2779 host->dma_ops = &dw_mci_edmac_ops; in dw_mci_init_dma()
2780 dev_info(host->dev, "Using external DMA controller.\n"); in dw_mci_init_dma()
2783 if (host->dma_ops->init && host->dma_ops->start && in dw_mci_init_dma()
2784 host->dma_ops->stop && host->dma_ops->cleanup) { in dw_mci_init_dma()
2785 if (host->dma_ops->init(host)) { in dw_mci_init_dma()
2786 dev_err(host->dev, "%s: Unable to initialize DMA Controller.\n", in dw_mci_init_dma()
2791 dev_err(host->dev, "DMA initialization not found.\n"); in dw_mci_init_dma()
2798 dev_info(host->dev, "Using PIO mode.\n"); in dw_mci_init_dma()
2799 host->use_dma = TRANS_MODE_PIO; in dw_mci_init_dma()
2802 static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset) in dw_mci_ctrl_reset() argument
2807 ctrl = mci_readl(host, CTRL); in dw_mci_ctrl_reset()
2809 mci_writel(host, CTRL, ctrl); in dw_mci_ctrl_reset()
2813 ctrl = mci_readl(host, CTRL); in dw_mci_ctrl_reset()
2818 dev_err(host->dev, in dw_mci_ctrl_reset()
2825 static bool dw_mci_reset(struct dw_mci *host) in dw_mci_reset() argument
2834 if (host->sg) { in dw_mci_reset()
2835 sg_miter_stop(&host->sg_miter); in dw_mci_reset()
2836 host->sg = NULL; in dw_mci_reset()
2839 if (host->use_dma) in dw_mci_reset()
2842 if (dw_mci_ctrl_reset(host, flags)) { in dw_mci_reset()
2847 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_reset()
2850 if (host->use_dma) { in dw_mci_reset()
2855 status = mci_readl(host, STATUS); in dw_mci_reset()
2862 dev_err(host->dev, in dw_mci_reset()
2869 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET)) in dw_mci_reset()
2874 if (!(mci_readl(host, CTRL) & SDMMC_CTRL_RESET)) { in dw_mci_reset()
2875 dev_err(host->dev, in dw_mci_reset()
2882 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_reset()
2884 dw_mci_idmac_init(host); in dw_mci_reset()
2890 mci_send_cmd(host->cur_slot, SDMMC_CMD_UPD_CLK, 0); in dw_mci_reset()
2897 struct dw_mci *host = (struct dw_mci *)arg; in dw_mci_cmd11_timer() local
2899 if (host->state != STATE_SENDING_CMD11) { in dw_mci_cmd11_timer()
2900 dev_warn(host->dev, "Unexpected CMD11 timeout\n"); in dw_mci_cmd11_timer()
2904 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cmd11_timer()
2905 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd11_timer()
2906 tasklet_schedule(&host->tasklet); in dw_mci_cmd11_timer()
2911 struct dw_mci *host = (struct dw_mci *)arg; in dw_mci_dto_timer() local
2913 switch (host->state) { in dw_mci_dto_timer()
2921 host->data_status = SDMMC_INT_DRTO; in dw_mci_dto_timer()
2922 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_dto_timer()
2923 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_dto_timer()
2924 tasklet_schedule(&host->tasklet); in dw_mci_dto_timer()
2932 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
2935 struct device *dev = host->dev; in dw_mci_parse_dt()
2936 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_parse_dt()
2965 ret = drv_data->parse_dt(host); in dw_mci_parse_dt()
2974 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
2980 static void dw_mci_enable_cd(struct dw_mci *host) in dw_mci_enable_cd() argument
2991 for (i = 0; i < host->num_slots; i++) { in dw_mci_enable_cd()
2992 slot = host->slot[i]; in dw_mci_enable_cd()
2999 if (i == host->num_slots) in dw_mci_enable_cd()
3002 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3003 temp = mci_readl(host, INTMASK); in dw_mci_enable_cd()
3005 mci_writel(host, INTMASK, temp); in dw_mci_enable_cd()
3006 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3009 int dw_mci_probe(struct dw_mci *host) in dw_mci_probe() argument
3011 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_probe()
3016 if (!host->pdata) { in dw_mci_probe()
3017 host->pdata = dw_mci_parse_dt(host); in dw_mci_probe()
3018 if (PTR_ERR(host->pdata) == -EPROBE_DEFER) { in dw_mci_probe()
3020 } else if (IS_ERR(host->pdata)) { in dw_mci_probe()
3021 dev_err(host->dev, "platform data not available\n"); in dw_mci_probe()
3026 host->biu_clk = devm_clk_get(host->dev, "biu"); in dw_mci_probe()
3027 if (IS_ERR(host->biu_clk)) { in dw_mci_probe()
3028 dev_dbg(host->dev, "biu clock not available\n"); in dw_mci_probe()
3030 ret = clk_prepare_enable(host->biu_clk); in dw_mci_probe()
3032 dev_err(host->dev, "failed to enable biu clock\n"); in dw_mci_probe()
3037 host->ciu_clk = devm_clk_get(host->dev, "ciu"); in dw_mci_probe()
3038 if (IS_ERR(host->ciu_clk)) { in dw_mci_probe()
3039 dev_dbg(host->dev, "ciu clock not available\n"); in dw_mci_probe()
3040 host->bus_hz = host->pdata->bus_hz; in dw_mci_probe()
3042 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_probe()
3044 dev_err(host->dev, "failed to enable ciu clock\n"); in dw_mci_probe()
3048 if (host->pdata->bus_hz) { in dw_mci_probe()
3049 ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz); in dw_mci_probe()
3051 dev_warn(host->dev, in dw_mci_probe()
3053 host->pdata->bus_hz); in dw_mci_probe()
3055 host->bus_hz = clk_get_rate(host->ciu_clk); in dw_mci_probe()
3058 if (!host->bus_hz) { in dw_mci_probe()
3059 dev_err(host->dev, in dw_mci_probe()
3066 ret = drv_data->init(host); in dw_mci_probe()
3068 dev_err(host->dev, in dw_mci_probe()
3074 if (!IS_ERR(host->pdata->rstc)) { in dw_mci_probe()
3075 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3077 reset_control_deassert(host->pdata->rstc); in dw_mci_probe()
3080 setup_timer(&host->cmd11_timer, in dw_mci_probe()
3081 dw_mci_cmd11_timer, (unsigned long)host); in dw_mci_probe()
3083 setup_timer(&host->dto_timer, in dw_mci_probe()
3084 dw_mci_dto_timer, (unsigned long)host); in dw_mci_probe()
3086 spin_lock_init(&host->lock); in dw_mci_probe()
3087 spin_lock_init(&host->irq_lock); in dw_mci_probe()
3088 INIT_LIST_HEAD(&host->queue); in dw_mci_probe()
3094 i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON)); in dw_mci_probe()
3096 host->push_data = dw_mci_push_data16; in dw_mci_probe()
3097 host->pull_data = dw_mci_pull_data16; in dw_mci_probe()
3099 host->data_shift = 1; in dw_mci_probe()
3101 host->push_data = dw_mci_push_data64; in dw_mci_probe()
3102 host->pull_data = dw_mci_pull_data64; in dw_mci_probe()
3104 host->data_shift = 3; in dw_mci_probe()
3110 host->push_data = dw_mci_push_data32; in dw_mci_probe()
3111 host->pull_data = dw_mci_pull_data32; in dw_mci_probe()
3113 host->data_shift = 2; in dw_mci_probe()
3117 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_probe()
3122 host->dma_ops = host->pdata->dma_ops; in dw_mci_probe()
3123 dw_mci_init_dma(host); in dw_mci_probe()
3126 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_probe()
3127 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_probe()
3130 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_probe()
3136 if (!host->pdata->fifo_depth) { in dw_mci_probe()
3143 fifo_size = mci_readl(host, FIFOTH); in dw_mci_probe()
3146 fifo_size = host->pdata->fifo_depth; in dw_mci_probe()
3148 host->fifo_depth = fifo_size; in dw_mci_probe()
3149 host->fifoth_val = in dw_mci_probe()
3151 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_probe()
3154 mci_writel(host, CLKENA, 0); in dw_mci_probe()
3155 mci_writel(host, CLKSRC, 0); in dw_mci_probe()
3161 host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); in dw_mci_probe()
3162 dev_info(host->dev, "Version ID is %04x\n", host->verid); in dw_mci_probe()
3164 if (host->verid < DW_MMC_240A) in dw_mci_probe()
3165 host->fifo_reg = host->regs + DATA_OFFSET; in dw_mci_probe()
3167 host->fifo_reg = host->regs + DATA_240A_OFFSET; in dw_mci_probe()
3169 tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); in dw_mci_probe()
3170 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, in dw_mci_probe()
3171 host->irq_flags, "dw-mci", host); in dw_mci_probe()
3175 if (host->pdata->num_slots) in dw_mci_probe()
3176 host->num_slots = host->pdata->num_slots; in dw_mci_probe()
3178 host->num_slots = 1; in dw_mci_probe()
3180 if (host->num_slots < 1 || in dw_mci_probe()
3181 host->num_slots > SDMMC_GET_SLOT_NUM(mci_readl(host, HCON))) { in dw_mci_probe()
3182 dev_err(host->dev, in dw_mci_probe()
3192 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_probe()
3196 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_probe()
3198 dev_info(host->dev, in dw_mci_probe()
3200 host->irq, width, fifo_size); in dw_mci_probe()
3203 for (i = 0; i < host->num_slots; i++) { in dw_mci_probe()
3204 ret = dw_mci_init_slot(host, i); in dw_mci_probe()
3206 dev_dbg(host->dev, "slot %d init failed\n", i); in dw_mci_probe()
3212 dev_info(host->dev, "%d slots initialized\n", init_slots); in dw_mci_probe()
3214 dev_dbg(host->dev, in dw_mci_probe()
3216 host->num_slots); in dw_mci_probe()
3221 dw_mci_enable_cd(host); in dw_mci_probe()
3226 if (host->use_dma && host->dma_ops->exit) in dw_mci_probe()
3227 host->dma_ops->exit(host); in dw_mci_probe()
3229 if (!IS_ERR(host->pdata->rstc)) in dw_mci_probe()
3230 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3233 clk_disable_unprepare(host->ciu_clk); in dw_mci_probe()
3236 clk_disable_unprepare(host->biu_clk); in dw_mci_probe()
3242 void dw_mci_remove(struct dw_mci *host) in dw_mci_remove() argument
3246 for (i = 0; i < host->num_slots; i++) { in dw_mci_remove()
3247 dev_dbg(host->dev, "remove slot %d\n", i); in dw_mci_remove()
3248 if (host->slot[i]) in dw_mci_remove()
3249 dw_mci_cleanup_slot(host->slot[i], i); in dw_mci_remove()
3252 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_remove()
3253 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_remove()
3256 mci_writel(host, CLKENA, 0); in dw_mci_remove()
3257 mci_writel(host, CLKSRC, 0); in dw_mci_remove()
3259 if (host->use_dma && host->dma_ops->exit) in dw_mci_remove()
3260 host->dma_ops->exit(host); in dw_mci_remove()
3262 if (!IS_ERR(host->pdata->rstc)) in dw_mci_remove()
3263 reset_control_assert(host->pdata->rstc); in dw_mci_remove()
3265 clk_disable_unprepare(host->ciu_clk); in dw_mci_remove()
3266 clk_disable_unprepare(host->biu_clk); in dw_mci_remove()
3276 int dw_mci_suspend(struct dw_mci *host) in dw_mci_suspend() argument
3278 if (host->use_dma && host->dma_ops->exit) in dw_mci_suspend()
3279 host->dma_ops->exit(host); in dw_mci_suspend()
3285 int dw_mci_resume(struct dw_mci *host) in dw_mci_resume() argument
3289 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_resume()
3294 if (host->use_dma && host->dma_ops->init) in dw_mci_resume()
3295 host->dma_ops->init(host); in dw_mci_resume()
3301 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_resume()
3302 host->prev_blksz = 0; in dw_mci_resume()
3305 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_resume()
3307 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_resume()
3308 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_resume()
3311 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_resume()
3313 for (i = 0; i < host->num_slots; i++) { in dw_mci_resume()
3314 struct dw_mci_slot *slot = host->slot[i]; in dw_mci_resume()
3325 dw_mci_enable_cd(host); in dw_mci_resume()