Lines Matching refs:host
153 static inline unsigned int hinfc_read(struct hinfc_host *host, unsigned int reg) in hinfc_read() argument
155 return readl(host->iobase + reg); in hinfc_read()
158 static inline void hinfc_write(struct hinfc_host *host, unsigned int value, in hinfc_write() argument
161 writel(value, host->iobase + reg); in hinfc_write()
164 static void wait_controller_finished(struct hinfc_host *host) in wait_controller_finished() argument
170 val = hinfc_read(host, HINFC504_STATUS); in wait_controller_finished()
171 if (host->command == NAND_CMD_ERASE2) { in wait_controller_finished()
175 val = hinfc_read(host, HINFC504_STATUS); in wait_controller_finished()
185 dev_err(host->dev, "Wait NAND controller exec cmd timeout.\n"); in wait_controller_finished()
188 static void hisi_nfc_dma_transfer(struct hinfc_host *host, int todev) in hisi_nfc_dma_transfer() argument
190 struct nand_chip *chip = &host->chip; in hisi_nfc_dma_transfer()
195 hinfc_write(host, host->dma_buffer, HINFC504_DMA_ADDR_DATA); in hisi_nfc_dma_transfer()
196 hinfc_write(host, host->dma_oob, HINFC504_DMA_ADDR_OOB); in hisi_nfc_dma_transfer()
199 hinfc_write(host, ((mtd->oobsize & HINFC504_DMA_LEN_OOB_MASK) in hisi_nfc_dma_transfer()
202 hinfc_write(host, HINFC504_DMA_PARA_DATA_RW_EN in hisi_nfc_dma_transfer()
205 if (host->command == NAND_CMD_READOOB) in hisi_nfc_dma_transfer()
206 hinfc_write(host, HINFC504_DMA_PARA_OOB_RW_EN in hisi_nfc_dma_transfer()
210 hinfc_write(host, HINFC504_DMA_PARA_DATA_RW_EN in hisi_nfc_dma_transfer()
222 | ((host->addr_cycle == 4 ? 1 : 0) in hisi_nfc_dma_transfer()
224 | ((host->chipselect & HINFC504_DMA_CTRL_CS_MASK) in hisi_nfc_dma_transfer()
230 init_completion(&host->cmd_complete); in hisi_nfc_dma_transfer()
232 hinfc_write(host, val, HINFC504_DMA_CTRL); in hisi_nfc_dma_transfer()
233 ret = wait_for_completion_timeout(&host->cmd_complete, in hisi_nfc_dma_transfer()
237 dev_err(host->dev, "DMA operation(irq) timeout!\n"); in hisi_nfc_dma_transfer()
239 val = hinfc_read(host, HINFC504_DMA_CTRL); in hisi_nfc_dma_transfer()
241 dev_err(host->dev, "DMA is already done but without irq ACK!\n"); in hisi_nfc_dma_transfer()
243 dev_err(host->dev, "DMA is really timeout!\n"); in hisi_nfc_dma_transfer()
247 static int hisi_nfc_send_cmd_pageprog(struct hinfc_host *host) in hisi_nfc_send_cmd_pageprog() argument
249 host->addr_value[0] &= 0xffff0000; in hisi_nfc_send_cmd_pageprog()
251 hinfc_write(host, host->addr_value[0], HINFC504_ADDRL); in hisi_nfc_send_cmd_pageprog()
252 hinfc_write(host, host->addr_value[1], HINFC504_ADDRH); in hisi_nfc_send_cmd_pageprog()
253 hinfc_write(host, NAND_CMD_PAGEPROG << 8 | NAND_CMD_SEQIN, in hisi_nfc_send_cmd_pageprog()
256 hisi_nfc_dma_transfer(host, 1); in hisi_nfc_send_cmd_pageprog()
261 static int hisi_nfc_send_cmd_readstart(struct hinfc_host *host) in hisi_nfc_send_cmd_readstart() argument
263 struct mtd_info *mtd = nand_to_mtd(&host->chip); in hisi_nfc_send_cmd_readstart()
265 if ((host->addr_value[0] == host->cache_addr_value[0]) && in hisi_nfc_send_cmd_readstart()
266 (host->addr_value[1] == host->cache_addr_value[1])) in hisi_nfc_send_cmd_readstart()
269 host->addr_value[0] &= 0xffff0000; in hisi_nfc_send_cmd_readstart()
271 hinfc_write(host, host->addr_value[0], HINFC504_ADDRL); in hisi_nfc_send_cmd_readstart()
272 hinfc_write(host, host->addr_value[1], HINFC504_ADDRH); in hisi_nfc_send_cmd_readstart()
273 hinfc_write(host, NAND_CMD_READSTART << 8 | NAND_CMD_READ0, in hisi_nfc_send_cmd_readstart()
276 hinfc_write(host, 0, HINFC504_LOG_READ_ADDR); in hisi_nfc_send_cmd_readstart()
277 hinfc_write(host, mtd->writesize + mtd->oobsize, in hisi_nfc_send_cmd_readstart()
280 hisi_nfc_dma_transfer(host, 0); in hisi_nfc_send_cmd_readstart()
282 host->cache_addr_value[0] = host->addr_value[0]; in hisi_nfc_send_cmd_readstart()
283 host->cache_addr_value[1] = host->addr_value[1]; in hisi_nfc_send_cmd_readstart()
288 static int hisi_nfc_send_cmd_erase(struct hinfc_host *host) in hisi_nfc_send_cmd_erase() argument
290 hinfc_write(host, host->addr_value[0], HINFC504_ADDRL); in hisi_nfc_send_cmd_erase()
291 hinfc_write(host, (NAND_CMD_ERASE2 << 8) | NAND_CMD_ERASE1, in hisi_nfc_send_cmd_erase()
294 hinfc_write(host, HINFC504_OP_WAIT_READY_EN in hisi_nfc_send_cmd_erase()
298 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_erase()
300 | ((host->addr_cycle & HINFC504_OP_ADDR_CYCLE_MASK) in hisi_nfc_send_cmd_erase()
304 wait_controller_finished(host); in hisi_nfc_send_cmd_erase()
309 static int hisi_nfc_send_cmd_readid(struct hinfc_host *host) in hisi_nfc_send_cmd_readid() argument
311 hinfc_write(host, HINFC504_NANDINFO_LEN, HINFC504_DATA_NUM); in hisi_nfc_send_cmd_readid()
312 hinfc_write(host, NAND_CMD_READID, HINFC504_CMD); in hisi_nfc_send_cmd_readid()
313 hinfc_write(host, 0, HINFC504_ADDRL); in hisi_nfc_send_cmd_readid()
315 hinfc_write(host, HINFC504_OP_CMD1_EN | HINFC504_OP_ADDR_EN in hisi_nfc_send_cmd_readid()
317 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_readid()
321 wait_controller_finished(host); in hisi_nfc_send_cmd_readid()
326 static int hisi_nfc_send_cmd_status(struct hinfc_host *host) in hisi_nfc_send_cmd_status() argument
328 hinfc_write(host, HINFC504_NANDINFO_LEN, HINFC504_DATA_NUM); in hisi_nfc_send_cmd_status()
329 hinfc_write(host, NAND_CMD_STATUS, HINFC504_CMD); in hisi_nfc_send_cmd_status()
330 hinfc_write(host, HINFC504_OP_CMD1_EN in hisi_nfc_send_cmd_status()
332 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_status()
336 wait_controller_finished(host); in hisi_nfc_send_cmd_status()
341 static int hisi_nfc_send_cmd_reset(struct hinfc_host *host, int chipselect) in hisi_nfc_send_cmd_reset() argument
343 hinfc_write(host, NAND_CMD_RESET, HINFC504_CMD); in hisi_nfc_send_cmd_reset()
345 hinfc_write(host, HINFC504_OP_CMD1_EN in hisi_nfc_send_cmd_reset()
351 wait_controller_finished(host); in hisi_nfc_send_cmd_reset()
359 struct hinfc_host *host = nand_get_controller_data(chip); in hisi_nfc_select_chip() local
364 host->chipselect = chipselect; in hisi_nfc_select_chip()
370 struct hinfc_host *host = nand_get_controller_data(chip); in hisi_nfc_read_byte() local
372 if (host->command == NAND_CMD_STATUS) in hisi_nfc_read_byte()
373 return *(uint8_t *)(host->mmio); in hisi_nfc_read_byte()
375 host->offset++; in hisi_nfc_read_byte()
377 if (host->command == NAND_CMD_READID) in hisi_nfc_read_byte()
378 return *(uint8_t *)(host->mmio + host->offset - 1); in hisi_nfc_read_byte()
380 return *(uint8_t *)(host->buffer + host->offset - 1); in hisi_nfc_read_byte()
386 struct hinfc_host *host = nand_get_controller_data(chip); in hisi_nfc_read_word() local
388 host->offset += 2; in hisi_nfc_read_word()
389 return *(u16 *)(host->buffer + host->offset - 2); in hisi_nfc_read_word()
396 struct hinfc_host *host = nand_get_controller_data(chip); in hisi_nfc_write_buf() local
398 memcpy(host->buffer + host->offset, buf, len); in hisi_nfc_write_buf()
399 host->offset += len; in hisi_nfc_write_buf()
405 struct hinfc_host *host = nand_get_controller_data(chip); in hisi_nfc_read_buf() local
407 memcpy(buf, host->buffer + host->offset, len); in hisi_nfc_read_buf()
408 host->offset += len; in hisi_nfc_read_buf()
414 struct hinfc_host *host = nand_get_controller_data(chip); in set_addr() local
415 unsigned int command = host->command; in set_addr()
417 host->addr_cycle = 0; in set_addr()
418 host->addr_value[0] = 0; in set_addr()
419 host->addr_value[1] = 0; in set_addr()
428 host->addr_value[0] = column & 0xffff; in set_addr()
429 host->addr_cycle = 2; in set_addr()
432 host->addr_value[0] |= (page_addr & 0xffff) in set_addr()
433 << (host->addr_cycle * 8); in set_addr()
434 host->addr_cycle += 2; in set_addr()
437 host->addr_cycle += 1; in set_addr()
438 if (host->command == NAND_CMD_ERASE1) in set_addr()
439 host->addr_value[0] |= ((page_addr >> 16) & 0xff) << 16; in set_addr()
441 host->addr_value[1] |= ((page_addr >> 16) & 0xff); in set_addr()
450 struct hinfc_host *host = nand_get_controller_data(chip); in hisi_nfc_cmdfunc() local
454 host->command = command; in hisi_nfc_cmdfunc()
460 host->offset = column; in hisi_nfc_cmdfunc()
462 host->offset = column + mtd->writesize; in hisi_nfc_cmdfunc()
466 hisi_nfc_send_cmd_readstart(host); in hisi_nfc_cmdfunc()
470 host->offset = column; in hisi_nfc_cmdfunc()
479 hisi_nfc_send_cmd_pageprog(host); in hisi_nfc_cmdfunc()
483 hisi_nfc_send_cmd_erase(host); in hisi_nfc_cmdfunc()
487 host->offset = column; in hisi_nfc_cmdfunc()
488 memset(host->mmio, 0, 0x10); in hisi_nfc_cmdfunc()
489 hisi_nfc_send_cmd_readid(host); in hisi_nfc_cmdfunc()
493 flag = hinfc_read(host, HINFC504_CON); in hisi_nfc_cmdfunc()
495 hinfc_write(host, in hisi_nfc_cmdfunc()
499 host->offset = 0; in hisi_nfc_cmdfunc()
500 memset(host->mmio, 0, 0x10); in hisi_nfc_cmdfunc()
501 hisi_nfc_send_cmd_status(host); in hisi_nfc_cmdfunc()
502 hinfc_write(host, flag, HINFC504_CON); in hisi_nfc_cmdfunc()
506 hisi_nfc_send_cmd_reset(host, host->chipselect); in hisi_nfc_cmdfunc()
510 dev_err(host->dev, "Error: unsupported cmd(cmd=%x, col=%x, page=%x)\n", in hisi_nfc_cmdfunc()
515 host->cache_addr_value[0] = ~0; in hisi_nfc_cmdfunc()
516 host->cache_addr_value[1] = ~0; in hisi_nfc_cmdfunc()
522 struct hinfc_host *host = devid; in hinfc_irq_handle() local
525 flag = hinfc_read(host, HINFC504_INTS); in hinfc_irq_handle()
527 host->irq_status |= flag; in hinfc_irq_handle()
530 hinfc_write(host, HINFC504_INTCLR_DMA, HINFC504_INTCLR); in hinfc_irq_handle()
531 complete(&host->cmd_complete); in hinfc_irq_handle()
533 hinfc_write(host, HINFC504_INTCLR_CE, HINFC504_INTCLR); in hinfc_irq_handle()
535 hinfc_write(host, HINFC504_INTCLR_UE, HINFC504_INTCLR); in hinfc_irq_handle()
544 struct hinfc_host *host = nand_get_controller_data(chip); in hisi_nand_read_page_hwecc() local
552 if (host->irq_status & HINFC504_INTS_UE) { in hisi_nand_read_page_hwecc()
554 } else if (host->irq_status & HINFC504_INTS_CE) { in hisi_nand_read_page_hwecc()
558 status_ecc = hinfc_read(host, HINFC504_ECC_STATUS) >> in hisi_nand_read_page_hwecc()
568 host->irq_status = 0; in hisi_nand_read_page_hwecc()
576 struct hinfc_host *host = nand_get_controller_data(chip); in hisi_nand_read_oob() local
581 if (host->irq_status & HINFC504_INTS_UE) { in hisi_nand_read_oob()
582 host->irq_status = 0; in hisi_nand_read_oob()
586 host->irq_status = 0; in hisi_nand_read_oob()
601 static void hisi_nfc_host_init(struct hinfc_host *host) in hisi_nfc_host_init() argument
603 struct nand_chip *chip = &host->chip; in hisi_nfc_host_init()
606 host->version = hinfc_read(host, HINFC_VERSION); in hisi_nfc_host_init()
607 host->addr_cycle = 0; in hisi_nfc_host_init()
608 host->addr_value[0] = 0; in hisi_nfc_host_init()
609 host->addr_value[1] = 0; in hisi_nfc_host_init()
610 host->cache_addr_value[0] = ~0; in hisi_nfc_host_init()
611 host->cache_addr_value[1] = ~0; in hisi_nfc_host_init()
612 host->chipselect = 0; in hisi_nfc_host_init()
622 hinfc_write(host, flag, HINFC504_CON); in hisi_nfc_host_init()
624 memset(host->mmio, 0xff, HINFC504_BUFFER_BASE_ADDRESS_LEN); in hisi_nfc_host_init()
626 hinfc_write(host, SET_HINFC504_PWIDTH(HINFC504_W_LATCH, in hisi_nfc_host_init()
630 hinfc_write(host, HINFC504_INTEN_DMA, HINFC504_INTEN); in hisi_nfc_host_init()
657 static int hisi_nfc_ecc_probe(struct hinfc_host *host) in hisi_nfc_ecc_probe() argument
661 struct device *dev = host->dev; in hisi_nfc_ecc_probe()
662 struct nand_chip *chip = &host->chip; in hisi_nfc_ecc_probe()
700 flag = hinfc_read(host, HINFC504_CON); in hisi_nfc_ecc_probe()
704 hinfc_write(host, flag, HINFC504_CON); in hisi_nfc_ecc_probe()
707 flag = hinfc_read(host, HINFC504_INTEN) & 0xfff; in hisi_nfc_ecc_probe()
708 hinfc_write(host, flag | HINFC504_INTEN_UE | HINFC504_INTEN_CE, in hisi_nfc_ecc_probe()
718 struct hinfc_host *host; in hisi_nfc_probe() local
724 host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); in hisi_nfc_probe()
725 if (!host) in hisi_nfc_probe()
727 host->dev = dev; in hisi_nfc_probe()
729 platform_set_drvdata(pdev, host); in hisi_nfc_probe()
730 chip = &host->chip; in hisi_nfc_probe()
741 host->iobase = devm_ioremap_resource(dev, res); in hisi_nfc_probe()
742 if (IS_ERR(host->iobase)) { in hisi_nfc_probe()
743 ret = PTR_ERR(host->iobase); in hisi_nfc_probe()
748 host->mmio = devm_ioremap_resource(dev, res); in hisi_nfc_probe()
749 if (IS_ERR(host->mmio)) { in hisi_nfc_probe()
750 ret = PTR_ERR(host->mmio); in hisi_nfc_probe()
758 nand_set_controller_data(chip, host); in hisi_nfc_probe()
768 hisi_nfc_host_init(host); in hisi_nfc_probe()
770 ret = devm_request_irq(dev, irq, hinfc_irq_handle, 0x0, "nandc", host); in hisi_nfc_probe()
782 host->buffer = dmam_alloc_coherent(dev, mtd->writesize + mtd->oobsize, in hisi_nfc_probe()
783 &host->dma_buffer, GFP_KERNEL); in hisi_nfc_probe()
784 if (!host->buffer) { in hisi_nfc_probe()
789 host->dma_oob = host->dma_buffer + mtd->writesize; in hisi_nfc_probe()
790 memset(host->buffer, 0xff, mtd->writesize + mtd->oobsize); in hisi_nfc_probe()
792 flag = hinfc_read(host, HINFC504_CON); in hisi_nfc_probe()
806 hinfc_write(host, flag, HINFC504_CON); in hisi_nfc_probe()
809 hisi_nfc_ecc_probe(host); in hisi_nfc_probe()
833 struct hinfc_host *host = platform_get_drvdata(pdev); in hisi_nfc_remove() local
834 struct mtd_info *mtd = nand_to_mtd(&host->chip); in hisi_nfc_remove()
844 struct hinfc_host *host = dev_get_drvdata(dev); in hisi_nfc_suspend() local
848 if (((hinfc_read(host, HINFC504_STATUS) & 0x1) == 0x0) && in hisi_nfc_suspend()
849 (hinfc_read(host, HINFC504_DMA_CTRL) & in hisi_nfc_suspend()
856 dev_err(host->dev, "nand controller suspend timeout.\n"); in hisi_nfc_suspend()
864 struct hinfc_host *host = dev_get_drvdata(dev); in hisi_nfc_resume() local
865 struct nand_chip *chip = &host->chip; in hisi_nfc_resume()
868 hisi_nfc_send_cmd_reset(host, cs); in hisi_nfc_resume()
869 hinfc_write(host, SET_HINFC504_PWIDTH(HINFC504_W_LATCH, in hisi_nfc_resume()