Lines Matching refs:pdata
27 static void xgene_enet_wr_csr(struct xgene_enet_pdata *pdata, in xgene_enet_wr_csr() argument
30 void __iomem *addr = pdata->eth_csr_addr + offset; in xgene_enet_wr_csr()
35 static void xgene_enet_wr_ring_if(struct xgene_enet_pdata *pdata, in xgene_enet_wr_ring_if() argument
38 void __iomem *addr = pdata->eth_ring_if_addr + offset; in xgene_enet_wr_ring_if()
43 static void xgene_enet_wr_diag_csr(struct xgene_enet_pdata *pdata, in xgene_enet_wr_diag_csr() argument
46 void __iomem *addr = pdata->eth_diag_csr_addr + offset; in xgene_enet_wr_diag_csr()
74 static void xgene_enet_wr_mac(struct xgene_enet_pdata *pdata, in xgene_enet_wr_mac() argument
79 addr = pdata->mcx_mac_addr + MAC_ADDR_REG_OFFSET; in xgene_enet_wr_mac()
80 wr = pdata->mcx_mac_addr + MAC_WRITE_REG_OFFSET; in xgene_enet_wr_mac()
81 cmd = pdata->mcx_mac_addr + MAC_COMMAND_REG_OFFSET; in xgene_enet_wr_mac()
82 cmd_done = pdata->mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET; in xgene_enet_wr_mac()
85 netdev_err(pdata->ndev, "MCX mac write failed, addr: %04x\n", in xgene_enet_wr_mac()
89 static void xgene_enet_wr_pcs(struct xgene_enet_pdata *pdata, in xgene_enet_wr_pcs() argument
94 addr = pdata->pcs_addr + PCS_ADDR_REG_OFFSET; in xgene_enet_wr_pcs()
95 wr = pdata->pcs_addr + PCS_WRITE_REG_OFFSET; in xgene_enet_wr_pcs()
96 cmd = pdata->pcs_addr + PCS_COMMAND_REG_OFFSET; in xgene_enet_wr_pcs()
97 cmd_done = pdata->pcs_addr + PCS_COMMAND_DONE_REG_OFFSET; in xgene_enet_wr_pcs()
100 netdev_err(pdata->ndev, "PCS write failed, addr: %04x\n", in xgene_enet_wr_pcs()
104 static void xgene_enet_rd_csr(struct xgene_enet_pdata *pdata, in xgene_enet_rd_csr() argument
107 void __iomem *addr = pdata->eth_csr_addr + offset; in xgene_enet_rd_csr()
112 static void xgene_enet_rd_diag_csr(struct xgene_enet_pdata *pdata, in xgene_enet_rd_diag_csr() argument
115 void __iomem *addr = pdata->eth_diag_csr_addr + offset; in xgene_enet_rd_diag_csr()
143 static void xgene_enet_rd_mac(struct xgene_enet_pdata *pdata, in xgene_enet_rd_mac() argument
148 addr = pdata->mcx_mac_addr + MAC_ADDR_REG_OFFSET; in xgene_enet_rd_mac()
149 rd = pdata->mcx_mac_addr + MAC_READ_REG_OFFSET; in xgene_enet_rd_mac()
150 cmd = pdata->mcx_mac_addr + MAC_COMMAND_REG_OFFSET; in xgene_enet_rd_mac()
151 cmd_done = pdata->mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET; in xgene_enet_rd_mac()
154 netdev_err(pdata->ndev, "MCX mac read failed, addr: %04x\n", in xgene_enet_rd_mac()
158 static bool xgene_enet_rd_pcs(struct xgene_enet_pdata *pdata, in xgene_enet_rd_pcs() argument
164 addr = pdata->pcs_addr + PCS_ADDR_REG_OFFSET; in xgene_enet_rd_pcs()
165 rd = pdata->pcs_addr + PCS_READ_REG_OFFSET; in xgene_enet_rd_pcs()
166 cmd = pdata->pcs_addr + PCS_COMMAND_REG_OFFSET; in xgene_enet_rd_pcs()
167 cmd_done = pdata->pcs_addr + PCS_COMMAND_DONE_REG_OFFSET; in xgene_enet_rd_pcs()
171 netdev_err(pdata->ndev, "PCS read failed, addr: %04x\n", in xgene_enet_rd_pcs()
177 static int xgene_enet_ecc_init(struct xgene_enet_pdata *pdata) in xgene_enet_ecc_init() argument
179 struct net_device *ndev = pdata->ndev; in xgene_enet_ecc_init()
183 xgene_enet_wr_diag_csr(pdata, ENET_CFG_MEM_RAM_SHUTDOWN_ADDR, 0x0); in xgene_enet_ecc_init()
186 xgene_enet_rd_diag_csr(pdata, ENET_BLOCK_MEM_RDY_ADDR, &data); in xgene_enet_ecc_init()
197 static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata *pdata) in xgene_enet_config_ring_if_assoc() argument
199 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIWQASSOC_ADDR, 0); in xgene_enet_config_ring_if_assoc()
200 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIFPQASSOC_ADDR, 0); in xgene_enet_config_ring_if_assoc()
201 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIQMLITEWQASSOC_ADDR, 0); in xgene_enet_config_ring_if_assoc()
202 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIQMLITEFPQASSOC_ADDR, 0); in xgene_enet_config_ring_if_assoc()
205 static void xgene_xgmac_reset(struct xgene_enet_pdata *pdata) in xgene_xgmac_reset() argument
207 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_0, HSTMACRST); in xgene_xgmac_reset()
208 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_0, 0); in xgene_xgmac_reset()
211 static void xgene_pcs_reset(struct xgene_enet_pdata *pdata) in xgene_pcs_reset() argument
215 if (!xgene_enet_rd_pcs(pdata, PCS_CONTROL_1, &data)) in xgene_pcs_reset()
218 xgene_enet_wr_pcs(pdata, PCS_CONTROL_1, data | PCS_CTRL_PCS_RST); in xgene_pcs_reset()
219 xgene_enet_wr_pcs(pdata, PCS_CONTROL_1, data & ~PCS_CTRL_PCS_RST); in xgene_pcs_reset()
222 static void xgene_xgmac_set_mac_addr(struct xgene_enet_pdata *pdata) in xgene_xgmac_set_mac_addr() argument
225 u8 *dev_addr = pdata->ndev->dev_addr; in xgene_xgmac_set_mac_addr()
231 xgene_enet_wr_mac(pdata, HSTMACADR_LSW_ADDR, addr0); in xgene_xgmac_set_mac_addr()
232 xgene_enet_wr_mac(pdata, HSTMACADR_MSW_ADDR, addr1); in xgene_xgmac_set_mac_addr()
235 static void xgene_xgmac_set_mss(struct xgene_enet_pdata *pdata, in xgene_xgmac_set_mss() argument
242 xgene_enet_rd_csr(pdata, XG_TSIF_MSS_REG0_ADDR + offset, &data); in xgene_xgmac_set_mss()
250 xgene_enet_wr_csr(pdata, XG_TSIF_MSS_REG0_ADDR + offset, data); in xgene_xgmac_set_mss()
253 static u32 xgene_enet_link_status(struct xgene_enet_pdata *pdata) in xgene_enet_link_status() argument
257 xgene_enet_rd_csr(pdata, XG_LINK_STATUS_ADDR, &data); in xgene_enet_link_status()
262 static void xgene_xgmac_init(struct xgene_enet_pdata *pdata) in xgene_xgmac_init() argument
266 xgene_xgmac_reset(pdata); in xgene_xgmac_init()
268 xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &data); in xgene_xgmac_init()
271 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data); in xgene_xgmac_init()
273 xgene_xgmac_set_mac_addr(pdata); in xgene_xgmac_init()
275 xgene_enet_rd_csr(pdata, XG_RSIF_CONFIG_REG_ADDR, &data); in xgene_xgmac_init()
277 xgene_enet_wr_csr(pdata, XG_RSIF_CONFIG_REG_ADDR, data); in xgene_xgmac_init()
279 xgene_enet_rd_csr(pdata, XG_ENET_SPARE_CFG_REG_ADDR, &data); in xgene_xgmac_init()
281 xgene_enet_wr_csr(pdata, XG_ENET_SPARE_CFG_REG_ADDR, data); in xgene_xgmac_init()
282 xgene_enet_wr_csr(pdata, XG_ENET_SPARE_CFG_REG_1_ADDR, 0x82); in xgene_xgmac_init()
283 xgene_enet_wr_csr(pdata, XGENET_RX_DV_GATE_REG_0_ADDR, 0); in xgene_xgmac_init()
284 xgene_enet_wr_csr(pdata, XG_CFG_BYPASS_ADDR, RESUME_TX); in xgene_xgmac_init()
287 static void xgene_xgmac_rx_enable(struct xgene_enet_pdata *pdata) in xgene_xgmac_rx_enable() argument
291 xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &data); in xgene_xgmac_rx_enable()
292 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data | HSTRFEN); in xgene_xgmac_rx_enable()
295 static void xgene_xgmac_tx_enable(struct xgene_enet_pdata *pdata) in xgene_xgmac_tx_enable() argument
299 xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &data); in xgene_xgmac_tx_enable()
300 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data | HSTTFEN); in xgene_xgmac_tx_enable()
303 static void xgene_xgmac_rx_disable(struct xgene_enet_pdata *pdata) in xgene_xgmac_rx_disable() argument
307 xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &data); in xgene_xgmac_rx_disable()
308 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data & ~HSTRFEN); in xgene_xgmac_rx_disable()
311 static void xgene_xgmac_tx_disable(struct xgene_enet_pdata *pdata) in xgene_xgmac_tx_disable() argument
315 xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &data); in xgene_xgmac_tx_disable()
316 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data & ~HSTTFEN); in xgene_xgmac_tx_disable()
319 static int xgene_enet_reset(struct xgene_enet_pdata *pdata) in xgene_enet_reset() argument
321 struct device *dev = &pdata->pdev->dev; in xgene_enet_reset()
323 if (!xgene_ring_mgr_init(pdata)) in xgene_enet_reset()
327 clk_prepare_enable(pdata->clk); in xgene_enet_reset()
329 clk_disable_unprepare(pdata->clk); in xgene_enet_reset()
331 clk_prepare_enable(pdata->clk); in xgene_enet_reset()
335 if (acpi_has_method(ACPI_HANDLE(&pdata->pdev->dev), "_RST")) { in xgene_enet_reset()
336 acpi_evaluate_object(ACPI_HANDLE(&pdata->pdev->dev), in xgene_enet_reset()
338 } else if (acpi_has_method(ACPI_HANDLE(&pdata->pdev->dev), in xgene_enet_reset()
340 acpi_evaluate_object(ACPI_HANDLE(&pdata->pdev->dev), in xgene_enet_reset()
346 xgene_enet_ecc_init(pdata); in xgene_enet_reset()
347 xgene_enet_config_ring_if_assoc(pdata); in xgene_enet_reset()
352 static void xgene_enet_xgcle_bypass(struct xgene_enet_pdata *pdata, in xgene_enet_xgcle_bypass() argument
357 xgene_enet_rd_csr(pdata, XCLE_BYPASS_REG0_ADDR, &cb); in xgene_enet_xgcle_bypass()
360 xgene_enet_wr_csr(pdata, XCLE_BYPASS_REG0_ADDR, cb); in xgene_enet_xgcle_bypass()
363 xgene_enet_rd_csr(pdata, XCLE_BYPASS_REG1_ADDR, &cb); in xgene_enet_xgcle_bypass()
366 xgene_enet_wr_csr(pdata, XCLE_BYPASS_REG1_ADDR, cb); in xgene_enet_xgcle_bypass()
369 static void xgene_enet_shutdown(struct xgene_enet_pdata *pdata) in xgene_enet_shutdown() argument
371 struct device *dev = &pdata->pdev->dev; in xgene_enet_shutdown()
377 for (i = 0; i < pdata->rxq_cnt; i++) { in xgene_enet_shutdown()
378 ring = pdata->rx_ring[i]->buf_pool; in xgene_enet_shutdown()
383 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIFPRESET_ADDR, pb); in xgene_enet_shutdown()
386 for (i = 0; i < pdata->txq_cnt; i++) { in xgene_enet_shutdown()
387 ring = pdata->tx_ring[i]; in xgene_enet_shutdown()
392 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIWQRESET_ADDR, pb); in xgene_enet_shutdown()
395 if (!IS_ERR(pdata->clk)) in xgene_enet_shutdown()
396 clk_disable_unprepare(pdata->clk); in xgene_enet_shutdown()
400 static void xgene_enet_clear(struct xgene_enet_pdata *pdata, in xgene_enet_clear() argument
415 xgene_enet_wr_ring_if(pdata, addr, data); in xgene_enet_clear()
420 struct xgene_enet_pdata *pdata = container_of(to_delayed_work(work), in xgene_enet_link_state() local
422 struct gpio_desc *sfp_rdy = pdata->sfp_rdy; in xgene_enet_link_state()
423 struct net_device *ndev = pdata->ndev; in xgene_enet_link_state()
426 link_status = xgene_enet_link_status(pdata); in xgene_enet_link_state()
433 xgene_xgmac_rx_enable(pdata); in xgene_enet_link_state()
434 xgene_xgmac_tx_enable(pdata); in xgene_enet_link_state()
440 xgene_xgmac_rx_disable(pdata); in xgene_enet_link_state()
441 xgene_xgmac_tx_disable(pdata); in xgene_enet_link_state()
447 xgene_pcs_reset(pdata); in xgene_enet_link_state()
450 schedule_delayed_work(&pdata->link_work, poll_interval); in xgene_enet_link_state()