240 	u16 phy_val;  in alx_get_phy_config()  local
252 	alx_read_phy_reg(hw, ALX_MII_DBG_ADDR, &phy_val);  in alx_get_phy_config()
253 	if (ALX_PHY_INITED == phy_val)  in alx_get_phy_config()
494 	u16 phy_val;  in alx_reset_phy()  local
528 	alx_read_phy_dbg(hw, ALX_MIIDBG_GREENCFG2, &phy_val);  in alx_reset_phy()
530 			  phy_val & ~ALX_GREENCFG2_GATE_DFSE_EN);  in alx_reset_phy()
540 				 &phy_val);  in alx_reset_phy()
542 				  phy_val | ALX_CLDCTRL3_BP_CABLE1TH_DET_GT);  in alx_reset_phy()
544 		alx_read_phy_dbg(hw, ALX_MIIDBG_GREENCFG2, &phy_val);  in alx_reset_phy()
546 				  phy_val | ALX_GREENCFG2_BP_GREEN);  in alx_reset_phy()
549 				 &phy_val);  in alx_reset_phy()
551 				  phy_val | ALX_CLDCTRL5_BP_VD_HLFBIAS);  in alx_reset_phy()
780 	u16 phy_val, len, agc;  in alx_post_phy_link()  local
790 				 &phy_val);  in alx_post_phy_link()
791 		len = ALX_GET_FIELD(phy_val, ALX_CLDCTRL6_CAB_LEN);  in alx_post_phy_link()
792 		alx_read_phy_dbg(hw, ALX_MIIDBG_AGC, &phy_val);  in alx_post_phy_link()
793 		agc = ALX_GET_FIELD(phy_val, ALX_AGC_2_VGA);  in alx_post_phy_link()
804 					 &phy_val);  in alx_post_phy_link()
806 					  phy_val | ALX_AFE_10BT_100M_TH);  in alx_post_phy_link()
811 					 ALX_MIIEXT_AFE, &phy_val);  in alx_post_phy_link()
813 					  phy_val & ~ALX_AFE_10BT_100M_TH);  in alx_post_phy_link()
827 						 &phy_val);  in alx_post_phy_link()
828 				ALX_SET_FIELD(phy_val, ALX_MSE20DB_TH,  in alx_post_phy_link()
831 						  phy_val);  in alx_post_phy_link()
836 				 &phy_val);  in alx_post_phy_link()
838 				  phy_val & ~ALX_AFE_10BT_100M_TH);  in alx_post_phy_link()
843 			alx_read_phy_dbg(hw, ALX_MIIDBG_MSE20DB, &phy_val);  in alx_post_phy_link()
844 			ALX_SET_FIELD(phy_val, ALX_MSE20DB_TH,  in alx_post_phy_link()
846 			alx_write_phy_dbg(hw, ALX_MIIDBG_MSE20DB, phy_val);  in alx_post_phy_link()