Lines Matching refs:adapter
61 static int t1_wait_op_done(adapter_t *adapter, int reg, u32 mask, int polarity, in t1_wait_op_done() argument
65 u32 val = readl(adapter->regs + reg) & mask; in t1_wait_op_done()
81 int __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value) in __t1_tpi_write() argument
85 writel(addr, adapter->regs + A_TPI_ADDR); in __t1_tpi_write()
86 writel(value, adapter->regs + A_TPI_WR_DATA); in __t1_tpi_write()
87 writel(F_TPIWR, adapter->regs + A_TPI_CSR); in __t1_tpi_write()
89 tpi_busy = t1_wait_op_done(adapter, A_TPI_CSR, F_TPIRDY, 1, in __t1_tpi_write()
93 adapter->name, addr); in __t1_tpi_write()
97 int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value) in t1_tpi_write() argument
101 spin_lock(&adapter->tpi_lock); in t1_tpi_write()
102 ret = __t1_tpi_write(adapter, addr, value); in t1_tpi_write()
103 spin_unlock(&adapter->tpi_lock); in t1_tpi_write()
110 int __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp) in __t1_tpi_read() argument
114 writel(addr, adapter->regs + A_TPI_ADDR); in __t1_tpi_read()
115 writel(0, adapter->regs + A_TPI_CSR); in __t1_tpi_read()
117 tpi_busy = t1_wait_op_done(adapter, A_TPI_CSR, F_TPIRDY, 1, in __t1_tpi_read()
121 adapter->name, addr); in __t1_tpi_read()
123 *valp = readl(adapter->regs + A_TPI_RD_DATA); in __t1_tpi_read()
127 int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp) in t1_tpi_read() argument
131 spin_lock(&adapter->tpi_lock); in t1_tpi_read()
132 ret = __t1_tpi_read(adapter, addr, valp); in t1_tpi_read()
133 spin_unlock(&adapter->tpi_lock); in t1_tpi_read()
140 static void t1_tpi_par(adapter_t *adapter, u32 value) in t1_tpi_par() argument
142 writel(V_TPIPAR(value), adapter->regs + A_TPI_PAR); in t1_tpi_par()
150 void t1_link_changed(adapter_t *adapter, int port_id) in t1_link_changed() argument
153 struct cphy *phy = adapter->port[port_id].phy; in t1_link_changed()
154 struct link_config *lc = &adapter->port[port_id].link_config; in t1_link_changed()
165 struct cmac *mac = adapter->port[port_id].mac; in t1_link_changed()
170 t1_link_negotiated(adapter, port_id, link_ok, speed, duplex, fc); in t1_link_changed()
173 static int t1_pci_intr_handler(adapter_t *adapter) in t1_pci_intr_handler() argument
177 pci_read_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE, &pcix_cause); in t1_pci_intr_handler()
180 pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE, in t1_pci_intr_handler()
182 t1_fatal_err(adapter); /* PCI errors are fatal */ in t1_pci_intr_handler()
193 static int fpga_phy_intr_handler(adapter_t *adapter) in fpga_phy_intr_handler() argument
196 u32 cause = readl(adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE); in fpga_phy_intr_handler()
198 for_each_port(adapter, p) in fpga_phy_intr_handler()
200 struct cphy *phy = adapter->port[p].phy; in fpga_phy_intr_handler()
204 t1_link_changed(adapter, p); in fpga_phy_intr_handler()
206 writel(cause, adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE); in fpga_phy_intr_handler()
213 static int fpga_slow_intr(adapter_t *adapter) in fpga_slow_intr() argument
215 u32 cause = readl(adapter->regs + A_PL_CAUSE); in fpga_slow_intr()
219 t1_sge_intr_error_handler(adapter->sge); in fpga_slow_intr()
222 fpga_phy_intr_handler(adapter); in fpga_slow_intr()
229 u32 tp_cause = readl(adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE); in fpga_slow_intr()
232 writel(tp_cause, adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE); in fpga_slow_intr()
235 t1_pci_intr_handler(adapter); in fpga_slow_intr()
239 writel(cause, adapter->regs + A_PL_CAUSE); in fpga_slow_intr()
248 static int mi1_wait_until_ready(adapter_t *adapter, int mi1_reg) in mi1_wait_until_ready() argument
255 __t1_tpi_read(adapter, mi1_reg, &val); in mi1_wait_until_ready()
261 pr_alert("%s: MDIO operation timed out\n", adapter->name); in mi1_wait_until_ready()
268 static void mi1_mdio_init(adapter_t *adapter, const struct board_info *bi) in mi1_mdio_init() argument
276 t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_CFG, val); in mi1_mdio_init()
286 struct adapter *adapter = dev->ml_priv; in mi1_mdio_read() local
290 spin_lock(&adapter->tpi_lock); in mi1_mdio_read()
291 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); in mi1_mdio_read()
292 __t1_tpi_write(adapter, in mi1_mdio_read()
294 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); in mi1_mdio_read()
295 __t1_tpi_read(adapter, A_ELMER0_PORT0_MI1_DATA, &val); in mi1_mdio_read()
296 spin_unlock(&adapter->tpi_lock); in mi1_mdio_read()
303 struct adapter *adapter = dev->ml_priv; in mi1_mdio_write() local
306 spin_lock(&adapter->tpi_lock); in mi1_mdio_write()
307 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); in mi1_mdio_write()
308 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, val); in mi1_mdio_write()
309 __t1_tpi_write(adapter, in mi1_mdio_write()
311 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); in mi1_mdio_write()
312 spin_unlock(&adapter->tpi_lock); in mi1_mdio_write()
328 struct adapter *adapter = dev->ml_priv; in mi1_mdio_ext_read() local
332 spin_lock(&adapter->tpi_lock); in mi1_mdio_ext_read()
335 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); in mi1_mdio_ext_read()
336 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, reg_addr); in mi1_mdio_ext_read()
337 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_OP, in mi1_mdio_ext_read()
339 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); in mi1_mdio_ext_read()
342 __t1_tpi_write(adapter, in mi1_mdio_ext_read()
344 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); in mi1_mdio_ext_read()
347 __t1_tpi_read(adapter, A_ELMER0_PORT0_MI1_DATA, &val); in mi1_mdio_ext_read()
348 spin_unlock(&adapter->tpi_lock); in mi1_mdio_ext_read()
355 struct adapter *adapter = dev->ml_priv; in mi1_mdio_ext_write() local
358 spin_lock(&adapter->tpi_lock); in mi1_mdio_ext_write()
361 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); in mi1_mdio_ext_write()
362 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, reg_addr); in mi1_mdio_ext_write()
363 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_OP, in mi1_mdio_ext_write()
365 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); in mi1_mdio_ext_write()
368 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, val); in mi1_mdio_ext_write()
369 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_OP, MI1_OP_INDIRECT_WRITE); in mi1_mdio_ext_write()
370 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); in mi1_mdio_ext_write()
371 spin_unlock(&adapter->tpi_lock); in mi1_mdio_ext_write()
562 int t1_seeprom_read(adapter_t *adapter, u32 addr, __le32 *data) in t1_seeprom_read() argument
571 pci_write_config_word(adapter->pdev, A_PCICFG_VPD_ADDR, (u16)addr); in t1_seeprom_read()
574 pci_read_config_word(adapter->pdev, A_PCICFG_VPD_ADDR, &val); in t1_seeprom_read()
579 adapter->name, addr); in t1_seeprom_read()
582 pci_read_config_dword(adapter->pdev, A_PCICFG_VPD_DATA, &v); in t1_seeprom_read()
587 static int t1_eeprom_vpd_get(adapter_t *adapter, struct chelsio_vpd_t *vpd) in t1_eeprom_vpd_get() argument
592 ret = t1_seeprom_read(adapter, addr, in t1_eeprom_vpd_get()
601 static int vpd_macaddress_get(adapter_t *adapter, int index, u8 mac_addr[]) in vpd_macaddress_get() argument
605 if (t1_eeprom_vpd_get(adapter, &vpd)) in vpd_macaddress_get()
631 (mac->adapter->params.nports < 2))) in t1_link_start()
667 int t1_elmer0_ext_intr_handler(adapter_t *adapter) in t1_elmer0_ext_intr_handler() argument
673 t1_tpi_read(adapter, A_ELMER0_INT_CAUSE, &cause); in t1_elmer0_ext_intr_handler()
675 switch (board_info(adapter)->board) { in t1_elmer0_ext_intr_handler()
682 for_each_port(adapter, i) { in t1_elmer0_ext_intr_handler()
687 phy = adapter->port[i].phy; in t1_elmer0_ext_intr_handler()
690 t1_link_changed(adapter, i); in t1_elmer0_ext_intr_handler()
696 phy = adapter->port[0].phy; in t1_elmer0_ext_intr_handler()
699 t1_link_changed(adapter, 0); in t1_elmer0_ext_intr_handler()
710 for_each_port(adapter, p) { in t1_elmer0_ext_intr_handler()
711 phy = adapter->port[p].phy; in t1_elmer0_ext_intr_handler()
714 t1_link_changed(adapter, p); in t1_elmer0_ext_intr_handler()
723 phy = adapter->port[0].phy; in t1_elmer0_ext_intr_handler()
726 t1_link_changed(adapter, 0); in t1_elmer0_ext_intr_handler()
731 if (netif_msg_intr(adapter)) in t1_elmer0_ext_intr_handler()
732 dev_dbg(&adapter->pdev->dev, in t1_elmer0_ext_intr_handler()
735 struct cmac *mac = adapter->port[0].mac; in t1_elmer0_ext_intr_handler()
742 t1_tpi_read(adapter, in t1_elmer0_ext_intr_handler()
744 if (netif_msg_link(adapter)) in t1_elmer0_ext_intr_handler()
745 dev_info(&adapter->pdev->dev, "XPAK %s\n", in t1_elmer0_ext_intr_handler()
750 t1_tpi_write(adapter, A_ELMER0_INT_CAUSE, cause); in t1_elmer0_ext_intr_handler()
755 void t1_interrupts_enable(adapter_t *adapter) in t1_interrupts_enable() argument
759 adapter->slow_intr_mask = F_PL_INTR_SGE_ERR | F_PL_INTR_TP; in t1_interrupts_enable()
761 t1_sge_intr_enable(adapter->sge); in t1_interrupts_enable()
762 t1_tp_intr_enable(adapter->tp); in t1_interrupts_enable()
763 if (adapter->espi) { in t1_interrupts_enable()
764 adapter->slow_intr_mask |= F_PL_INTR_ESPI; in t1_interrupts_enable()
765 t1_espi_intr_enable(adapter->espi); in t1_interrupts_enable()
769 for_each_port(adapter, i) { in t1_interrupts_enable()
770 adapter->port[i].mac->ops->interrupt_enable(adapter->port[i].mac); in t1_interrupts_enable()
771 adapter->port[i].phy->ops->interrupt_enable(adapter->port[i].phy); in t1_interrupts_enable()
775 if (t1_is_asic(adapter)) { in t1_interrupts_enable()
776 u32 pl_intr = readl(adapter->regs + A_PL_ENABLE); in t1_interrupts_enable()
779 pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, in t1_interrupts_enable()
782 adapter->slow_intr_mask |= F_PL_INTR_EXT | F_PL_INTR_PCIX; in t1_interrupts_enable()
784 writel(pl_intr, adapter->regs + A_PL_ENABLE); in t1_interrupts_enable()
789 void t1_interrupts_disable(adapter_t* adapter) in t1_interrupts_disable() argument
793 t1_sge_intr_disable(adapter->sge); in t1_interrupts_disable()
794 t1_tp_intr_disable(adapter->tp); in t1_interrupts_disable()
795 if (adapter->espi) in t1_interrupts_disable()
796 t1_espi_intr_disable(adapter->espi); in t1_interrupts_disable()
799 for_each_port(adapter, i) { in t1_interrupts_disable()
800 adapter->port[i].mac->ops->interrupt_disable(adapter->port[i].mac); in t1_interrupts_disable()
801 adapter->port[i].phy->ops->interrupt_disable(adapter->port[i].phy); in t1_interrupts_disable()
805 if (t1_is_asic(adapter)) in t1_interrupts_disable()
806 writel(0, adapter->regs + A_PL_ENABLE); in t1_interrupts_disable()
809 pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, 0); in t1_interrupts_disable()
811 adapter->slow_intr_mask = 0; in t1_interrupts_disable()
815 void t1_interrupts_clear(adapter_t* adapter) in t1_interrupts_clear() argument
819 t1_sge_intr_clear(adapter->sge); in t1_interrupts_clear()
820 t1_tp_intr_clear(adapter->tp); in t1_interrupts_clear()
821 if (adapter->espi) in t1_interrupts_clear()
822 t1_espi_intr_clear(adapter->espi); in t1_interrupts_clear()
825 for_each_port(adapter, i) { in t1_interrupts_clear()
826 adapter->port[i].mac->ops->interrupt_clear(adapter->port[i].mac); in t1_interrupts_clear()
827 adapter->port[i].phy->ops->interrupt_clear(adapter->port[i].phy); in t1_interrupts_clear()
831 if (t1_is_asic(adapter)) { in t1_interrupts_clear()
832 u32 pl_intr = readl(adapter->regs + A_PL_CAUSE); in t1_interrupts_clear()
835 adapter->regs + A_PL_CAUSE); in t1_interrupts_clear()
839 pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE, 0xffffffff); in t1_interrupts_clear()
845 static int asic_slow_intr(adapter_t *adapter) in asic_slow_intr() argument
847 u32 cause = readl(adapter->regs + A_PL_CAUSE); in asic_slow_intr()
849 cause &= adapter->slow_intr_mask; in asic_slow_intr()
853 t1_sge_intr_error_handler(adapter->sge); in asic_slow_intr()
855 t1_tp_intr_handler(adapter->tp); in asic_slow_intr()
857 t1_espi_intr_handler(adapter->espi); in asic_slow_intr()
859 t1_pci_intr_handler(adapter); in asic_slow_intr()
861 t1_elmer0_ext_intr(adapter); in asic_slow_intr()
864 writel(cause, adapter->regs + A_PL_CAUSE); in asic_slow_intr()
865 readl(adapter->regs + A_PL_CAUSE); /* flush writes */ in asic_slow_intr()
869 int t1_slow_intr_handler(adapter_t *adapter) in t1_slow_intr_handler() argument
872 if (!t1_is_asic(adapter)) in t1_slow_intr_handler()
873 return fpga_slow_intr(adapter); in t1_slow_intr_handler()
875 return asic_slow_intr(adapter); in t1_slow_intr_handler()
879 static void power_sequence_xpak(adapter_t* adapter) in power_sequence_xpak() argument
885 t1_tpi_read(adapter, A_ELMER0_GPI_STAT, &mod_detect); in power_sequence_xpak()
888 t1_tpi_read(adapter, A_ELMER0_GPO, &gpo); in power_sequence_xpak()
890 t1_tpi_write(adapter, A_ELMER0_GPO, gpo); in power_sequence_xpak()
894 int t1_get_board_rev(adapter_t *adapter, const struct board_info *bi, in t1_get_board_rev() argument
902 u32 val = readl(adapter->regs + A_TP_PC_CONFIG); in t1_get_board_rev()
920 static int board_init(adapter_t *adapter, const struct board_info *bi) in board_init() argument
927 t1_tpi_par(adapter, 0xf); in board_init()
928 t1_tpi_write(adapter, A_ELMER0_GPO, 0x800); in board_init()
931 t1_tpi_par(adapter, 0xf); in board_init()
932 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1800); in board_init()
937 power_sequence_xpak(adapter); in board_init()
945 t1_tpi_par(adapter, 0xf); in board_init()
946 t1_tpi_write(adapter, A_ELMER0_GPO, 0x804); in board_init()
950 t1_tpi_par(adapter, 0xf); in board_init()
951 t1_tpi_write(adapter, A_ELMER0_GPO, 0x1804); in board_init()
962 int t1_init_hw_modules(adapter_t *adapter) in t1_init_hw_modules() argument
965 const struct board_info *bi = board_info(adapter); in t1_init_hw_modules()
968 u32 val = readl(adapter->regs + A_MC4_CFG); in t1_init_hw_modules()
970 writel(val | F_READY | F_MC4_SLOW, adapter->regs + A_MC4_CFG); in t1_init_hw_modules()
972 adapter->regs + A_MC5_CONFIG); in t1_init_hw_modules()
975 if (adapter->espi && t1_espi_init(adapter->espi, bi->chip_mac, in t1_init_hw_modules()
979 if (t1_tp_reset(adapter->tp, &adapter->params.tp, bi->clock_core)) in t1_init_hw_modules()
982 err = t1_sge_configure(adapter->sge, &adapter->params.sge); in t1_init_hw_modules()
994 static void get_pci_mode(adapter_t *adapter, struct chelsio_pci_params *p) in get_pci_mode() argument
999 pci_read_config_dword(adapter->pdev, A_PCICFG_MODE, &pci_mode); in get_pci_mode()
1008 void t1_free_sw_modules(adapter_t *adapter) in t1_free_sw_modules() argument
1012 for_each_port(adapter, i) { in t1_free_sw_modules()
1013 struct cmac *mac = adapter->port[i].mac; in t1_free_sw_modules()
1014 struct cphy *phy = adapter->port[i].phy; in t1_free_sw_modules()
1022 if (adapter->sge) in t1_free_sw_modules()
1023 t1_sge_destroy(adapter->sge); in t1_free_sw_modules()
1024 if (adapter->tp) in t1_free_sw_modules()
1025 t1_tp_destroy(adapter->tp); in t1_free_sw_modules()
1026 if (adapter->espi) in t1_free_sw_modules()
1027 t1_espi_destroy(adapter->espi); in t1_free_sw_modules()
1051 int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi) in t1_init_sw_modules() argument
1055 adapter->params.brd_info = bi; in t1_init_sw_modules()
1056 adapter->params.nports = bi->port_number; in t1_init_sw_modules()
1057 adapter->params.stats_update_period = bi->gmac->stats_update_period; in t1_init_sw_modules()
1059 adapter->sge = t1_sge_create(adapter, &adapter->params.sge); in t1_init_sw_modules()
1060 if (!adapter->sge) { in t1_init_sw_modules()
1062 adapter->name); in t1_init_sw_modules()
1066 if (bi->espi_nports && !(adapter->espi = t1_espi_create(adapter))) { in t1_init_sw_modules()
1068 adapter->name); in t1_init_sw_modules()
1072 adapter->tp = t1_tp_create(adapter, &adapter->params.tp); in t1_init_sw_modules()
1073 if (!adapter->tp) { in t1_init_sw_modules()
1075 adapter->name); in t1_init_sw_modules()
1079 board_init(adapter, bi); in t1_init_sw_modules()
1080 bi->mdio_ops->init(adapter, bi); in t1_init_sw_modules()
1082 bi->gphy->reset(adapter); in t1_init_sw_modules()
1084 bi->gmac->reset(adapter); in t1_init_sw_modules()
1086 for_each_port(adapter, i) { in t1_init_sw_modules()
1091 adapter->port[i].phy = bi->gphy->create(adapter->port[i].dev, in t1_init_sw_modules()
1093 if (!adapter->port[i].phy) { in t1_init_sw_modules()
1095 adapter->name, i); in t1_init_sw_modules()
1099 adapter->port[i].mac = mac = bi->gmac->create(adapter, i); in t1_init_sw_modules()
1102 adapter->name, i); in t1_init_sw_modules()
1110 if (!t1_is_asic(adapter) || bi->chip_mac == CHBT_MAC_DUMMY) in t1_init_sw_modules()
1112 else if (vpd_macaddress_get(adapter, i, hw_addr)) { in t1_init_sw_modules()
1114 adapter->port[i].dev->name); in t1_init_sw_modules()
1117 memcpy(adapter->port[i].dev->dev_addr, hw_addr, ETH_ALEN); in t1_init_sw_modules()
1118 init_link_config(&adapter->port[i].link_config, bi); in t1_init_sw_modules()
1121 get_pci_mode(adapter, &adapter->params.pci); in t1_init_sw_modules()
1122 t1_interrupts_clear(adapter); in t1_init_sw_modules()
1126 t1_free_sw_modules(adapter); in t1_init_sw_modules()