Lines Matching refs:db
369 struct dmfe_board_info *db; /* board information structure */ in dmfe_init_one() local
396 dev = alloc_etherdev(sizeof(*db)); in dmfe_init_one()
440 db = netdev_priv(dev); in dmfe_init_one()
443 db->desc_pool_ptr = pci_alloc_consistent(pdev, sizeof(struct tx_desc) * in dmfe_init_one()
444 DESC_ALL_CNT + 0x20, &db->desc_pool_dma_ptr); in dmfe_init_one()
445 if (!db->desc_pool_ptr) { in dmfe_init_one()
450 db->buf_pool_ptr = pci_alloc_consistent(pdev, TX_BUF_ALLOC * in dmfe_init_one()
451 TX_DESC_CNT + 4, &db->buf_pool_dma_ptr); in dmfe_init_one()
452 if (!db->buf_pool_ptr) { in dmfe_init_one()
457 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; in dmfe_init_one()
458 db->first_tx_desc_dma = db->desc_pool_dma_ptr; in dmfe_init_one()
459 db->buf_pool_start = db->buf_pool_ptr; in dmfe_init_one()
460 db->buf_pool_dma_start = db->buf_pool_dma_ptr; in dmfe_init_one()
462 db->chip_id = ent->driver_data; in dmfe_init_one()
464 db->ioaddr = pci_iomap(pdev, 0, 0); in dmfe_init_one()
465 if (!db->ioaddr) { in dmfe_init_one()
470 db->chip_revision = pdev->revision; in dmfe_init_one()
471 db->wol_mode = 0; in dmfe_init_one()
473 db->pdev = pdev; in dmfe_init_one()
479 spin_lock_init(&db->lock); in dmfe_init_one()
483 if ( (pci_pmr == 0x10000) && (db->chip_revision == 0x31) ) in dmfe_init_one()
484 db->chip_type = 1; /* DM9102A E3 */ in dmfe_init_one()
486 db->chip_type = 0; in dmfe_init_one()
490 ((__le16 *) db->srom)[i] = in dmfe_init_one()
491 cpu_to_le16(read_srom_word(db->ioaddr, i)); in dmfe_init_one()
496 dev->dev_addr[i] = db->srom[20 + i]; in dmfe_init_one()
511 pci_iounmap(pdev, db->ioaddr); in dmfe_init_one()
514 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_init_one()
517 db->desc_pool_ptr, db->desc_pool_dma_ptr); in dmfe_init_one()
532 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_remove_one() local
539 pci_iounmap(db->pdev, db->ioaddr); in dmfe_remove_one()
540 pci_free_consistent(db->pdev, sizeof(struct tx_desc) * in dmfe_remove_one()
541 DESC_ALL_CNT + 0x20, db->desc_pool_ptr, in dmfe_remove_one()
542 db->desc_pool_dma_ptr); in dmfe_remove_one()
543 pci_free_consistent(db->pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, in dmfe_remove_one()
544 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_remove_one()
560 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_open() local
561 const int irq = db->pdev->irq; in dmfe_open()
571 db->cr6_data = CR6_DEFAULT | dmfe_cr6_user_set; in dmfe_open()
572 db->tx_packet_cnt = 0; in dmfe_open()
573 db->tx_queue_cnt = 0; in dmfe_open()
574 db->rx_avail_cnt = 0; in dmfe_open()
575 db->wait_reset = 0; in dmfe_open()
577 db->first_in_callback = 0; in dmfe_open()
578 db->NIC_capability = 0xf; /* All capability*/ in dmfe_open()
579 db->PHY_reg4 = 0x1e0; in dmfe_open()
582 if ( !chkmode || (db->chip_id == PCI_DM9132_ID) || in dmfe_open()
583 (db->chip_revision >= 0x30) ) { in dmfe_open()
584 db->cr6_data |= DMFE_TXTH_256; in dmfe_open()
585 db->cr0_data = CR0_DEFAULT; in dmfe_open()
586 db->dm910x_chk_mode=4; /* Enter the normal mode */ in dmfe_open()
588 db->cr6_data |= CR6_SFT; /* Store & Forward mode */ in dmfe_open()
589 db->cr0_data = 0; in dmfe_open()
590 db->dm910x_chk_mode = 1; /* Enter the check mode */ in dmfe_open()
600 init_timer(&db->timer); in dmfe_open()
601 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_open()
602 db->timer.data = (unsigned long)dev; in dmfe_open()
603 db->timer.function = dmfe_timer; in dmfe_open()
604 add_timer(&db->timer); in dmfe_open()
619 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_init_dm910x() local
620 void __iomem *ioaddr = db->ioaddr; in dmfe_init_dm910x()
627 dw32(DCR0, db->cr0_data); in dmfe_init_dm910x()
631 db->phy_addr = 1; in dmfe_init_dm910x()
634 dmfe_parse_srom(db); in dmfe_init_dm910x()
635 db->media_mode = dmfe_media_mode; in dmfe_init_dm910x()
639 if (db->chip_id == PCI_DM9009_ID) { in dmfe_init_dm910x()
646 if ( !(db->media_mode & 0x10) ) /* Force 1M mode */ in dmfe_init_dm910x()
647 dmfe_set_phyxcer(db); in dmfe_init_dm910x()
650 if ( !(db->media_mode & DMFE_AUTO) ) in dmfe_init_dm910x()
651 db->op_mode = db->media_mode; /* Force Mode */ in dmfe_init_dm910x()
657 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
660 if (db->chip_id == PCI_DM9132_ID) in dmfe_init_dm910x()
666 db->cr7_data = CR7_DEFAULT; in dmfe_init_dm910x()
667 dw32(DCR7, db->cr7_data); in dmfe_init_dm910x()
670 dw32(DCR15, db->cr15_data); in dmfe_init_dm910x()
673 db->cr6_data |= CR6_RXSC | CR6_TXSC | 0x40000; in dmfe_init_dm910x()
674 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
686 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_start_xmit() local
687 void __iomem *ioaddr = db->ioaddr; in dmfe_start_xmit()
703 spin_lock_irqsave(&db->lock, flags); in dmfe_start_xmit()
706 if (db->tx_queue_cnt >= TX_FREE_DESC_CNT) { in dmfe_start_xmit()
707 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
708 pr_err("No Tx resource %ld\n", db->tx_queue_cnt); in dmfe_start_xmit()
716 txptr = db->tx_insert_ptr; in dmfe_start_xmit()
721 db->tx_insert_ptr = txptr->next_tx_desc; in dmfe_start_xmit()
724 if ( (!db->tx_queue_cnt) && (db->tx_packet_cnt < TX_MAX_SEND_CNT) ) { in dmfe_start_xmit()
726 db->tx_packet_cnt++; /* Ready to send */ in dmfe_start_xmit()
730 db->tx_queue_cnt++; /* queue TX packet */ in dmfe_start_xmit()
735 if ( db->tx_queue_cnt < TX_FREE_DESC_CNT ) in dmfe_start_xmit()
739 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
740 dw32(DCR7, db->cr7_data); in dmfe_start_xmit()
756 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_stop() local
757 void __iomem *ioaddr = db->ioaddr; in dmfe_stop()
765 del_timer_sync(&db->timer); in dmfe_stop()
770 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); in dmfe_stop()
773 free_irq(db->pdev->irq, dev); in dmfe_stop()
776 dmfe_free_rxbuffer(db); in dmfe_stop()
781 db->tx_fifo_underrun, db->tx_excessive_collision, in dmfe_stop()
782 db->tx_late_collision, db->tx_no_carrier, db->tx_loss_carrier, in dmfe_stop()
783 db->tx_jabber_timeout, db->reset_count, db->reset_cr8, in dmfe_stop()
784 db->reset_fatal, db->reset_TXtimeout); in dmfe_stop()
799 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_interrupt() local
800 void __iomem *ioaddr = db->ioaddr; in dmfe_interrupt()
805 spin_lock_irqsave(&db->lock, flags); in dmfe_interrupt()
808 db->cr5_data = dr32(DCR5); in dmfe_interrupt()
809 dw32(DCR5, db->cr5_data); in dmfe_interrupt()
810 if ( !(db->cr5_data & 0xc1) ) { in dmfe_interrupt()
811 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
819 if (db->cr5_data & 0x2000) { in dmfe_interrupt()
821 DMFE_DBUG(1, "System bus error happen. CR5=", db->cr5_data); in dmfe_interrupt()
822 db->reset_fatal++; in dmfe_interrupt()
823 db->wait_reset = 1; /* Need to RESET */ in dmfe_interrupt()
824 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
829 if ( (db->cr5_data & 0x40) && db->rx_avail_cnt ) in dmfe_interrupt()
830 dmfe_rx_packet(dev, db); in dmfe_interrupt()
833 if (db->rx_avail_cnt<RX_DESC_CNT) in dmfe_interrupt()
837 if ( db->cr5_data & 0x01) in dmfe_interrupt()
838 dmfe_free_tx_pkt(dev, db); in dmfe_interrupt()
841 if (db->dm910x_chk_mode & 0x2) { in dmfe_interrupt()
842 db->dm910x_chk_mode = 0x4; in dmfe_interrupt()
843 db->cr6_data |= 0x100; in dmfe_interrupt()
844 update_cr6(db->cr6_data, ioaddr); in dmfe_interrupt()
848 dw32(DCR7, db->cr7_data); in dmfe_interrupt()
850 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
864 struct dmfe_board_info *db = netdev_priv(dev); in poll_dmfe() local
865 const int irq = db->pdev->irq; in poll_dmfe()
879 static void dmfe_free_tx_pkt(struct net_device *dev, struct dmfe_board_info *db) in dmfe_free_tx_pkt() argument
882 void __iomem *ioaddr = db->ioaddr; in dmfe_free_tx_pkt()
885 txptr = db->tx_remove_ptr; in dmfe_free_tx_pkt()
886 while(db->tx_packet_cnt) { in dmfe_free_tx_pkt()
892 db->tx_packet_cnt--; in dmfe_free_tx_pkt()
903 db->tx_fifo_underrun++; in dmfe_free_tx_pkt()
904 if ( !(db->cr6_data & CR6_SFT) ) { in dmfe_free_tx_pkt()
905 db->cr6_data = db->cr6_data | CR6_SFT; in dmfe_free_tx_pkt()
906 update_cr6(db->cr6_data, ioaddr); in dmfe_free_tx_pkt()
910 db->tx_excessive_collision++; in dmfe_free_tx_pkt()
912 db->tx_late_collision++; in dmfe_free_tx_pkt()
914 db->tx_no_carrier++; in dmfe_free_tx_pkt()
916 db->tx_loss_carrier++; in dmfe_free_tx_pkt()
918 db->tx_jabber_timeout++; in dmfe_free_tx_pkt()
926 db->tx_remove_ptr = txptr; in dmfe_free_tx_pkt()
929 if ( (db->tx_packet_cnt < TX_MAX_SEND_CNT) && db->tx_queue_cnt ) { in dmfe_free_tx_pkt()
931 db->tx_packet_cnt++; /* Ready to send */ in dmfe_free_tx_pkt()
932 db->tx_queue_cnt--; in dmfe_free_tx_pkt()
938 if ( db->tx_queue_cnt < TX_WAKE_DESC_CNT ) in dmfe_free_tx_pkt()
961 static void dmfe_rx_packet(struct net_device *dev, struct dmfe_board_info *db) in dmfe_rx_packet() argument
968 rxptr = db->rx_ready_ptr; in dmfe_rx_packet()
970 while(db->rx_avail_cnt) { in dmfe_rx_packet()
975 db->rx_avail_cnt--; in dmfe_rx_packet()
976 db->interval_rx_cnt++; in dmfe_rx_packet()
978 pci_unmap_single(db->pdev, le32_to_cpu(rxptr->rdes2), in dmfe_rx_packet()
985 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1003 ((db->cr6_data & CR6_PM) && (rxlen>6)) ) { in dmfe_rx_packet()
1007 if ( (db->dm910x_chk_mode & 1) && in dmfe_rx_packet()
1011 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1012 db->dm910x_chk_mode = 3; in dmfe_rx_packet()
1026 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1038 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1045 db->rx_ready_ptr = rxptr; in dmfe_rx_packet()
1054 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_set_filter_mode() local
1059 spin_lock_irqsave(&db->lock, flags); in dmfe_set_filter_mode()
1063 db->cr6_data |= CR6_PM | CR6_PBF; in dmfe_set_filter_mode()
1064 update_cr6(db->cr6_data, db->ioaddr); in dmfe_set_filter_mode()
1065 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1071 db->cr6_data &= ~(CR6_PM | CR6_PBF); in dmfe_set_filter_mode()
1072 db->cr6_data |= CR6_PAM; in dmfe_set_filter_mode()
1073 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1078 if (db->chip_id == PCI_DM9132_ID) in dmfe_set_filter_mode()
1082 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1102 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_set_wol() local
1108 db->wol_mode = wolinfo->wolopts; in dmfe_ethtool_set_wol()
1115 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_get_wol() local
1118 wolinfo->wolopts = db->wol_mode; in dmfe_ethtool_get_wol()
1137 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_timer() local
1138 void __iomem *ioaddr = db->ioaddr; in dmfe_timer()
1146 spin_lock_irqsave(&db->lock, flags); in dmfe_timer()
1149 if (db->first_in_callback == 0) { in dmfe_timer()
1150 db->first_in_callback = 1; in dmfe_timer()
1151 if (db->chip_type && (db->chip_id==PCI_DM9102_ID)) { in dmfe_timer()
1152 db->cr6_data &= ~0x40000; in dmfe_timer()
1153 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1154 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x1000, db->chip_id); in dmfe_timer()
1155 db->cr6_data |= 0x40000; in dmfe_timer()
1156 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1157 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_timer()
1158 add_timer(&db->timer); in dmfe_timer()
1159 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1166 if ( (db->dm910x_chk_mode & 0x1) && in dmfe_timer()
1168 db->dm910x_chk_mode = 0x4; in dmfe_timer()
1172 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { in dmfe_timer()
1173 db->reset_cr8++; in dmfe_timer()
1174 db->wait_reset = 1; in dmfe_timer()
1176 db->interval_rx_cnt = 0; in dmfe_timer()
1179 if ( db->tx_packet_cnt && in dmfe_timer()
1185 db->reset_TXtimeout++; in dmfe_timer()
1186 db->wait_reset = 1; in dmfe_timer()
1191 if (db->wait_reset) { in dmfe_timer()
1192 DMFE_DBUG(0, "Dynamic Reset device", db->tx_packet_cnt); in dmfe_timer()
1193 db->reset_count++; in dmfe_timer()
1195 db->first_in_callback = 0; in dmfe_timer()
1196 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1197 add_timer(&db->timer); in dmfe_timer()
1198 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1203 if (db->chip_id == PCI_DM9132_ID) in dmfe_timer()
1208 if ( ((db->chip_id == PCI_DM9102_ID) && in dmfe_timer()
1209 (db->chip_revision == 0x30)) || in dmfe_timer()
1210 ((db->chip_id == PCI_DM9132_ID) && in dmfe_timer()
1211 (db->chip_revision == 0x10)) ) { in dmfe_timer()
1230 dmfe_phy_read (db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_timer()
1231 link_ok_phy = (dmfe_phy_read (db->ioaddr, in dmfe_timer()
1232 db->phy_addr, 1, db->chip_id) & 0x4) ? 1 : 0; in dmfe_timer()
1246 if ( !(db->media_mode & 0x38) ) in dmfe_timer()
1247 dmfe_phy_write(db->ioaddr, db->phy_addr, in dmfe_timer()
1248 0, 0x1000, db->chip_id); in dmfe_timer()
1251 if (db->media_mode & DMFE_AUTO) { in dmfe_timer()
1253 db->cr6_data|=0x00040000; /* bit18=1, MII */ in dmfe_timer()
1254 db->cr6_data&=~0x00000200; /* bit9=0, HD mode */ in dmfe_timer()
1255 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1262 if ( !(db->media_mode & DMFE_AUTO) || !dmfe_sense_speed(db)) { in dmfe_timer()
1264 SHOW_MEDIA_TYPE(db->op_mode); in dmfe_timer()
1267 dmfe_process_mode(db); in dmfe_timer()
1271 if (db->HPNA_command & 0xf00) { in dmfe_timer()
1272 db->HPNA_timer--; in dmfe_timer()
1273 if (!db->HPNA_timer) in dmfe_timer()
1274 dmfe_HPNA_remote_cmd_chk(db); in dmfe_timer()
1278 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1279 add_timer(&db->timer); in dmfe_timer()
1280 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1294 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_dynamic_reset() local
1295 void __iomem *ioaddr = db->ioaddr; in dmfe_dynamic_reset()
1300 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ in dmfe_dynamic_reset()
1301 update_cr6(db->cr6_data, ioaddr); in dmfe_dynamic_reset()
1309 dmfe_free_rxbuffer(db); in dmfe_dynamic_reset()
1312 db->tx_packet_cnt = 0; in dmfe_dynamic_reset()
1313 db->tx_queue_cnt = 0; in dmfe_dynamic_reset()
1314 db->rx_avail_cnt = 0; in dmfe_dynamic_reset()
1316 db->wait_reset = 0; in dmfe_dynamic_reset()
1330 static void dmfe_free_rxbuffer(struct dmfe_board_info * db) in dmfe_free_rxbuffer() argument
1335 while (db->rx_avail_cnt) { in dmfe_free_rxbuffer()
1336 dev_kfree_skb(db->rx_ready_ptr->rx_skb_ptr); in dmfe_free_rxbuffer()
1337 db->rx_ready_ptr = db->rx_ready_ptr->next_rx_desc; in dmfe_free_rxbuffer()
1338 db->rx_avail_cnt--; in dmfe_free_rxbuffer()
1347 static void dmfe_reuse_skb(struct dmfe_board_info *db, struct sk_buff * skb) in dmfe_reuse_skb() argument
1349 struct rx_desc *rxptr = db->rx_insert_ptr; in dmfe_reuse_skb()
1353 rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, in dmfe_reuse_skb()
1357 db->rx_avail_cnt++; in dmfe_reuse_skb()
1358 db->rx_insert_ptr = rxptr->next_rx_desc; in dmfe_reuse_skb()
1360 DMFE_DBUG(0, "SK Buffer reuse method error", db->rx_avail_cnt); in dmfe_reuse_skb()
1371 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_descriptor_init() local
1372 void __iomem *ioaddr = db->ioaddr; in dmfe_descriptor_init()
1383 db->tx_insert_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1384 db->tx_remove_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1385 dw32(DCR4, db->first_tx_desc_dma); /* TX DESC address */ in dmfe_descriptor_init()
1388 db->first_rx_desc = (void *)db->first_tx_desc + in dmfe_descriptor_init()
1391 db->first_rx_desc_dma = db->first_tx_desc_dma + in dmfe_descriptor_init()
1393 db->rx_insert_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1394 db->rx_ready_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1395 dw32(DCR3, db->first_rx_desc_dma); /* RX DESC address */ in dmfe_descriptor_init()
1398 tmp_buf = db->buf_pool_start; in dmfe_descriptor_init()
1399 tmp_buf_dma = db->buf_pool_dma_start; in dmfe_descriptor_init()
1400 tmp_tx_dma = db->first_tx_desc_dma; in dmfe_descriptor_init()
1401 for (tmp_tx = db->first_tx_desc, i = 0; i < TX_DESC_CNT; i++, tmp_tx++) { in dmfe_descriptor_init()
1412 (--tmp_tx)->tdes3 = cpu_to_le32(db->first_tx_desc_dma); in dmfe_descriptor_init()
1413 tmp_tx->next_tx_desc = db->first_tx_desc; in dmfe_descriptor_init()
1416 tmp_rx_dma=db->first_rx_desc_dma; in dmfe_descriptor_init()
1417 for (tmp_rx = db->first_rx_desc, i = 0; i < RX_DESC_CNT; i++, tmp_rx++) { in dmfe_descriptor_init()
1424 (--tmp_rx)->rdes3 = cpu_to_le32(db->first_rx_desc_dma); in dmfe_descriptor_init()
1425 tmp_rx->next_rx_desc = db->first_rx_desc; in dmfe_descriptor_init()
1456 struct dmfe_board_info *db = netdev_priv(dev); in dm9132_id_table() local
1457 void __iomem *ioaddr = db->ioaddr + 0xc0; in dm9132_id_table()
1494 struct dmfe_board_info *db = netdev_priv(dev); in send_filter_frame() local
1503 txptr = db->tx_insert_ptr; in send_filter_frame()
1532 db->tx_insert_ptr = txptr->next_tx_desc; in send_filter_frame()
1536 if (!db->tx_packet_cnt) { in send_filter_frame()
1537 void __iomem *ioaddr = db->ioaddr; in send_filter_frame()
1540 db->tx_packet_cnt++; in send_filter_frame()
1542 update_cr6(db->cr6_data | 0x2000, ioaddr); in send_filter_frame()
1544 update_cr6(db->cr6_data, ioaddr); in send_filter_frame()
1547 db->tx_queue_cnt++; /* Put in TX queue */ in send_filter_frame()
1558 struct dmfe_board_info *db = netdev_priv(dev); in allocate_rx_buffer() local
1562 rxptr = db->rx_insert_ptr; in allocate_rx_buffer()
1564 while(db->rx_avail_cnt < RX_DESC_CNT) { in allocate_rx_buffer()
1568 rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->data, in allocate_rx_buffer()
1573 db->rx_avail_cnt++; in allocate_rx_buffer()
1576 db->rx_insert_ptr = rxptr; in allocate_rx_buffer()
1640 static u8 dmfe_sense_speed(struct dmfe_board_info *db) in dmfe_sense_speed() argument
1642 void __iomem *ioaddr = db->ioaddr; in dmfe_sense_speed()
1647 update_cr6(db->cr6_data & ~0x40000, ioaddr); in dmfe_sense_speed()
1649 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1650 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1653 if (db->chip_id == PCI_DM9132_ID) /* DM9132 */ in dmfe_sense_speed()
1654 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1655 db->phy_addr, 7, db->chip_id) & 0xf000; in dmfe_sense_speed()
1657 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1658 db->phy_addr, 17, db->chip_id) & 0xf000; in dmfe_sense_speed()
1660 case 0x1000: db->op_mode = DMFE_10MHF; break; in dmfe_sense_speed()
1661 case 0x2000: db->op_mode = DMFE_10MFD; break; in dmfe_sense_speed()
1662 case 0x4000: db->op_mode = DMFE_100MHF; break; in dmfe_sense_speed()
1663 case 0x8000: db->op_mode = DMFE_100MFD; break; in dmfe_sense_speed()
1664 default: db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1669 db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1684 static void dmfe_set_phyxcer(struct dmfe_board_info *db) in dmfe_set_phyxcer() argument
1686 void __iomem *ioaddr = db->ioaddr; in dmfe_set_phyxcer()
1690 db->cr6_data &= ~0x40000; in dmfe_set_phyxcer()
1691 update_cr6(db->cr6_data, ioaddr); in dmfe_set_phyxcer()
1694 if (db->chip_id == PCI_DM9009_ID) { in dmfe_set_phyxcer()
1695 phy_reg = dmfe_phy_read(db->ioaddr, in dmfe_set_phyxcer()
1696 db->phy_addr, 18, db->chip_id) & ~0x1000; in dmfe_set_phyxcer()
1698 dmfe_phy_write(db->ioaddr, in dmfe_set_phyxcer()
1699 db->phy_addr, 18, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1703 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; in dmfe_set_phyxcer()
1705 if (db->media_mode & DMFE_AUTO) { in dmfe_set_phyxcer()
1707 phy_reg |= db->PHY_reg4; in dmfe_set_phyxcer()
1710 switch(db->media_mode) { in dmfe_set_phyxcer()
1716 if (db->chip_id == PCI_DM9009_ID) phy_reg &= 0x61; in dmfe_set_phyxcer()
1721 phy_reg|=db->PHY_reg4; in dmfe_set_phyxcer()
1722 db->media_mode|=DMFE_AUTO; in dmfe_set_phyxcer()
1724 dmfe_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1727 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_set_phyxcer()
1728 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1800, db->chip_id); in dmfe_set_phyxcer()
1729 if ( !db->chip_type ) in dmfe_set_phyxcer()
1730 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); in dmfe_set_phyxcer()
1741 static void dmfe_process_mode(struct dmfe_board_info *db) in dmfe_process_mode() argument
1746 if (db->op_mode & 0x4) in dmfe_process_mode()
1747 db->cr6_data |= CR6_FDM; /* Set Full Duplex Bit */ in dmfe_process_mode()
1749 db->cr6_data &= ~CR6_FDM; /* Clear Full Duplex Bit */ in dmfe_process_mode()
1752 if (db->op_mode & 0x10) /* 1M HomePNA */ in dmfe_process_mode()
1753 db->cr6_data |= 0x40000;/* External MII select */ in dmfe_process_mode()
1755 db->cr6_data &= ~0x40000;/* Internal 10/100 transciver */ in dmfe_process_mode()
1757 update_cr6(db->cr6_data, db->ioaddr); in dmfe_process_mode()
1760 if ( !(db->media_mode & 0x18)) { in dmfe_process_mode()
1762 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 6, db->chip_id); in dmfe_process_mode()
1766 switch(db->op_mode) { in dmfe_process_mode()
1772 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1773 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1774 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_process_mode()
1776 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1777 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1919 static void dmfe_parse_srom(struct dmfe_board_info * db) in dmfe_parse_srom() argument
1921 char * srom = db->srom; in dmfe_parse_srom()
1927 db->cr15_data = CR15_DEFAULT; in dmfe_parse_srom()
1933 db->NIC_capability = le16_to_cpup((__le16 *) (srom + 34)); in dmfe_parse_srom()
1934 db->PHY_reg4 = 0; in dmfe_parse_srom()
1936 switch( db->NIC_capability & tmp_reg ) { in dmfe_parse_srom()
1937 case 0x1: db->PHY_reg4 |= 0x0020; break; in dmfe_parse_srom()
1938 case 0x2: db->PHY_reg4 |= 0x0040; break; in dmfe_parse_srom()
1939 case 0x4: db->PHY_reg4 |= 0x0080; break; in dmfe_parse_srom()
1940 case 0x8: db->PHY_reg4 |= 0x0100; break; in dmfe_parse_srom()
1958 db->cr15_data |= 0x40; in dmfe_parse_srom()
1962 db->cr15_data |= 0x400; in dmfe_parse_srom()
1966 db->cr15_data |= 0x9800; in dmfe_parse_srom()
1970 db->HPNA_command = 1; in dmfe_parse_srom()
1974 db->HPNA_command |= 0x8000; in dmfe_parse_srom()
1979 case 0: db->HPNA_command |= 0x0904; break; in dmfe_parse_srom()
1980 case 1: db->HPNA_command |= 0x0a00; break; in dmfe_parse_srom()
1981 case 2: db->HPNA_command |= 0x0506; break; in dmfe_parse_srom()
1982 case 3: db->HPNA_command |= 0x0602; break; in dmfe_parse_srom()
1986 case 0: db->HPNA_command |= 0x0004; break; in dmfe_parse_srom()
1987 case 1: db->HPNA_command |= 0x0000; break; in dmfe_parse_srom()
1988 case 2: db->HPNA_command |= 0x0006; break; in dmfe_parse_srom()
1989 case 3: db->HPNA_command |= 0x0002; break; in dmfe_parse_srom()
1993 db->HPNA_present = 0; in dmfe_parse_srom()
1994 update_cr6(db->cr6_data | 0x40000, db->ioaddr); in dmfe_parse_srom()
1995 tmp_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 3, db->chip_id); in dmfe_parse_srom()
1998 db->HPNA_timer = 8; in dmfe_parse_srom()
1999 if ( dmfe_phy_read(db->ioaddr, db->phy_addr, 31, db->chip_id) == 0x4404) { in dmfe_parse_srom()
2001 db->HPNA_present = 1; in dmfe_parse_srom()
2002 dmfe_program_DM9801(db, tmp_reg); in dmfe_parse_srom()
2005 db->HPNA_present = 2; in dmfe_parse_srom()
2006 dmfe_program_DM9802(db); in dmfe_parse_srom()
2017 static void dmfe_program_DM9801(struct dmfe_board_info * db, int HPNA_rev) in dmfe_program_DM9801() argument
2024 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2025 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 24, db->chip_id); in dmfe_program_DM9801()
2027 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2030 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2032 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2038 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2039 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2041 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2045 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9801()
2046 dmfe_phy_write(db->ioaddr, db->phy_addr, 17, reg17, db->chip_id); in dmfe_program_DM9801()
2047 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, reg25, db->chip_id); in dmfe_program_DM9801()
2055 static void dmfe_program_DM9802(struct dmfe_board_info * db) in dmfe_program_DM9802() argument
2060 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9802()
2061 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9802()
2063 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, phy_reg, db->chip_id); in dmfe_program_DM9802()
2072 static void dmfe_HPNA_remote_cmd_chk(struct dmfe_board_info * db) in dmfe_HPNA_remote_cmd_chk() argument
2077 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id) & 0x60; in dmfe_HPNA_remote_cmd_chk()
2086 if ( phy_reg != (db->HPNA_command & 0x0f00) ) { in dmfe_HPNA_remote_cmd_chk()
2087 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, in dmfe_HPNA_remote_cmd_chk()
2088 db->chip_id); in dmfe_HPNA_remote_cmd_chk()
2089 db->HPNA_timer=8; in dmfe_HPNA_remote_cmd_chk()
2091 db->HPNA_timer=600; /* Match, every 10 minutes, check */ in dmfe_HPNA_remote_cmd_chk()
2110 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_suspend() local
2111 void __iomem *ioaddr = db->ioaddr; in dmfe_suspend()
2118 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); in dmfe_suspend()
2119 update_cr6(db->cr6_data, ioaddr); in dmfe_suspend()
2126 dmfe_free_rxbuffer(db); in dmfe_suspend()
2132 if (db->wol_mode & WAKE_PHY) in dmfe_suspend()
2134 if (db->wol_mode & WAKE_MAGIC) in dmfe_suspend()