Lines Matching refs:reg

75 MLXSW_ITEM32(reg, sgcr, llb, 0x04, 0, 1);
101 MLXSW_ITEM_BUF(reg, spad, base_mac, 0x02, 6);
121 MLXSW_ITEM32(reg, smid, swid, 0x00, 24, 8);
128 MLXSW_ITEM32(reg, smid, mid, 0x00, 0, 16);
134 MLXSW_ITEM_BIT_ARRAY(reg, smid, port, 0x20, 0x20, 1);
140 MLXSW_ITEM_BIT_ARRAY(reg, smid, port_mask, 0x220, 0x20, 1);
174 MLXSW_ITEM32(reg, sspr, m, 0x00, 31, 1);
181 MLXSW_ITEM32(reg, sspr, local_port, 0x00, 16, 8);
189 MLXSW_ITEM32(reg, sspr, sub_port, 0x00, 8, 8);
199 MLXSW_ITEM32(reg, sspr, system_port, 0x04, 0, 16);
227 MLXSW_ITEM32(reg, sfdat, swid, 0x00, 24, 8);
236 MLXSW_ITEM32(reg, sfdat, age_time, 0x04, 0, 20);
268 MLXSW_ITEM32(reg, sfd, swid, 0x00, 24, 8);
302 MLXSW_ITEM32(reg, sfd, op, 0x04, 30, 2);
311 MLXSW_ITEM32(reg, sfd, record_locator, 0x04, 0, 30);
320 MLXSW_ITEM32(reg, sfd, num_rec, 0x08, 0, 8);
334 MLXSW_ITEM32_INDEXED(reg, sfd, rec_swid, MLXSW_REG_SFD_BASE_LEN, 24, 8,
347 MLXSW_ITEM32_INDEXED(reg, sfd, rec_type, MLXSW_REG_SFD_BASE_LEN, 20, 4,
365 MLXSW_ITEM32_INDEXED(reg, sfd, rec_policy, MLXSW_REG_SFD_BASE_LEN, 18, 2,
374 MLXSW_ITEM32_INDEXED(reg, sfd, rec_a, MLXSW_REG_SFD_BASE_LEN, 16, 1,
381 MLXSW_ITEM_BUF_INDEXED(reg, sfd, rec_mac, MLXSW_REG_SFD_BASE_LEN, 6,
401 MLXSW_ITEM32_INDEXED(reg, sfd, rec_action, MLXSW_REG_SFD_BASE_LEN, 28, 4,
410 MLXSW_ITEM32_INDEXED(reg, sfd, uc_sub_port, MLXSW_REG_SFD_BASE_LEN, 16, 8,
423 MLXSW_ITEM32_INDEXED(reg, sfd, uc_fid_vid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
430 MLXSW_ITEM32_INDEXED(reg, sfd, uc_system_port, MLXSW_REG_SFD_BASE_LEN, 0, 16,
476 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_sub_port, MLXSW_REG_SFD_BASE_LEN, 16, 8,
489 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_fid_vid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
496 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_lag_vid, MLXSW_REG_SFD_BASE_LEN, 16, 12,
503 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_lag_id, MLXSW_REG_SFD_BASE_LEN, 0, 10,
539 MLXSW_ITEM32_INDEXED(reg, sfd, mc_pgi, MLXSW_REG_SFD_BASE_LEN, 16, 13,
547 MLXSW_ITEM32_INDEXED(reg, sfd, mc_fid_vid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
556 MLXSW_ITEM32_INDEXED(reg, sfd, mc_mid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
592 MLXSW_ITEM32(reg, sfn, swid, 0x00, 24, 8);
598 MLXSW_ITEM32(reg, sfn, end, 0x04, 20, 1);
608 MLXSW_ITEM32(reg, sfn, num_rec, 0x04, 0, 8);
622 MLXSW_ITEM32_INDEXED(reg, sfn, rec_swid, MLXSW_REG_SFN_BASE_LEN, 24, 8,
640 MLXSW_ITEM32_INDEXED(reg, sfn, rec_type, MLXSW_REG_SFN_BASE_LEN, 20, 4,
647 MLXSW_ITEM_BUF_INDEXED(reg, sfn, rec_mac, MLXSW_REG_SFN_BASE_LEN, 6,
655 MLXSW_ITEM32_INDEXED(reg, sfn, mac_sub_port, MLXSW_REG_SFN_BASE_LEN, 16, 8,
662 MLXSW_ITEM32_INDEXED(reg, sfn, mac_fid, MLXSW_REG_SFN_BASE_LEN, 0, 16,
669 MLXSW_ITEM32_INDEXED(reg, sfn, mac_system_port, MLXSW_REG_SFN_BASE_LEN, 0, 16,
685 MLXSW_ITEM32_INDEXED(reg, sfn, mac_lag_lag_id, MLXSW_REG_SFN_BASE_LEN, 0, 10,
713 MLXSW_ITEM32(reg, spms, local_port, 0x00, 16, 8);
730 MLXSW_ITEM_BIT_ARRAY(reg, spms, state, 0x04, 0x400, 2);
760 MLXSW_ITEM32(reg, spvid, local_port, 0x00, 16, 8);
767 MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8);
773 MLXSW_ITEM32(reg, spvid, pvid, 0x04, 0, 12);
806 MLXSW_ITEM32(reg, spvm, pt, 0x00, 31, 1);
813 MLXSW_ITEM32(reg, spvm, pte, 0x00, 30, 1);
819 MLXSW_ITEM32(reg, spvm, local_port, 0x00, 16, 8);
826 MLXSW_ITEM32(reg, spvm, sub_port, 0x00, 8, 8);
832 MLXSW_ITEM32(reg, spvm, num_rec, 0x00, 0, 8);
838 MLXSW_ITEM32_INDEXED(reg, spvm, rec_i,
846 MLXSW_ITEM32_INDEXED(reg, spvm, rec_e,
855 MLXSW_ITEM32_INDEXED(reg, spvm, rec_u,
863 MLXSW_ITEM32_INDEXED(reg, spvm, rec_vid,
905 MLXSW_ITEM32(reg, spaft, local_port, 0x00, 16, 8);
912 MLXSW_ITEM32(reg, spaft, sub_port, 0x00, 8, 8);
918 MLXSW_ITEM32(reg, spaft, allow_untagged, 0x04, 31, 1);
924 MLXSW_ITEM32(reg, spaft, allow_prio_tagged, 0x04, 30, 1);
930 MLXSW_ITEM32(reg, spaft, allow_tagged, 0x04, 29, 1);
971 MLXSW_ITEM32(reg, sfgc, type, 0x00, 0, 4);
983 MLXSW_ITEM32(reg, sfgc, bridge_type, 0x04, 24, 3);
999 MLXSW_ITEM32(reg, sfgc, table_type, 0x04, 16, 3);
1006 MLXSW_ITEM32(reg, sfgc, flood_table, 0x04, 0, 6);
1012 MLXSW_ITEM32(reg, sfgc, mid, 0x08, 0, 16);
1018 MLXSW_ITEM32(reg, sfgc, counter_set_type, 0x0C, 24, 8);
1024 MLXSW_ITEM32(reg, sfgc, counter_index, 0x0C, 0, 24);
1057 MLXSW_ITEM32(reg, sftr, swid, 0x00, 24, 8);
1064 MLXSW_ITEM32(reg, sftr, flood_table, 0x00, 16, 6);
1071 MLXSW_ITEM32(reg, sftr, index, 0x00, 0, 16);
1077 MLXSW_ITEM32(reg, sftr, table_type, 0x04, 16, 3);
1083 MLXSW_ITEM32(reg, sftr, range, 0x04, 0, 16);
1089 MLXSW_ITEM_BIT_ARRAY(reg, sftr, port, 0x20, 0x20, 1);
1095 MLXSW_ITEM_BIT_ARRAY(reg, sftr, port_mask, 0x220, 0x20, 1);
1130 MLXSW_ITEM32(reg, sfdf, swid, 0x00, 24, 8);
1151 MLXSW_ITEM32(reg, sfdf, flush_type, 0x04, 28, 4);
1159 MLXSW_ITEM32(reg, sfdf, flush_static, 0x04, 24, 1);
1173 MLXSW_ITEM32(reg, sfdf, fid, 0x0C, 0, 16);
1179 MLXSW_ITEM32(reg, sfdf, system_port, 0x0C, 0, 16);
1185 MLXSW_ITEM32(reg, sfdf, port_fid_system_port, 0x08, 0, 16);
1191 MLXSW_ITEM32(reg, sfdf, lag_id, 0x0C, 0, 10);
1197 MLXSW_ITEM32(reg, sfdf, lag_fid_lag_id, 0x08, 0, 10);
1227 MLXSW_ITEM32(reg, sldr, op, 0x00, 29, 3);
1233 MLXSW_ITEM32(reg, sldr, lag_id, 0x00, 0, 10);
1255 MLXSW_ITEM32(reg, sldr, num_ports, 0x04, 24, 8);
1261 MLXSW_ITEM32_INDEXED(reg, sldr, system_port, 0x08, 0, 16, 4, 0, false);
1308 MLXSW_ITEM32(reg, slcr, pp, 0x00, 24, 1);
1317 MLXSW_ITEM32(reg, slcr, local_port, 0x00, 16, 8);
1329 MLXSW_ITEM32(reg, slcr, type, 0x00, 0, 4);
1389 MLXSW_ITEM32(reg, slcr, lag_hash, 0x04, 0, 20);
1424 MLXSW_ITEM32(reg, slcor, col, 0x00, 30, 2);
1431 MLXSW_ITEM32(reg, slcor, local_port, 0x00, 16, 8);
1437 MLXSW_ITEM32(reg, slcor, lag_id, 0x00, 0, 10);
1444 MLXSW_ITEM32(reg, slcor, port_index, 0x04, 0, 10);
1502 MLXSW_ITEM32(reg, spmlr, local_port, 0x00, 16, 8);
1509 MLXSW_ITEM32(reg, spmlr, sub_port, 0x00, 8, 8);
1528 MLXSW_ITEM32(reg, spmlr, learn_mode, 0x04, 30, 2);
1556 MLXSW_ITEM32(reg, svfa, swid, 0x00, 24, 8);
1564 MLXSW_ITEM32(reg, svfa, local_port, 0x00, 16, 8);
1579 MLXSW_ITEM32(reg, svfa, mapping_table, 0x00, 8, 3);
1588 MLXSW_ITEM32(reg, svfa, v, 0x00, 0, 1);
1594 MLXSW_ITEM32(reg, svfa, fid, 0x04, 16, 16);
1600 MLXSW_ITEM32(reg, svfa, vid, 0x04, 0, 12);
1608 MLXSW_ITEM32(reg, svfa, counter_set_type, 0x08, 24, 8);
1616 MLXSW_ITEM32(reg, svfa, counter_index, 0x08, 0, 24);
1650 MLXSW_ITEM32(reg, svpe, local_port, 0x00, 16, 8);
1658 MLXSW_ITEM32(reg, svpe, vp_en, 0x00, 8, 1);
1691 MLXSW_ITEM32(reg, sfmr, op, 0x00, 24, 4);
1697 MLXSW_ITEM32(reg, sfmr, fid, 0x00, 0, 16);
1705 MLXSW_ITEM32(reg, sfmr, fid_offset, 0x08, 0, 16);
1714 MLXSW_ITEM32(reg, sfmr, vtfp, 0x0C, 31, 1);
1722 MLXSW_ITEM32(reg, sfmr, nve_tunnel_flood_ptr, 0x0C, 0, 24);
1731 MLXSW_ITEM32(reg, sfmr, vv, 0x10, 31, 1);
1739 MLXSW_ITEM32(reg, sfmr, vni, 0x10, 0, 24);
1776 MLXSW_ITEM32(reg, spvmlr, local_port, 0x00, 16, 8);
1782 MLXSW_ITEM32(reg, spvmlr, num_rec, 0x00, 0, 8);
1789 MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_learn_enable, MLXSW_REG_SPVMLR_BASE_LEN,
1796 MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_vid, MLXSW_REG_SPVMLR_BASE_LEN, 0, 12,
1837 MLXSW_ITEM32(reg, qtct, local_port, 0x00, 16, 8);
1844 MLXSW_ITEM32(reg, qtct, sub_port, 0x00, 8, 8);
1850 MLXSW_ITEM32(reg, qtct, switch_prio, 0x00, 0, 4);
1860 MLXSW_ITEM32(reg, qtct, tclass, 0x04, 0, 4);
1889 MLXSW_ITEM32(reg, qeec, local_port, 0x00, 16, 8);
1905 MLXSW_ITEM32(reg, qeec, element_hierarchy, 0x04, 16, 4);
1911 MLXSW_ITEM32(reg, qeec, element_index, 0x04, 0, 8);
1919 MLXSW_ITEM32(reg, qeec, next_element_index, 0x08, 0, 8);
1935 MLXSW_ITEM32(reg, qeec, pb, 0x0C, 28, 1);
1944 MLXSW_ITEM32(reg, qeec, mase, 0x10, 31, 1);
1955 MLXSW_ITEM32(reg, qeec, max_shaper_rate, 0x10, 0, 28);
1964 MLXSW_ITEM32(reg, qeec, de, 0x18, 31, 1);
1973 MLXSW_ITEM32(reg, qeec, dwrr, 0x18, 15, 1);
1983 MLXSW_ITEM32(reg, qeec, dwrr_weight, 0x18, 0, 8);
2013 MLXSW_ITEM32(reg, pmlp, rxtx, 0x00, 31, 1);
2019 MLXSW_ITEM32(reg, pmlp, local_port, 0x00, 16, 8);
2028 MLXSW_ITEM32(reg, pmlp, width, 0x00, 0, 8);
2034 MLXSW_ITEM32_INDEXED(reg, pmlp, module, 0x04, 0, 8, 0x04, 0x00, false);
2040 MLXSW_ITEM32_INDEXED(reg, pmlp, tx_lane, 0x04, 16, 2, 0x04, 0x00, false);
2047 MLXSW_ITEM32_INDEXED(reg, pmlp, rx_lane, 0x04, 24, 2, 0x04, 0x00, false);
2071 MLXSW_ITEM32(reg, pmtu, local_port, 0x00, 16, 8);
2080 MLXSW_ITEM32(reg, pmtu, max_mtu, 0x04, 16, 16);
2088 MLXSW_ITEM32(reg, pmtu, admin_mtu, 0x08, 16, 16);
2097 MLXSW_ITEM32(reg, pmtu, oper_mtu, 0x0C, 16, 16);
2128 MLXSW_ITEM32(reg, ptys, local_port, 0x00, 16, 8);
2139 MLXSW_ITEM32(reg, ptys, proto_mask, 0x00, 0, 3);
2151 MLXSW_ITEM32(reg, ptys, an_status, 0x04, 28, 4);
2186 MLXSW_ITEM32(reg, ptys, eth_proto_cap, 0x0C, 0, 32);
2192 MLXSW_ITEM32(reg, ptys, eth_proto_admin, 0x18, 0, 32);
2198 MLXSW_ITEM32(reg, ptys, eth_proto_oper, 0x24, 0, 32);
2205 MLXSW_ITEM32(reg, ptys, eth_proto_lp_advertise, 0x30, 0, 32);
2246 MLXSW_ITEM32(reg, ppad, single_base_mac, 0x00, 28, 1);
2252 MLXSW_ITEM32(reg, ppad, local_port, 0x00, 16, 8);
2259 MLXSW_ITEM_BUF(reg, ppad, mac, 0x02, 6);
2288 MLXSW_ITEM32(reg, paos, swid, 0x00, 24, 8);
2294 MLXSW_ITEM32(reg, paos, local_port, 0x00, 16, 8);
2305 MLXSW_ITEM32(reg, paos, admin_status, 0x00, 8, 4);
2315 MLXSW_ITEM32(reg, paos, oper_status, 0x00, 0, 4);
2321 MLXSW_ITEM32(reg, paos, ase, 0x04, 31, 1);
2328 MLXSW_ITEM32(reg, paos, ee, 0x04, 30, 1);
2337 MLXSW_ITEM32(reg, paos, e, 0x04, 0, 2);
2368 MLXSW_ITEM32(reg, pfcc, local_port, 0x00, 16, 8);
2376 MLXSW_ITEM32(reg, pfcc, pnat, 0x00, 14, 2);
2385 MLXSW_ITEM32(reg, pfcc, shl_cap, 0x00, 1, 1);
2394 MLXSW_ITEM32(reg, pfcc, shl_opr, 0x00, 0, 1);
2406 MLXSW_ITEM32(reg, pfcc, ppan, 0x04, 28, 4);
2413 MLXSW_ITEM32(reg, pfcc, prio_mask_tx, 0x04, 16, 8);
2420 MLXSW_ITEM32(reg, pfcc, prio_mask_rx, 0x04, 0, 8);
2428 MLXSW_ITEM32(reg, pfcc, pptx, 0x08, 31, 1);
2436 MLXSW_ITEM32(reg, pfcc, aptx, 0x08, 30, 1);
2448 MLXSW_ITEM32(reg, pfcc, pfctx, 0x08, 16, 8);
2456 MLXSW_ITEM32(reg, pfcc, pprx, 0x0C, 31, 1);
2464 MLXSW_ITEM32(reg, pfcc, aprx, 0x0C, 30, 1);
2473 MLXSW_ITEM32(reg, pfcc, pfcrx, 0x0C, 16, 8);
2512 MLXSW_ITEM32(reg, ppcnt, swid, 0x00, 24, 8);
2520 MLXSW_ITEM32(reg, ppcnt, local_port, 0x00, 16, 8);
2528 MLXSW_ITEM32(reg, ppcnt, pnat, 0x00, 14, 2);
2551 MLXSW_ITEM32(reg, ppcnt, grp, 0x00, 0, 6);
2559 MLXSW_ITEM32(reg, ppcnt, clr, 0x04, 31, 1);
2569 MLXSW_ITEM32(reg, ppcnt, prio_tc, 0x04, 0, 5);
2576 MLXSW_ITEM64(reg, ppcnt, a_frames_transmitted_ok,
2582 MLXSW_ITEM64(reg, ppcnt, a_frames_received_ok,
2588 MLXSW_ITEM64(reg, ppcnt, a_frame_check_sequence_errors,
2594 MLXSW_ITEM64(reg, ppcnt, a_alignment_errors,
2600 MLXSW_ITEM64(reg, ppcnt, a_octets_transmitted_ok,
2606 MLXSW_ITEM64(reg, ppcnt, a_octets_received_ok,
2612 MLXSW_ITEM64(reg, ppcnt, a_multicast_frames_xmitted_ok,
2618 MLXSW_ITEM64(reg, ppcnt, a_broadcast_frames_xmitted_ok,
2624 MLXSW_ITEM64(reg, ppcnt, a_multicast_frames_received_ok,
2630 MLXSW_ITEM64(reg, ppcnt, a_broadcast_frames_received_ok,
2636 MLXSW_ITEM64(reg, ppcnt, a_in_range_length_errors,
2642 MLXSW_ITEM64(reg, ppcnt, a_out_of_range_length_field,
2648 MLXSW_ITEM64(reg, ppcnt, a_frame_too_long_errors,
2654 MLXSW_ITEM64(reg, ppcnt, a_symbol_error_during_carrier,
2660 MLXSW_ITEM64(reg, ppcnt, a_mac_control_frames_transmitted,
2666 MLXSW_ITEM64(reg, ppcnt, a_mac_control_frames_received,
2672 MLXSW_ITEM64(reg, ppcnt, a_unsupported_opcodes_received,
2678 MLXSW_ITEM64(reg, ppcnt, a_pause_mac_ctrl_frames_received,
2684 MLXSW_ITEM64(reg, ppcnt, a_pause_mac_ctrl_frames_transmitted,
2692 MLXSW_ITEM64(reg, ppcnt, rx_octets, 0x08 + 0x00, 0, 64);
2697 MLXSW_ITEM64(reg, ppcnt, rx_frames, 0x08 + 0x20, 0, 64);
2702 MLXSW_ITEM64(reg, ppcnt, tx_octets, 0x08 + 0x28, 0, 64);
2707 MLXSW_ITEM64(reg, ppcnt, tx_frames, 0x08 + 0x48, 0, 64);
2712 MLXSW_ITEM64(reg, ppcnt, rx_pause, 0x08 + 0x50, 0, 64);
2717 MLXSW_ITEM64(reg, ppcnt, rx_pause_duration, 0x08 + 0x58, 0, 64);
2722 MLXSW_ITEM64(reg, ppcnt, tx_pause, 0x08 + 0x60, 0, 64);
2727 MLXSW_ITEM64(reg, ppcnt, tx_pause_duration, 0x08 + 0x68, 0, 64);
2732 MLXSW_ITEM64(reg, ppcnt, tx_pause_transition, 0x08 + 0x70, 0, 64);
2742 MLXSW_ITEM64(reg, ppcnt, tc_transmit_queue, 0x08 + 0x00, 0, 64);
2749 MLXSW_ITEM64(reg, ppcnt, tc_no_buffer_discard_uc, 0x08 + 0x08, 0, 64);
2791 MLXSW_ITEM32(reg, pptb, mm, 0x00, 28, 2);
2797 MLXSW_ITEM32(reg, pptb, local_port, 0x00, 16, 8);
2803 MLXSW_ITEM32(reg, pptb, um, 0x00, 8, 1);
2810 MLXSW_ITEM32(reg, pptb, pm, 0x00, 0, 8);
2817 MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff, 0x04, 0x04, 4);
2824 MLXSW_ITEM32(reg, pptb, pm_msb, 0x08, 24, 8);
2833 MLXSW_ITEM32(reg, pptb, untagged_buff, 0x08, 0, 4);
2840 MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff_msb, 0x0C, 0x04, 4);
2877 MLXSW_ITEM32(reg, pbmc, local_port, 0x00, 16, 8);
2884 MLXSW_ITEM32(reg, pbmc, xoff_timer_value, 0x04, 16, 16);
2892 MLXSW_ITEM32(reg, pbmc, xoff_refresh, 0x04, 0, 16);
2902 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_lossy, 0x0C, 25, 1, 0x08, 0x00, false);
2911 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_epsb, 0x0C, 24, 1, 0x08, 0x00, false);
2918 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_size, 0x0C, 0, 16, 0x08, 0x00, false);
2929 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xoff_threshold, 0x0C, 16, 16,
2941 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xon_threshold, 0x0C, 0, 16,
2990 MLXSW_ITEM32(reg, pspa, swid, 0x00, 24, 8);
2996 MLXSW_ITEM32(reg, pspa, local_port, 0x00, 16, 8);
3003 MLXSW_ITEM32(reg, pspa, sub_port, 0x00, 8, 8);
3029 MLXSW_ITEM32(reg, htgt, swid, 0x00, 24, 8);
3037 MLXSW_ITEM32(reg, htgt, type, 0x00, 8, 4);
3051 MLXSW_ITEM32(reg, htgt, trap_group, 0x00, 0, 8);
3062 MLXSW_ITEM32(reg, htgt, pide, 0x04, 15, 1);
3068 MLXSW_ITEM32(reg, htgt, pid, 0x04, 0, 8);
3081 MLXSW_ITEM32(reg, htgt, mirror_action, 0x08, 8, 2);
3087 MLXSW_ITEM32(reg, htgt, mirroring_agent, 0x08, 0, 3);
3100 MLXSW_ITEM32(reg, htgt, priority, 0x0C, 0, 4);
3106 MLXSW_ITEM32(reg, htgt, local_path_cpu_tclass, 0x10, 16, 6);
3116 MLXSW_ITEM32(reg, htgt, local_path_rdq, 0x10, 0, 6);
3175 MLXSW_ITEM32(reg, hpkt, ack, 0x00, 24, 1);
3199 MLXSW_ITEM32(reg, hpkt, action, 0x00, 20, 3);
3205 MLXSW_ITEM32(reg, hpkt, trap_group, 0x00, 12, 6);
3214 MLXSW_ITEM32(reg, hpkt, trap_id, 0x00, 0, 9);
3229 MLXSW_ITEM32(reg, hpkt, ctrl, 0x04, 16, 2);
3268 MLXSW_ITEM32(reg, rgcr, ipv4_en, 0x00, 31, 1);
3274 MLXSW_ITEM32(reg, rgcr, ipv6_en, 0x00, 30, 1);
3281 MLXSW_ITEM32(reg, rgcr, max_router_interfaces, 0x10, 0, 16);
3291 MLXSW_ITEM32(reg, rgcr, usp, 0x18, 20, 1);
3302 MLXSW_ITEM32(reg, rgcr, pcp_rw, 0x18, 16, 2);
3318 MLXSW_ITEM32(reg, rgcr, activity_dis, 0x20, 0, 8);
3342 MLXSW_ITEM32(reg, ritr, enable, 0x00, 31, 1);
3349 MLXSW_ITEM32(reg, ritr, ipv4, 0x00, 29, 1);
3356 MLXSW_ITEM32(reg, ritr, ipv6, 0x00, 28, 1);
3371 MLXSW_ITEM32(reg, ritr, type, 0x00, 23, 3);
3387 MLXSW_ITEM32(reg, ritr, op, 0x00, 20, 2);
3393 MLXSW_ITEM32(reg, ritr, rif, 0x00, 0, 16);
3402 MLXSW_ITEM32(reg, ritr, ipv4_fe, 0x04, 29, 1);
3411 MLXSW_ITEM32(reg, ritr, ipv6_fe, 0x04, 28, 1);
3420 MLXSW_ITEM32(reg, ritr, lb_en, 0x04, 24, 1);
3426 MLXSW_ITEM32(reg, ritr, virtual_router, 0x04, 0, 16);
3432 MLXSW_ITEM32(reg, ritr, mtu, 0x34, 0, 16);
3438 MLXSW_ITEM32(reg, ritr, if_swid, 0x08, 24, 8);
3445 MLXSW_ITEM_BUF(reg, ritr, if_mac, 0x12, 6);
3453 MLXSW_ITEM32(reg, ritr, vlan_if_vid, 0x08, 0, 12);
3462 MLXSW_ITEM32(reg, ritr, fid_if_fid, 0x08, 0, 16);
3481 MLXSW_ITEM32(reg, ritr, sp_if_lag, 0x08, 24, 1);
3488 MLXSW_ITEM32(reg, ritr, sp_if_system_port, 0x08, 0, 16);
3494 MLXSW_ITEM32(reg, ritr, sp_if_vid, 0x18, 0, 12);
3563 MLXSW_ITEM32(reg, ratr, op, 0x00, 28, 4);
3577 MLXSW_ITEM32(reg, ratr, v, 0x00, 24, 1);
3584 MLXSW_ITEM32(reg, ratr, a, 0x00, 16, 1);
3593 MLXSW_ITEM32(reg, ratr, adjacency_index_low, 0x04, 0, 16);
3599 MLXSW_ITEM32(reg, ratr, egress_router_interface, 0x08, 0, 16);
3613 MLXSW_ITEM32(reg, ratr, trap_action, 0x0C, 28, 4);
3624 MLXSW_ITEM32(reg, ratr, adjacency_index_high, 0x0C, 16, 8);
3632 MLXSW_ITEM32(reg, ratr, trap_id, 0x0C, 0, 8);
3638 MLXSW_ITEM_BUF(reg, ratr, eth_destination_mac, 0x12, 6);
3677 MLXSW_ITEM32(reg, ralta, op, 0x00, 28, 2);
3689 MLXSW_ITEM32(reg, ralta, protocol, 0x00, 24, 4);
3697 MLXSW_ITEM32(reg, ralta, tree_id, 0x00, 0, 8);
3732 MLXSW_ITEM32(reg, ralst, root_bin, 0x00, 16, 8);
3738 MLXSW_ITEM32(reg, ralst, tree_id, 0x00, 0, 8);
3750 MLXSW_ITEM16_INDEXED(reg, ralst, left_child_bin, 0x04, 8, 8, 0x02, 0x00, false);
3758 MLXSW_ITEM16_INDEXED(reg, ralst, right_child_bin, 0x04, 0, 8, 0x02, 0x00,
3801 MLXSW_ITEM32(reg, raltb, virtual_router, 0x00, 16, 16);
3807 MLXSW_ITEM32(reg, raltb, protocol, 0x00, 12, 4);
3815 MLXSW_ITEM32(reg, raltb, tree_id, 0x00, 0, 8);
3844 MLXSW_ITEM32(reg, ralue, protocol, 0x00, 24, 4);
3877 MLXSW_ITEM32(reg, ralue, op, 0x00, 20, 3);
3886 MLXSW_ITEM32(reg, ralue, a, 0x00, 16, 1);
3893 MLXSW_ITEM32(reg, ralue, virtual_router, 0x04, 16, 16);
3906 MLXSW_ITEM32(reg, ralue, op_u_mask, 0x04, 8, 3);
3914 MLXSW_ITEM32(reg, ralue, prefix_len, 0x08, 0, 8);
3924 MLXSW_ITEM32(reg, ralue, dip4, 0x18, 0, 32);
3937 MLXSW_ITEM32(reg, ralue, entry_type, 0x1C, 30, 2);
3947 MLXSW_ITEM32(reg, ralue, bmp_len, 0x1C, 16, 8);
3964 MLXSW_ITEM32(reg, ralue, action_type, 0x1C, 0, 2);
3979 MLXSW_ITEM32(reg, ralue, trap_action, 0x20, 28, 4);
3987 MLXSW_ITEM32(reg, ralue, trap_id, 0x20, 0, 9);
3994 MLXSW_ITEM32(reg, ralue, adjacency_index, 0x24, 0, 24);
4004 MLXSW_ITEM32(reg, ralue, ecmp_size, 0x28, 0, 13);
4011 MLXSW_ITEM32(reg, ralue, local_erif, 0x24, 0, 16);
4023 MLXSW_ITEM32(reg, ralue, v, 0x24, 31, 1);
4031 MLXSW_ITEM32(reg, ralue, tunnel_ptr, 0x24, 0, 24);
4111 MLXSW_ITEM32(reg, rauht, type, 0x00, 24, 2);
4142 MLXSW_ITEM32(reg, rauht, op, 0x00, 20, 3);
4151 MLXSW_ITEM32(reg, rauht, a, 0x00, 16, 1);
4157 MLXSW_ITEM32(reg, rauht, rif, 0x00, 0, 16);
4163 MLXSW_ITEM32(reg, rauht, dip4, 0x1C, 0x0, 32);
4176 MLXSW_ITEM32(reg, rauht, trap_action, 0x60, 28, 4);
4190 MLXSW_ITEM32(reg, rauht, trap_id, 0x60, 0, 9);
4196 MLXSW_ITEM32(reg, rauht, counter_set_type, 0x68, 24, 8);
4202 MLXSW_ITEM32(reg, rauht, counter_index, 0x68, 0, 24);
4208 MLXSW_ITEM_BUF(reg, rauht, mac, 0x6E, 6);
4246 MLXSW_ITEM32(reg, raleu, protocol, 0x00, 24, 4);
4253 MLXSW_ITEM32(reg, raleu, virtual_router, 0x00, 0, 16);
4259 MLXSW_ITEM32(reg, raleu, adjacency_index, 0x10, 0, 24);
4265 MLXSW_ITEM32(reg, raleu, ecmp_size, 0x14, 0, 13);
4271 MLXSW_ITEM32(reg, raleu, new_adjacency_index, 0x20, 0, 24);
4277 MLXSW_ITEM32(reg, raleu, new_ecmp_size, 0x24, 0, 13);
4327 MLXSW_ITEM32(reg, rauhtd, filter_fields, 0x00, 0, 8);
4337 MLXSW_ITEM32(reg, rauhtd, op, 0x04, 24, 2);
4347 MLXSW_ITEM32(reg, rauhtd, num_rec, 0x04, 0, 8);
4354 MLXSW_ITEM32(reg, rauhtd, entry_a, 0x08, 16, 1);
4367 MLXSW_ITEM32(reg, rauhtd, type, 0x08, 0, 4);
4374 MLXSW_ITEM32(reg, rauhtd, entry_rif, 0x0C, 0, 16);
4395 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_rec_num_entries,
4405 MLXSW_ITEM32_INDEXED(reg, rauhtd, rec_type, MLXSW_REG_RAUHTD_BASE_LEN, 24, 2,
4415 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_a, MLXSW_REG_RAUHTD_BASE_LEN, 16, 1,
4422 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_rif, MLXSW_REG_RAUHTD_BASE_LEN, 0,
4429 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_dip, MLXSW_REG_RAUHTD_BASE_LEN, 0,
4467 MLXSW_ITEM32(reg, mfcr, pwm_frequency, 0x00, 0, 6);
4475 MLXSW_ITEM32(reg, mfcr, tacho_active, 0x04, 16, MLXSW_MFCR_TACHOS_MAX);
4483 MLXSW_ITEM32(reg, mfcr, pwm_active, 0x04, 0, MLXSW_MFCR_PWMS_MAX);
4519 MLXSW_ITEM32(reg, mfsc, pwm, 0x00, 24, 3);
4526 MLXSW_ITEM32(reg, mfsc, pwm_duty_cycle, 0x04, 0, 8);
4553 MLXSW_ITEM32(reg, mfsm, tacho, 0x00, 24, 4);
4559 MLXSW_ITEM32(reg, mfsm, rpm, 0x04, 0, 16);
4585 MLXSW_ITEM32(reg, mtcap, sensor_count, 0x00, 0, 7);
4607 MLXSW_ITEM32(reg, mtmp, sensor_index, 0x00, 0, 7);
4617 MLXSW_ITEM32(reg, mtmp, temperature, 0x04, 0, 16);
4623 MLXSW_ITEM32(reg, mtmp, mte, 0x08, 31, 1);
4629 MLXSW_ITEM32(reg, mtmp, mtr, 0x08, 30, 1);
4636 MLXSW_ITEM32(reg, mtmp, max_temperature, 0x08, 0, 16);
4644 MLXSW_ITEM_BUF(reg, mtmp, sensor_name, 0x18, MLXSW_REG_MTMP_SENSOR_NAME_SIZE);
4691 MLXSW_ITEM32(reg, mpat, pa_id, 0x00, 28, 4);
4697 MLXSW_ITEM32(reg, mpat, system_port, 0x00, 0, 16);
4703 MLXSW_ITEM32(reg, mpat, e, 0x04, 31, 1);
4714 MLXSW_ITEM32(reg, mpat, qos, 0x04, 26, 1);
4724 MLXSW_ITEM32(reg, mpat, be, 0x04, 25, 1);
4754 MLXSW_ITEM32(reg, mpar, local_port, 0x00, 16, 8);
4765 MLXSW_ITEM32(reg, mpar, i_e, 0x00, 0, 4);
4772 MLXSW_ITEM32(reg, mpar, enable, 0x04, 31, 1);
4778 MLXSW_ITEM32(reg, mpar, pa_id, 0x04, 0, 4);
4807 MLXSW_ITEM32(reg, mlcr, local_port, 0x00, 16, 8);
4817 MLXSW_ITEM32(reg, mlcr, beacon_duration, 0x04, 0, 16);
4824 MLXSW_ITEM32(reg, mlcr, beacon_remain, 0x08, 0, 16);
4857 MLXSW_ITEM32(reg, sbpr, dir, 0x00, 24, 2);
4863 MLXSW_ITEM32(reg, sbpr, pool, 0x00, 0, 4);
4869 MLXSW_ITEM32(reg, sbpr, size, 0x04, 0, 24);
4880 MLXSW_ITEM32(reg, sbpr, mode, 0x08, 0, 4);
4913 MLXSW_ITEM32(reg, sbcm, local_port, 0x00, 16, 8);
4923 MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6);
4929 MLXSW_ITEM32(reg, sbcm, dir, 0x00, 0, 2);
4935 MLXSW_ITEM32(reg, sbcm, min_buff, 0x18, 0, 24);
4952 MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24);
4958 MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4);
4993 MLXSW_ITEM32(reg, sbpm, local_port, 0x00, 16, 8);
4999 MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4);
5005 MLXSW_ITEM32(reg, sbpm, dir, 0x00, 0, 2);
5011 MLXSW_ITEM32(reg, sbpm, buff_occupancy, 0x10, 0, 24);
5019 MLXSW_ITEM32(reg, sbpm, clr, 0x14, 31, 1);
5026 MLXSW_ITEM32(reg, sbpm, max_buff_occupancy, 0x14, 0, 24);
5032 MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24);
5045 MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24);
5085 MLXSW_ITEM32(reg, sbmm, prio, 0x00, 8, 4);
5091 MLXSW_ITEM32(reg, sbmm, min_buff, 0x18, 0, 24);
5104 MLXSW_ITEM32(reg, sbmm, max_buff, 0x1C, 0, 24);
5110 MLXSW_ITEM32(reg, sbmm, pool, 0x24, 0, 4);
5149 MLXSW_ITEM32(reg, sbsr, clr, 0x00, 31, 1);
5158 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, ingress_port_mask, 0x10, 0x20, 1);
5168 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, pg_buff_mask, 0x30, 0x4, 1);
5177 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, egress_port_mask, 0x34, 0x20, 1);
5187 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, tclass_mask, 0x54, 0x8, 1);
5199 MLXSW_ITEM32_INDEXED(reg, sbsr, rec_buff_occupancy, MLXSW_REG_SBSR_BASE_LEN,
5207 MLXSW_ITEM32_INDEXED(reg, sbsr, rec_max_buff_occupancy, MLXSW_REG_SBSR_BASE_LEN,
5241 MLXSW_ITEM32(reg, sbib, local_port, 0x00, 16, 8);
5249 MLXSW_ITEM32(reg, sbib, buff_size, 0x08, 0, 24);
5397 MLXSW_ITEM32(reg, pude, swid, 0x00, 24, 8);
5403 MLXSW_ITEM32(reg, pude, local_port, 0x00, 16, 8);
5414 MLXSW_ITEM32(reg, pude, admin_status, 0x00, 8, 4);
5424 MLXSW_ITEM32(reg, pude, oper_status, 0x00, 0, 4);