Lines Matching refs:cp
173 #define CAS_MAX_MTU min(((cp->page_size << 1) - 0x50), 9000)
242 static void cas_set_link_modes(struct cas *cp);
244 static inline void cas_lock_tx(struct cas *cp) in cas_lock_tx() argument
249 spin_lock_nested(&cp->tx_lock[i], i); in cas_lock_tx()
252 static inline void cas_lock_all(struct cas *cp) in cas_lock_all() argument
254 spin_lock_irq(&cp->lock); in cas_lock_all()
255 cas_lock_tx(cp); in cas_lock_all()
266 #define cas_lock_all_save(cp, flags) \ argument
268 struct cas *xxxcp = (cp); \
273 static inline void cas_unlock_tx(struct cas *cp) in cas_unlock_tx() argument
278 spin_unlock(&cp->tx_lock[i - 1]); in cas_unlock_tx()
281 static inline void cas_unlock_all(struct cas *cp) in cas_unlock_all() argument
283 cas_unlock_tx(cp); in cas_unlock_all()
284 spin_unlock_irq(&cp->lock); in cas_unlock_all()
287 #define cas_unlock_all_restore(cp, flags) \ argument
289 struct cas *xxxcp = (cp); \
294 static void cas_disable_irq(struct cas *cp, const int ring) in cas_disable_irq() argument
298 writel(0xFFFFFFFF, cp->regs + REG_INTR_MASK); in cas_disable_irq()
303 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_disable_irq()
316 cp->regs + REG_PLUS_INTRN_MASK(ring)); in cas_disable_irq()
320 writel(INTRN_MASK_CLEAR_ALL, cp->regs + in cas_disable_irq()
327 static inline void cas_mask_intr(struct cas *cp) in cas_mask_intr() argument
332 cas_disable_irq(cp, i); in cas_mask_intr()
335 static void cas_enable_irq(struct cas *cp, const int ring) in cas_enable_irq() argument
338 writel(INTR_TX_DONE, cp->regs + REG_INTR_MASK); in cas_enable_irq()
342 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_enable_irq()
354 writel(INTRN_MASK_RX_EN, cp->regs + in cas_enable_irq()
364 static inline void cas_unmask_intr(struct cas *cp) in cas_unmask_intr() argument
369 cas_enable_irq(cp, i); in cas_unmask_intr()
372 static inline void cas_entropy_gather(struct cas *cp) in cas_entropy_gather() argument
375 if ((cp->cas_flags & CAS_FLAG_ENTROPY_DEV) == 0) in cas_entropy_gather()
378 batch_entropy_store(readl(cp->regs + REG_ENTROPY_IV), in cas_entropy_gather()
379 readl(cp->regs + REG_ENTROPY_IV), in cas_entropy_gather()
384 static inline void cas_entropy_reset(struct cas *cp) in cas_entropy_reset() argument
387 if ((cp->cas_flags & CAS_FLAG_ENTROPY_DEV) == 0) in cas_entropy_reset()
391 cp->regs + REG_BIM_LOCAL_DEV_EN); in cas_entropy_reset()
392 writeb(ENTROPY_RESET_STC_MODE, cp->regs + REG_ENTROPY_RESET); in cas_entropy_reset()
393 writeb(0x55, cp->regs + REG_ENTROPY_RAND_REG); in cas_entropy_reset()
396 if (readb(cp->regs + REG_ENTROPY_RAND_REG) == 0) in cas_entropy_reset()
397 cp->cas_flags &= ~CAS_FLAG_ENTROPY_DEV; in cas_entropy_reset()
404 static u16 cas_phy_read(struct cas *cp, int reg) in cas_phy_read() argument
410 cmd |= CAS_BASE(MIF_FRAME_PHY_ADDR, cp->phy_addr); in cas_phy_read()
413 writel(cmd, cp->regs + REG_MIF_FRAME); in cas_phy_read()
418 cmd = readl(cp->regs + REG_MIF_FRAME); in cas_phy_read()
425 static int cas_phy_write(struct cas *cp, int reg, u16 val) in cas_phy_write() argument
431 cmd |= CAS_BASE(MIF_FRAME_PHY_ADDR, cp->phy_addr); in cas_phy_write()
435 writel(cmd, cp->regs + REG_MIF_FRAME); in cas_phy_write()
440 cmd = readl(cp->regs + REG_MIF_FRAME); in cas_phy_write()
447 static void cas_phy_powerup(struct cas *cp) in cas_phy_powerup() argument
449 u16 ctl = cas_phy_read(cp, MII_BMCR); in cas_phy_powerup()
454 cas_phy_write(cp, MII_BMCR, ctl); in cas_phy_powerup()
457 static void cas_phy_powerdown(struct cas *cp) in cas_phy_powerdown() argument
459 u16 ctl = cas_phy_read(cp, MII_BMCR); in cas_phy_powerdown()
464 cas_phy_write(cp, MII_BMCR, ctl); in cas_phy_powerdown()
468 static int cas_page_free(struct cas *cp, cas_page_t *page) in cas_page_free() argument
470 pci_unmap_page(cp->pdev, page->dma_addr, cp->page_size, in cas_page_free()
472 __free_pages(page->buffer, cp->page_order); in cas_page_free()
488 static cas_page_t *cas_page_alloc(struct cas *cp, const gfp_t flags) in cas_page_alloc() argument
498 page->buffer = alloc_pages(flags, cp->page_order); in cas_page_alloc()
501 page->dma_addr = pci_map_page(cp->pdev, page->buffer, 0, in cas_page_alloc()
502 cp->page_size, PCI_DMA_FROMDEVICE); in cas_page_alloc()
511 static void cas_spare_init(struct cas *cp) in cas_spare_init() argument
513 spin_lock(&cp->rx_inuse_lock); in cas_spare_init()
514 INIT_LIST_HEAD(&cp->rx_inuse_list); in cas_spare_init()
515 spin_unlock(&cp->rx_inuse_lock); in cas_spare_init()
517 spin_lock(&cp->rx_spare_lock); in cas_spare_init()
518 INIT_LIST_HEAD(&cp->rx_spare_list); in cas_spare_init()
519 cp->rx_spares_needed = RX_SPARE_COUNT; in cas_spare_init()
520 spin_unlock(&cp->rx_spare_lock); in cas_spare_init()
524 static void cas_spare_free(struct cas *cp) in cas_spare_free() argument
530 spin_lock(&cp->rx_spare_lock); in cas_spare_free()
531 list_splice_init(&cp->rx_spare_list, &list); in cas_spare_free()
532 spin_unlock(&cp->rx_spare_lock); in cas_spare_free()
534 cas_page_free(cp, list_entry(elem, cas_page_t, list)); in cas_spare_free()
543 spin_lock(&cp->rx_inuse_lock); in cas_spare_free()
544 list_splice_init(&cp->rx_inuse_list, &list); in cas_spare_free()
545 spin_unlock(&cp->rx_inuse_lock); in cas_spare_free()
547 spin_lock(&cp->rx_spare_lock); in cas_spare_free()
548 list_splice_init(&cp->rx_inuse_list, &list); in cas_spare_free()
549 spin_unlock(&cp->rx_spare_lock); in cas_spare_free()
552 cas_page_free(cp, list_entry(elem, cas_page_t, list)); in cas_spare_free()
557 static void cas_spare_recover(struct cas *cp, const gfp_t flags) in cas_spare_recover() argument
568 spin_lock(&cp->rx_inuse_lock); in cas_spare_recover()
569 list_splice_init(&cp->rx_inuse_list, &list); in cas_spare_recover()
570 spin_unlock(&cp->rx_inuse_lock); in cas_spare_recover()
591 spin_lock(&cp->rx_spare_lock); in cas_spare_recover()
592 if (cp->rx_spares_needed > 0) { in cas_spare_recover()
593 list_add(elem, &cp->rx_spare_list); in cas_spare_recover()
594 cp->rx_spares_needed--; in cas_spare_recover()
595 spin_unlock(&cp->rx_spare_lock); in cas_spare_recover()
597 spin_unlock(&cp->rx_spare_lock); in cas_spare_recover()
598 cas_page_free(cp, page); in cas_spare_recover()
604 spin_lock(&cp->rx_inuse_lock); in cas_spare_recover()
605 list_splice(&list, &cp->rx_inuse_list); in cas_spare_recover()
606 spin_unlock(&cp->rx_inuse_lock); in cas_spare_recover()
609 spin_lock(&cp->rx_spare_lock); in cas_spare_recover()
610 needed = cp->rx_spares_needed; in cas_spare_recover()
611 spin_unlock(&cp->rx_spare_lock); in cas_spare_recover()
619 cas_page_t *spare = cas_page_alloc(cp, flags); in cas_spare_recover()
626 spin_lock(&cp->rx_spare_lock); in cas_spare_recover()
627 list_splice(&list, &cp->rx_spare_list); in cas_spare_recover()
628 cp->rx_spares_needed -= i; in cas_spare_recover()
629 spin_unlock(&cp->rx_spare_lock); in cas_spare_recover()
633 static cas_page_t *cas_page_dequeue(struct cas *cp) in cas_page_dequeue() argument
638 spin_lock(&cp->rx_spare_lock); in cas_page_dequeue()
639 if (list_empty(&cp->rx_spare_list)) { in cas_page_dequeue()
641 spin_unlock(&cp->rx_spare_lock); in cas_page_dequeue()
642 cas_spare_recover(cp, GFP_ATOMIC); in cas_page_dequeue()
643 spin_lock(&cp->rx_spare_lock); in cas_page_dequeue()
644 if (list_empty(&cp->rx_spare_list)) { in cas_page_dequeue()
645 netif_err(cp, rx_err, cp->dev, in cas_page_dequeue()
647 spin_unlock(&cp->rx_spare_lock); in cas_page_dequeue()
652 entry = cp->rx_spare_list.next; in cas_page_dequeue()
654 recover = ++cp->rx_spares_needed; in cas_page_dequeue()
655 spin_unlock(&cp->rx_spare_lock); in cas_page_dequeue()
660 atomic_inc(&cp->reset_task_pending); in cas_page_dequeue()
661 atomic_inc(&cp->reset_task_pending_spare); in cas_page_dequeue()
662 schedule_work(&cp->reset_task); in cas_page_dequeue()
664 atomic_set(&cp->reset_task_pending, CAS_RESET_SPARE); in cas_page_dequeue()
665 schedule_work(&cp->reset_task); in cas_page_dequeue()
672 static void cas_mif_poll(struct cas *cp, const int enable) in cas_mif_poll() argument
676 cfg = readl(cp->regs + REG_MIF_CFG); in cas_mif_poll()
679 if (cp->phy_type & CAS_PHY_MII_MDIO1) in cas_mif_poll()
686 cfg |= CAS_BASE(MIF_CFG_POLL_PHY, cp->phy_addr); in cas_mif_poll()
689 cp->regs + REG_MIF_MASK); in cas_mif_poll()
690 writel(cfg, cp->regs + REG_MIF_CFG); in cas_mif_poll()
694 static void cas_begin_auto_negotiation(struct cas *cp, struct ethtool_cmd *ep) in cas_begin_auto_negotiation() argument
700 int oldstate = cp->lstate; in cas_begin_auto_negotiation()
706 lcntl = cp->link_cntl; in cas_begin_auto_negotiation()
708 cp->link_cntl = BMCR_ANENABLE; in cas_begin_auto_negotiation()
711 cp->link_cntl = 0; in cas_begin_auto_negotiation()
713 cp->link_cntl |= BMCR_SPEED100; in cas_begin_auto_negotiation()
715 cp->link_cntl |= CAS_BMCR_SPEED1000; in cas_begin_auto_negotiation()
717 cp->link_cntl |= BMCR_FULLDPLX; in cas_begin_auto_negotiation()
720 changed = (lcntl != cp->link_cntl); in cas_begin_auto_negotiation()
723 if (cp->lstate == link_up) { in cas_begin_auto_negotiation()
724 netdev_info(cp->dev, "PCS link down\n"); in cas_begin_auto_negotiation()
727 netdev_info(cp->dev, "link configuration changed\n"); in cas_begin_auto_negotiation()
730 cp->lstate = link_down; in cas_begin_auto_negotiation()
731 cp->link_transition = LINK_TRANSITION_LINK_DOWN; in cas_begin_auto_negotiation()
732 if (!cp->hw_running) in cas_begin_auto_negotiation()
741 netif_carrier_off(cp->dev); in cas_begin_auto_negotiation()
748 atomic_inc(&cp->reset_task_pending); in cas_begin_auto_negotiation()
749 atomic_inc(&cp->reset_task_pending_all); in cas_begin_auto_negotiation()
750 schedule_work(&cp->reset_task); in cas_begin_auto_negotiation()
751 cp->timer_ticks = 0; in cas_begin_auto_negotiation()
752 mod_timer(&cp->link_timer, jiffies + CAS_LINK_TIMEOUT); in cas_begin_auto_negotiation()
756 if (cp->phy_type & CAS_PHY_SERDES) { in cas_begin_auto_negotiation()
757 u32 val = readl(cp->regs + REG_PCS_MII_CTRL); in cas_begin_auto_negotiation()
759 if (cp->link_cntl & BMCR_ANENABLE) { in cas_begin_auto_negotiation()
761 cp->lstate = link_aneg; in cas_begin_auto_negotiation()
763 if (cp->link_cntl & BMCR_FULLDPLX) in cas_begin_auto_negotiation()
766 cp->lstate = link_force_ok; in cas_begin_auto_negotiation()
768 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_begin_auto_negotiation()
769 writel(val, cp->regs + REG_PCS_MII_CTRL); in cas_begin_auto_negotiation()
772 cas_mif_poll(cp, 0); in cas_begin_auto_negotiation()
773 ctl = cas_phy_read(cp, MII_BMCR); in cas_begin_auto_negotiation()
776 ctl |= cp->link_cntl; in cas_begin_auto_negotiation()
779 cp->lstate = link_aneg; in cas_begin_auto_negotiation()
781 cp->lstate = link_force_ok; in cas_begin_auto_negotiation()
783 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_begin_auto_negotiation()
784 cas_phy_write(cp, MII_BMCR, ctl); in cas_begin_auto_negotiation()
785 cas_mif_poll(cp, 1); in cas_begin_auto_negotiation()
788 cp->timer_ticks = 0; in cas_begin_auto_negotiation()
789 mod_timer(&cp->link_timer, jiffies + CAS_LINK_TIMEOUT); in cas_begin_auto_negotiation()
793 static int cas_reset_mii_phy(struct cas *cp) in cas_reset_mii_phy() argument
798 cas_phy_write(cp, MII_BMCR, BMCR_RESET); in cas_reset_mii_phy()
801 val = cas_phy_read(cp, MII_BMCR); in cas_reset_mii_phy()
809 static void cas_saturn_firmware_init(struct cas *cp) in cas_saturn_firmware_init() argument
815 if (PHY_NS_DP83065 != cp->phy_id) in cas_saturn_firmware_init()
818 err = request_firmware(&fw, fw_name, &cp->pdev->dev); in cas_saturn_firmware_init()
829 cp->fw_load_addr= fw->data[1] << 8 | fw->data[0]; in cas_saturn_firmware_init()
830 cp->fw_size = fw->size - 2; in cas_saturn_firmware_init()
831 cp->fw_data = vmalloc(cp->fw_size); in cas_saturn_firmware_init()
832 if (!cp->fw_data) in cas_saturn_firmware_init()
834 memcpy(cp->fw_data, &fw->data[2], cp->fw_size); in cas_saturn_firmware_init()
839 static void cas_saturn_firmware_load(struct cas *cp) in cas_saturn_firmware_load() argument
843 if (!cp->fw_data) in cas_saturn_firmware_load()
846 cas_phy_powerdown(cp); in cas_saturn_firmware_load()
849 cas_phy_write(cp, DP83065_MII_MEM, 0x0); in cas_saturn_firmware_load()
852 cas_phy_write(cp, DP83065_MII_REGE, 0x8ff9); in cas_saturn_firmware_load()
853 cas_phy_write(cp, DP83065_MII_REGD, 0xbd); in cas_saturn_firmware_load()
854 cas_phy_write(cp, DP83065_MII_REGE, 0x8ffa); in cas_saturn_firmware_load()
855 cas_phy_write(cp, DP83065_MII_REGD, 0x82); in cas_saturn_firmware_load()
856 cas_phy_write(cp, DP83065_MII_REGE, 0x8ffb); in cas_saturn_firmware_load()
857 cas_phy_write(cp, DP83065_MII_REGD, 0x0); in cas_saturn_firmware_load()
858 cas_phy_write(cp, DP83065_MII_REGE, 0x8ffc); in cas_saturn_firmware_load()
859 cas_phy_write(cp, DP83065_MII_REGD, 0x39); in cas_saturn_firmware_load()
862 cas_phy_write(cp, DP83065_MII_MEM, 0x1); in cas_saturn_firmware_load()
863 cas_phy_write(cp, DP83065_MII_REGE, cp->fw_load_addr); in cas_saturn_firmware_load()
864 for (i = 0; i < cp->fw_size; i++) in cas_saturn_firmware_load()
865 cas_phy_write(cp, DP83065_MII_REGD, cp->fw_data[i]); in cas_saturn_firmware_load()
868 cas_phy_write(cp, DP83065_MII_REGE, 0x8ff8); in cas_saturn_firmware_load()
869 cas_phy_write(cp, DP83065_MII_REGD, 0x1); in cas_saturn_firmware_load()
874 static void cas_phy_init(struct cas *cp) in cas_phy_init() argument
879 if (CAS_PHY_MII(cp->phy_type)) { in cas_phy_init()
881 cp->regs + REG_PCS_DATAPATH_MODE); in cas_phy_init()
883 cas_mif_poll(cp, 0); in cas_phy_init()
884 cas_reset_mii_phy(cp); /* take out of isolate mode */ in cas_phy_init()
886 if (PHY_LUCENT_B0 == cp->phy_id) { in cas_phy_init()
888 cas_phy_write(cp, LUCENT_MII_REG, 0x8000); in cas_phy_init()
889 cas_phy_write(cp, MII_BMCR, 0x00f1); in cas_phy_init()
890 cas_phy_write(cp, LUCENT_MII_REG, 0x0); in cas_phy_init()
892 } else if (PHY_BROADCOM_B0 == (cp->phy_id & 0xFFFFFFFC)) { in cas_phy_init()
894 cas_phy_write(cp, BROADCOM_MII_REG8, 0x0C20); in cas_phy_init()
895 cas_phy_write(cp, BROADCOM_MII_REG7, 0x0012); in cas_phy_init()
896 cas_phy_write(cp, BROADCOM_MII_REG5, 0x1804); in cas_phy_init()
897 cas_phy_write(cp, BROADCOM_MII_REG7, 0x0013); in cas_phy_init()
898 cas_phy_write(cp, BROADCOM_MII_REG5, 0x1204); in cas_phy_init()
899 cas_phy_write(cp, BROADCOM_MII_REG7, 0x8006); in cas_phy_init()
900 cas_phy_write(cp, BROADCOM_MII_REG5, 0x0132); in cas_phy_init()
901 cas_phy_write(cp, BROADCOM_MII_REG7, 0x8006); in cas_phy_init()
902 cas_phy_write(cp, BROADCOM_MII_REG5, 0x0232); in cas_phy_init()
903 cas_phy_write(cp, BROADCOM_MII_REG7, 0x201F); in cas_phy_init()
904 cas_phy_write(cp, BROADCOM_MII_REG5, 0x0A20); in cas_phy_init()
906 } else if (PHY_BROADCOM_5411 == cp->phy_id) { in cas_phy_init()
907 val = cas_phy_read(cp, BROADCOM_MII_REG4); in cas_phy_init()
908 val = cas_phy_read(cp, BROADCOM_MII_REG4); in cas_phy_init()
911 cas_phy_write(cp, BROADCOM_MII_REG4, in cas_phy_init()
915 } else if (cp->cas_flags & CAS_FLAG_SATURN) { in cas_phy_init()
916 writel((cp->phy_type & CAS_PHY_MII_MDIO0) ? in cas_phy_init()
918 cp->regs + REG_SATURN_PCFG); in cas_phy_init()
924 if (PHY_NS_DP83065 == cp->phy_id) { in cas_phy_init()
925 cas_saturn_firmware_load(cp); in cas_phy_init()
927 cas_phy_powerup(cp); in cas_phy_init()
931 val = cas_phy_read(cp, MII_BMCR); in cas_phy_init()
933 cas_phy_write(cp, MII_BMCR, val); in cas_phy_init()
936 cas_phy_write(cp, MII_ADVERTISE, in cas_phy_init()
937 cas_phy_read(cp, MII_ADVERTISE) | in cas_phy_init()
943 if (cp->cas_flags & CAS_FLAG_1000MB_CAP) { in cas_phy_init()
947 val = cas_phy_read(cp, CAS_MII_1000_CTRL); in cas_phy_init()
950 cas_phy_write(cp, CAS_MII_1000_CTRL, val); in cas_phy_init()
959 cp->regs + REG_PCS_DATAPATH_MODE); in cas_phy_init()
962 if (cp->cas_flags & CAS_FLAG_SATURN) in cas_phy_init()
963 writel(0, cp->regs + REG_SATURN_PCFG); in cas_phy_init()
966 val = readl(cp->regs + REG_PCS_MII_CTRL); in cas_phy_init()
968 writel(val, cp->regs + REG_PCS_MII_CTRL); in cas_phy_init()
973 if ((readl(cp->regs + REG_PCS_MII_CTRL) & in cas_phy_init()
978 netdev_warn(cp->dev, "PCS reset bit would not clear [%08x]\n", in cas_phy_init()
979 readl(cp->regs + REG_PCS_STATE_MACHINE)); in cas_phy_init()
984 writel(0x0, cp->regs + REG_PCS_CFG); in cas_phy_init()
987 val = readl(cp->regs + REG_PCS_MII_ADVERT); in cas_phy_init()
991 writel(val, cp->regs + REG_PCS_MII_ADVERT); in cas_phy_init()
994 writel(PCS_CFG_EN, cp->regs + REG_PCS_CFG); in cas_phy_init()
998 cp->regs + REG_PCS_SERDES_CTRL); in cas_phy_init()
1003 static int cas_pcs_link_check(struct cas *cp) in cas_pcs_link_check() argument
1012 stat = readl(cp->regs + REG_PCS_MII_STATUS); in cas_pcs_link_check()
1014 stat = readl(cp->regs + REG_PCS_MII_STATUS); in cas_pcs_link_check()
1022 netif_info(cp, link, cp->dev, "PCS RemoteFault\n"); in cas_pcs_link_check()
1027 state_machine = readl(cp->regs + REG_PCS_STATE_MACHINE); in cas_pcs_link_check()
1035 if (cp->lstate != link_up) { in cas_pcs_link_check()
1036 if (cp->opened) { in cas_pcs_link_check()
1037 cp->lstate = link_up; in cas_pcs_link_check()
1038 cp->link_transition = LINK_TRANSITION_LINK_UP; in cas_pcs_link_check()
1040 cas_set_link_modes(cp); in cas_pcs_link_check()
1041 netif_carrier_on(cp->dev); in cas_pcs_link_check()
1044 } else if (cp->lstate == link_up) { in cas_pcs_link_check()
1045 cp->lstate = link_down; in cas_pcs_link_check()
1047 cp->link_transition != LINK_TRANSITION_REQUESTED_RESET && in cas_pcs_link_check()
1048 !cp->link_transition_jiffies_valid) { in cas_pcs_link_check()
1062 cp->link_transition = LINK_TRANSITION_REQUESTED_RESET; in cas_pcs_link_check()
1063 cp->link_transition_jiffies = jiffies; in cas_pcs_link_check()
1064 cp->link_transition_jiffies_valid = 1; in cas_pcs_link_check()
1066 cp->link_transition = LINK_TRANSITION_ON_FAILURE; in cas_pcs_link_check()
1068 netif_carrier_off(cp->dev); in cas_pcs_link_check()
1069 if (cp->opened) in cas_pcs_link_check()
1070 netif_info(cp, link, cp->dev, "PCS link down\n"); in cas_pcs_link_check()
1080 if ((cp->cas_flags & CAS_FLAG_REG_PLUS) == 0) { in cas_pcs_link_check()
1082 stat = readl(cp->regs + REG_PCS_SERDES_STATE); in cas_pcs_link_check()
1086 } else if (cp->lstate == link_down) { in cas_pcs_link_check()
1088 cp->link_transition != LINK_TRANSITION_REQUESTED_RESET && in cas_pcs_link_check()
1089 !cp->link_transition_jiffies_valid) { in cas_pcs_link_check()
1096 cp->link_transition = LINK_TRANSITION_REQUESTED_RESET; in cas_pcs_link_check()
1097 cp->link_transition_jiffies = jiffies; in cas_pcs_link_check()
1098 cp->link_transition_jiffies_valid = 1; in cas_pcs_link_check()
1100 cp->link_transition = LINK_TRANSITION_STILL_FAILED; in cas_pcs_link_check()
1108 struct cas *cp, u32 status) in cas_pcs_interrupt() argument
1110 u32 stat = readl(cp->regs + REG_PCS_INTR_STATUS); in cas_pcs_interrupt()
1114 return cas_pcs_link_check(cp); in cas_pcs_interrupt()
1118 struct cas *cp, u32 status) in cas_txmac_interrupt() argument
1120 u32 txmac_stat = readl(cp->regs + REG_MAC_TX_STATUS); in cas_txmac_interrupt()
1125 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_txmac_interrupt()
1135 spin_lock(&cp->stat_lock[0]); in cas_txmac_interrupt()
1138 cp->net_stats[0].tx_fifo_errors++; in cas_txmac_interrupt()
1143 cp->net_stats[0].tx_errors++; in cas_txmac_interrupt()
1150 cp->net_stats[0].collisions += 0x10000; in cas_txmac_interrupt()
1153 cp->net_stats[0].tx_aborted_errors += 0x10000; in cas_txmac_interrupt()
1154 cp->net_stats[0].collisions += 0x10000; in cas_txmac_interrupt()
1158 cp->net_stats[0].tx_aborted_errors += 0x10000; in cas_txmac_interrupt()
1159 cp->net_stats[0].collisions += 0x10000; in cas_txmac_interrupt()
1161 spin_unlock(&cp->stat_lock[0]); in cas_txmac_interrupt()
1169 static void cas_load_firmware(struct cas *cp, cas_hp_inst_t *firmware) in cas_load_firmware() argument
1177 writel(i, cp->regs + REG_HP_INSTR_RAM_ADDR); in cas_load_firmware()
1181 writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_HI); in cas_load_firmware()
1190 writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_MID); in cas_load_firmware()
1196 writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_LOW); in cas_load_firmware()
1202 static void cas_init_rx_dma(struct cas *cp) in cas_init_rx_dma() argument
1204 u64 desc_dma = cp->block_dvma; in cas_init_rx_dma()
1213 (cp->cas_flags & CAS_FLAG_REG_PLUS)) /* do desc 2 */ in cas_init_rx_dma()
1215 writel(val, cp->regs + REG_RX_CFG); in cas_init_rx_dma()
1217 val = (unsigned long) cp->init_rxds[0] - in cas_init_rx_dma()
1218 (unsigned long) cp->init_block; in cas_init_rx_dma()
1219 writel((desc_dma + val) >> 32, cp->regs + REG_RX_DB_HI); in cas_init_rx_dma()
1220 writel((desc_dma + val) & 0xffffffff, cp->regs + REG_RX_DB_LOW); in cas_init_rx_dma()
1221 writel(RX_DESC_RINGN_SIZE(0) - 4, cp->regs + REG_RX_KICK); in cas_init_rx_dma()
1223 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_init_rx_dma()
1227 val = (unsigned long) cp->init_rxds[1] - in cas_init_rx_dma()
1228 (unsigned long) cp->init_block; in cas_init_rx_dma()
1229 writel((desc_dma + val) >> 32, cp->regs + REG_PLUS_RX_DB1_HI); in cas_init_rx_dma()
1230 writel((desc_dma + val) & 0xffffffff, cp->regs + in cas_init_rx_dma()
1232 writel(RX_DESC_RINGN_SIZE(1) - 4, cp->regs + in cas_init_rx_dma()
1237 val = (unsigned long) cp->init_rxcs[0] - in cas_init_rx_dma()
1238 (unsigned long) cp->init_block; in cas_init_rx_dma()
1239 writel((desc_dma + val) >> 32, cp->regs + REG_RX_CB_HI); in cas_init_rx_dma()
1240 writel((desc_dma + val) & 0xffffffff, cp->regs + REG_RX_CB_LOW); in cas_init_rx_dma()
1242 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_init_rx_dma()
1245 val = (unsigned long) cp->init_rxcs[i] - in cas_init_rx_dma()
1246 (unsigned long) cp->init_block; in cas_init_rx_dma()
1247 writel((desc_dma + val) >> 32, cp->regs + in cas_init_rx_dma()
1249 writel((desc_dma + val) & 0xffffffff, cp->regs + in cas_init_rx_dma()
1258 readl(cp->regs + REG_INTR_STATUS_ALIAS); in cas_init_rx_dma()
1259 writel(INTR_RX_DONE | INTR_RX_BUF_UNAVAIL, cp->regs + REG_ALIAS_CLEAR); in cas_init_rx_dma()
1260 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_init_rx_dma()
1262 readl(cp->regs + REG_PLUS_INTRN_STATUS_ALIAS(i)); in cas_init_rx_dma()
1267 cp->regs + REG_PLUS_ALIASN_CLEAR(1)); in cas_init_rx_dma()
1271 cp->regs + REG_PLUS_ALIASN_CLEAR(i)); in cas_init_rx_dma()
1276 cp->rx_pause_off / RX_PAUSE_THRESH_QUANTUM); in cas_init_rx_dma()
1278 cp->rx_pause_on / RX_PAUSE_THRESH_QUANTUM); in cas_init_rx_dma()
1279 writel(val, cp->regs + REG_RX_PAUSE_THRESH); in cas_init_rx_dma()
1283 writel(i, cp->regs + REG_RX_TABLE_ADDR); in cas_init_rx_dma()
1284 writel(0x0, cp->regs + REG_RX_TABLE_DATA_LOW); in cas_init_rx_dma()
1285 writel(0x0, cp->regs + REG_RX_TABLE_DATA_MID); in cas_init_rx_dma()
1286 writel(0x0, cp->regs + REG_RX_TABLE_DATA_HI); in cas_init_rx_dma()
1290 writel(0x0, cp->regs + REG_RX_CTRL_FIFO_ADDR); in cas_init_rx_dma()
1291 writel(0x0, cp->regs + REG_RX_IPP_FIFO_ADDR); in cas_init_rx_dma()
1297 writel(val, cp->regs + REG_RX_BLANK); in cas_init_rx_dma()
1299 writel(0x0, cp->regs + REG_RX_BLANK); in cas_init_rx_dma()
1309 writel(val, cp->regs + REG_RX_AE_THRESH); in cas_init_rx_dma()
1310 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_init_rx_dma()
1312 writel(val, cp->regs + REG_PLUS_RX_AE1_THRESH); in cas_init_rx_dma()
1318 writel(0x0, cp->regs + REG_RX_RED); in cas_init_rx_dma()
1322 if (cp->page_size == 0x1000) in cas_init_rx_dma()
1324 else if (cp->page_size == 0x2000) in cas_init_rx_dma()
1326 else if (cp->page_size == 0x4000) in cas_init_rx_dma()
1330 size = cp->dev->mtu + 64; in cas_init_rx_dma()
1331 if (size > cp->page_size) in cas_init_rx_dma()
1332 size = cp->page_size; in cas_init_rx_dma()
1343 cp->mtu_stride = 1 << (i + 10); in cas_init_rx_dma()
1346 val |= CAS_BASE(RX_PAGE_SIZE_MTU_COUNT, cp->page_size >> (i + 10)); in cas_init_rx_dma()
1348 writel(val, cp->regs + REG_RX_PAGE_SIZE); in cas_init_rx_dma()
1357 writel(val, cp->regs + REG_HP_CFG); in cas_init_rx_dma()
1370 static inline cas_page_t *cas_page_spare(struct cas *cp, const int index) in cas_page_spare() argument
1372 cas_page_t *page = cp->rx_pages[1][index]; in cas_page_spare()
1378 new = cas_page_dequeue(cp); in cas_page_spare()
1380 spin_lock(&cp->rx_inuse_lock); in cas_page_spare()
1381 list_add(&page->list, &cp->rx_inuse_list); in cas_page_spare()
1382 spin_unlock(&cp->rx_inuse_lock); in cas_page_spare()
1388 static cas_page_t *cas_page_swap(struct cas *cp, const int ring, in cas_page_swap() argument
1391 cas_page_t **page0 = cp->rx_pages[0]; in cas_page_swap()
1392 cas_page_t **page1 = cp->rx_pages[1]; in cas_page_swap()
1396 cas_page_t *new = cas_page_spare(cp, index); in cas_page_swap()
1406 static void cas_clean_rxds(struct cas *cp) in cas_clean_rxds() argument
1409 struct cas_rx_desc *rxd = cp->init_rxds[0]; in cas_clean_rxds()
1415 while ((skb = __skb_dequeue(&cp->rx_flows[i]))) { in cas_clean_rxds()
1423 cas_page_t *page = cas_page_swap(cp, 0, i); in cas_clean_rxds()
1429 cp->rx_old[0] = RX_DESC_RINGN_SIZE(0) - 4; in cas_clean_rxds()
1430 cp->rx_last[0] = 0; in cas_clean_rxds()
1431 cp->cas_flags &= ~CAS_FLAG_RXD_POST(0); in cas_clean_rxds()
1434 static void cas_clean_rxcs(struct cas *cp) in cas_clean_rxcs() argument
1439 memset(cp->rx_cur, 0, sizeof(*cp->rx_cur)*N_RX_COMP_RINGS); in cas_clean_rxcs()
1440 memset(cp->rx_new, 0, sizeof(*cp->rx_new)*N_RX_COMP_RINGS); in cas_clean_rxcs()
1442 struct cas_rx_comp *rxc = cp->init_rxcs[i]; in cas_clean_rxcs()
1456 static int cas_rxmac_reset(struct cas *cp)
1458 struct net_device *dev = cp->dev;
1463 writel(cp->mac_rx_cfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG);
1465 if (!(readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_EN))
1475 writel(0, cp->regs + REG_RX_CFG);
1477 if (!(readl(cp->regs + REG_RX_CFG) & RX_CFG_DMA_EN))
1489 writel(SW_RESET_RX, cp->regs + REG_SW_RESET);
1491 if (!(readl(cp->regs + REG_SW_RESET) & SW_RESET_RX))
1501 cas_clean_rxds(cp);
1502 cas_clean_rxcs(cp);
1505 cas_init_rx_dma(cp);
1508 val = readl(cp->regs + REG_RX_CFG);
1509 writel(val | RX_CFG_DMA_EN, cp->regs + REG_RX_CFG);
1510 writel(MAC_RX_FRAME_RECV, cp->regs + REG_MAC_RX_MASK);
1511 val = readl(cp->regs + REG_MAC_RX_CFG);
1512 writel(val | MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG);
1517 static int cas_rxmac_interrupt(struct net_device *dev, struct cas *cp, in cas_rxmac_interrupt() argument
1520 u32 stat = readl(cp->regs + REG_MAC_RX_STATUS); in cas_rxmac_interrupt()
1525 netif_dbg(cp, intr, cp->dev, "rxmac interrupt, stat: 0x%x\n", stat); in cas_rxmac_interrupt()
1528 spin_lock(&cp->stat_lock[0]); in cas_rxmac_interrupt()
1530 cp->net_stats[0].rx_frame_errors += 0x10000; in cas_rxmac_interrupt()
1533 cp->net_stats[0].rx_crc_errors += 0x10000; in cas_rxmac_interrupt()
1536 cp->net_stats[0].rx_length_errors += 0x10000; in cas_rxmac_interrupt()
1539 cp->net_stats[0].rx_over_errors++; in cas_rxmac_interrupt()
1540 cp->net_stats[0].rx_fifo_errors++; in cas_rxmac_interrupt()
1546 spin_unlock(&cp->stat_lock[0]); in cas_rxmac_interrupt()
1550 static int cas_mac_interrupt(struct net_device *dev, struct cas *cp, in cas_mac_interrupt() argument
1553 u32 stat = readl(cp->regs + REG_MAC_CTRL_STATUS); in cas_mac_interrupt()
1558 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_mac_interrupt()
1566 cp->pause_entered++; in cas_mac_interrupt()
1569 cp->pause_last_time_recvd = (stat >> 16); in cas_mac_interrupt()
1576 static inline int cas_mdio_link_not_up(struct cas *cp) in cas_mdio_link_not_up() argument
1580 switch (cp->lstate) { in cas_mdio_link_not_up()
1582 netif_info(cp, link, cp->dev, "Autoneg failed again, keeping forced mode\n"); in cas_mdio_link_not_up()
1583 cas_phy_write(cp, MII_BMCR, cp->link_fcntl); in cas_mdio_link_not_up()
1584 cp->timer_ticks = 5; in cas_mdio_link_not_up()
1585 cp->lstate = link_force_ok; in cas_mdio_link_not_up()
1586 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_mdio_link_not_up()
1590 val = cas_phy_read(cp, MII_BMCR); in cas_mdio_link_not_up()
1597 val |= (cp->cas_flags & CAS_FLAG_1000MB_CAP) ? in cas_mdio_link_not_up()
1599 cas_phy_write(cp, MII_BMCR, val); in cas_mdio_link_not_up()
1600 cp->timer_ticks = 5; in cas_mdio_link_not_up()
1601 cp->lstate = link_force_try; in cas_mdio_link_not_up()
1602 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_mdio_link_not_up()
1607 val = cas_phy_read(cp, MII_BMCR); in cas_mdio_link_not_up()
1608 cp->timer_ticks = 5; in cas_mdio_link_not_up()
1612 cas_phy_write(cp, MII_BMCR, val); in cas_mdio_link_not_up()
1622 cas_phy_write(cp, MII_BMCR, val); in cas_mdio_link_not_up()
1633 static int cas_mii_link_check(struct cas *cp, const u16 bmsr) in cas_mii_link_check() argument
1643 if ((cp->lstate == link_force_try) && in cas_mii_link_check()
1644 (cp->link_cntl & BMCR_ANENABLE)) { in cas_mii_link_check()
1645 cp->lstate = link_force_ret; in cas_mii_link_check()
1646 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_mii_link_check()
1647 cas_mif_poll(cp, 0); in cas_mii_link_check()
1648 cp->link_fcntl = cas_phy_read(cp, MII_BMCR); in cas_mii_link_check()
1649 cp->timer_ticks = 5; in cas_mii_link_check()
1650 if (cp->opened) in cas_mii_link_check()
1651 netif_info(cp, link, cp->dev, in cas_mii_link_check()
1653 cas_phy_write(cp, MII_BMCR, in cas_mii_link_check()
1654 cp->link_fcntl | BMCR_ANENABLE | in cas_mii_link_check()
1656 cas_mif_poll(cp, 1); in cas_mii_link_check()
1658 } else if (cp->lstate != link_up) { in cas_mii_link_check()
1659 cp->lstate = link_up; in cas_mii_link_check()
1660 cp->link_transition = LINK_TRANSITION_LINK_UP; in cas_mii_link_check()
1662 if (cp->opened) { in cas_mii_link_check()
1663 cas_set_link_modes(cp); in cas_mii_link_check()
1664 netif_carrier_on(cp->dev); in cas_mii_link_check()
1674 if (cp->lstate == link_up) { in cas_mii_link_check()
1675 cp->lstate = link_down; in cas_mii_link_check()
1676 cp->link_transition = LINK_TRANSITION_LINK_DOWN; in cas_mii_link_check()
1678 netif_carrier_off(cp->dev); in cas_mii_link_check()
1679 if (cp->opened) in cas_mii_link_check()
1680 netif_info(cp, link, cp->dev, "Link down\n"); in cas_mii_link_check()
1683 } else if (++cp->timer_ticks > 10) in cas_mii_link_check()
1684 cas_mdio_link_not_up(cp); in cas_mii_link_check()
1689 static int cas_mif_interrupt(struct net_device *dev, struct cas *cp, in cas_mif_interrupt() argument
1692 u32 stat = readl(cp->regs + REG_MIF_STATUS); in cas_mif_interrupt()
1700 return cas_mii_link_check(cp, bmsr); in cas_mif_interrupt()
1703 static int cas_pci_interrupt(struct net_device *dev, struct cas *cp, in cas_pci_interrupt() argument
1706 u32 stat = readl(cp->regs + REG_PCI_ERR_STATUS); in cas_pci_interrupt()
1712 stat, readl(cp->regs + REG_BIM_DIAG)); in cas_pci_interrupt()
1716 ((cp->cas_flags & CAS_FLAG_REG_PLUS) == 0)) in cas_pci_interrupt()
1735 pci_read_config_word(cp->pdev, PCI_STATUS, &cfg); in cas_pci_interrupt()
1757 pci_write_config_word(cp->pdev, PCI_STATUS, cfg); in cas_pci_interrupt()
1769 static int cas_abnormal_irq(struct net_device *dev, struct cas *cp, in cas_abnormal_irq() argument
1774 netif_printk(cp, rx_err, KERN_DEBUG, cp->dev, in cas_abnormal_irq()
1776 spin_lock(&cp->stat_lock[0]); in cas_abnormal_irq()
1777 cp->net_stats[0].rx_errors++; in cas_abnormal_irq()
1778 spin_unlock(&cp->stat_lock[0]); in cas_abnormal_irq()
1784 netif_printk(cp, rx_err, KERN_DEBUG, cp->dev, in cas_abnormal_irq()
1786 spin_lock(&cp->stat_lock[0]); in cas_abnormal_irq()
1787 cp->net_stats[0].rx_errors++; in cas_abnormal_irq()
1788 spin_unlock(&cp->stat_lock[0]); in cas_abnormal_irq()
1793 if (cas_pcs_interrupt(dev, cp, status)) in cas_abnormal_irq()
1798 if (cas_txmac_interrupt(dev, cp, status)) in cas_abnormal_irq()
1803 if (cas_rxmac_interrupt(dev, cp, status)) in cas_abnormal_irq()
1808 if (cas_mac_interrupt(dev, cp, status)) in cas_abnormal_irq()
1813 if (cas_mif_interrupt(dev, cp, status)) in cas_abnormal_irq()
1818 if (cas_pci_interrupt(dev, cp, status)) in cas_abnormal_irq()
1825 atomic_inc(&cp->reset_task_pending); in cas_abnormal_irq()
1826 atomic_inc(&cp->reset_task_pending_all); in cas_abnormal_irq()
1828 schedule_work(&cp->reset_task); in cas_abnormal_irq()
1830 atomic_set(&cp->reset_task_pending, CAS_RESET_ALL); in cas_abnormal_irq()
1832 schedule_work(&cp->reset_task); in cas_abnormal_irq()
1842 static inline int cas_calc_tabort(struct cas *cp, const unsigned long addr, in cas_calc_tabort() argument
1847 if (CAS_TABORT(cp) == 1) in cas_calc_tabort()
1854 static inline void cas_tx_ringN(struct cas *cp, int ring, int limit) in cas_tx_ringN() argument
1858 struct net_device *dev = cp->dev; in cas_tx_ringN()
1861 spin_lock(&cp->tx_lock[ring]); in cas_tx_ringN()
1862 txds = cp->init_txds[ring]; in cas_tx_ringN()
1863 skbs = cp->tx_skbs[ring]; in cas_tx_ringN()
1864 entry = cp->tx_old[ring]; in cas_tx_ringN()
1881 + cp->tx_tiny_use[ring][entry].nbufs + 1; in cas_tx_ringN()
1885 netif_printk(cp, tx_done, KERN_DEBUG, cp->dev, in cas_tx_ringN()
1889 cp->tx_tiny_use[ring][entry].nbufs = 0; in cas_tx_ringN()
1897 pci_unmap_page(cp->pdev, daddr, dlen, in cas_tx_ringN()
1902 if (cp->tx_tiny_use[ring][entry].used) { in cas_tx_ringN()
1903 cp->tx_tiny_use[ring][entry].used = 0; in cas_tx_ringN()
1908 spin_lock(&cp->stat_lock[ring]); in cas_tx_ringN()
1909 cp->net_stats[ring].tx_packets++; in cas_tx_ringN()
1910 cp->net_stats[ring].tx_bytes += skb->len; in cas_tx_ringN()
1911 spin_unlock(&cp->stat_lock[ring]); in cas_tx_ringN()
1914 cp->tx_old[ring] = entry; in cas_tx_ringN()
1921 (TX_BUFFS_AVAIL(cp, ring) > CAS_TABORT(cp)*(MAX_SKB_FRAGS + 1))) in cas_tx_ringN()
1923 spin_unlock(&cp->tx_lock[ring]); in cas_tx_ringN()
1926 static void cas_tx(struct net_device *dev, struct cas *cp, in cas_tx() argument
1931 u64 compwb = le64_to_cpu(cp->init_block->tx_compwb); in cas_tx()
1933 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_tx()
1944 limit = readl(cp->regs + REG_TX_COMPN(ring)); in cas_tx()
1946 if (cp->tx_old[ring] != limit) in cas_tx()
1947 cas_tx_ringN(cp, ring, limit); in cas_tx()
1952 static int cas_rx_process_pkt(struct cas *cp, struct cas_rx_comp *rxc, in cas_rx_process_pkt() argument
1973 skb = netdev_alloc_skb(cp->dev, alloclen + swivel + cp->crc_size); in cas_rx_process_pkt()
1984 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
1990 i += cp->crc_size; in cas_rx_process_pkt()
1991 pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr + off, i, in cas_rx_process_pkt()
1995 pci_dma_sync_single_for_device(cp->pdev, page->dma_addr + off, i, in cas_rx_process_pkt()
2009 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
2012 hlen = min(cp->page_size - off, dlen); in cas_rx_process_pkt()
2014 netif_printk(cp, rx_err, KERN_DEBUG, cp->dev, in cas_rx_process_pkt()
2021 i += cp->crc_size; in cas_rx_process_pkt()
2022 pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr + off, i, in cas_rx_process_pkt()
2030 pci_dma_sync_single_for_device(cp->pdev, page->dma_addr + off, i, in cas_rx_process_pkt()
2035 RX_USED_ADD(page, cp->mtu_stride); in cas_rx_process_pkt()
2057 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
2058 pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr, in cas_rx_process_pkt()
2059 hlen + cp->crc_size, in cas_rx_process_pkt()
2061 pci_dma_sync_single_for_device(cp->pdev, page->dma_addr, in cas_rx_process_pkt()
2062 hlen + cp->crc_size, in cas_rx_process_pkt()
2074 RX_USED_ADD(page, hlen + cp->crc_size); in cas_rx_process_pkt()
2077 if (cp->crc_size) { in cas_rx_process_pkt()
2088 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
2090 hlen = min(cp->page_size - off, dlen); in cas_rx_process_pkt()
2092 netif_printk(cp, rx_err, KERN_DEBUG, cp->dev, in cas_rx_process_pkt()
2099 i += cp->crc_size; in cas_rx_process_pkt()
2100 pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr + off, i, in cas_rx_process_pkt()
2104 pci_dma_sync_single_for_device(cp->pdev, page->dma_addr + off, i, in cas_rx_process_pkt()
2108 RX_USED_ADD(page, cp->mtu_stride); in cas_rx_process_pkt()
2116 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
2117 pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr, in cas_rx_process_pkt()
2118 dlen + cp->crc_size, in cas_rx_process_pkt()
2121 memcpy(p, addr, dlen + cp->crc_size); in cas_rx_process_pkt()
2122 pci_dma_sync_single_for_device(cp->pdev, page->dma_addr, in cas_rx_process_pkt()
2123 dlen + cp->crc_size, in cas_rx_process_pkt()
2126 RX_USED_ADD(page, dlen + cp->crc_size); in cas_rx_process_pkt()
2129 if (cp->crc_size) { in cas_rx_process_pkt()
2137 if (cp->crc_size) { in cas_rx_process_pkt()
2139 csum = csum_fold(csum_partial(crcaddr, cp->crc_size, in cas_rx_process_pkt()
2144 skb->protocol = eth_type_trans(skb, cp->dev); in cas_rx_process_pkt()
2168 static inline void cas_rx_flow_pkt(struct cas *cp, const u64 *words, in cas_rx_flow_pkt() argument
2172 struct sk_buff_head *flow = &cp->rx_flows[flowid]; in cas_rx_flow_pkt()
2189 static void cas_post_page(struct cas *cp, const int ring, const int index) in cas_post_page() argument
2194 entry = cp->rx_old[ring]; in cas_post_page()
2196 new = cas_page_swap(cp, ring, index); in cas_post_page()
2197 cp->init_rxds[ring][entry].buffer = cpu_to_le64(new->dma_addr); in cas_post_page()
2198 cp->init_rxds[ring][entry].index = in cas_post_page()
2203 cp->rx_old[ring] = entry; in cas_post_page()
2209 writel(entry, cp->regs + REG_RX_KICK); in cas_post_page()
2211 (cp->cas_flags & CAS_FLAG_REG_PLUS)) in cas_post_page()
2212 writel(entry, cp->regs + REG_PLUS_RX_KICK1); in cas_post_page()
2217 static int cas_post_rxds_ringN(struct cas *cp, int ring, int num) in cas_post_rxds_ringN() argument
2221 cas_page_t **page = cp->rx_pages[ring]; in cas_post_rxds_ringN()
2223 entry = cp->rx_old[ring]; in cas_post_rxds_ringN()
2225 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_post_rxds_ringN()
2235 cas_page_t *new = cas_page_dequeue(cp); in cas_post_rxds_ringN()
2240 cp->cas_flags |= CAS_FLAG_RXD_POST(ring); in cas_post_rxds_ringN()
2241 if (!timer_pending(&cp->link_timer)) in cas_post_rxds_ringN()
2242 mod_timer(&cp->link_timer, jiffies + in cas_post_rxds_ringN()
2244 cp->rx_old[ring] = entry; in cas_post_rxds_ringN()
2245 cp->rx_last[ring] = num ? num - released : 0; in cas_post_rxds_ringN()
2248 spin_lock(&cp->rx_inuse_lock); in cas_post_rxds_ringN()
2249 list_add(&page[entry]->list, &cp->rx_inuse_list); in cas_post_rxds_ringN()
2250 spin_unlock(&cp->rx_inuse_lock); in cas_post_rxds_ringN()
2251 cp->init_rxds[ring][entry].buffer = in cas_post_rxds_ringN()
2264 cp->rx_old[ring] = entry; in cas_post_rxds_ringN()
2270 writel(cluster, cp->regs + REG_RX_KICK); in cas_post_rxds_ringN()
2272 (cp->cas_flags & CAS_FLAG_REG_PLUS)) in cas_post_rxds_ringN()
2273 writel(cluster, cp->regs + REG_PLUS_RX_KICK1); in cas_post_rxds_ringN()
2290 static int cas_rx_ringN(struct cas *cp, int ring, int budget) in cas_rx_ringN() argument
2292 struct cas_rx_comp *rxcs = cp->init_rxcs[ring]; in cas_rx_ringN()
2296 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_rx_ringN()
2299 readl(cp->regs + REG_RX_COMP_HEAD), cp->rx_new[ring]); in cas_rx_ringN()
2301 entry = cp->rx_new[ring]; in cas_rx_ringN()
2327 spin_lock(&cp->stat_lock[ring]); in cas_rx_ringN()
2328 cp->net_stats[ring].rx_errors++; in cas_rx_ringN()
2330 cp->net_stats[ring].rx_length_errors++; in cas_rx_ringN()
2332 cp->net_stats[ring].rx_crc_errors++; in cas_rx_ringN()
2333 spin_unlock(&cp->stat_lock[ring]); in cas_rx_ringN()
2337 spin_lock(&cp->stat_lock[ring]); in cas_rx_ringN()
2338 ++cp->net_stats[ring].rx_dropped; in cas_rx_ringN()
2339 spin_unlock(&cp->stat_lock[ring]); in cas_rx_ringN()
2343 len = cas_rx_process_pkt(cp, rxc, entry, words, &skb); in cas_rx_ringN()
2356 cas_rx_flow_pkt(cp, words, skb); in cas_rx_ringN()
2359 spin_lock(&cp->stat_lock[ring]); in cas_rx_ringN()
2360 cp->net_stats[ring].rx_packets++; in cas_rx_ringN()
2361 cp->net_stats[ring].rx_bytes += len; in cas_rx_ringN()
2362 spin_unlock(&cp->stat_lock[ring]); in cas_rx_ringN()
2372 cas_post_page(cp, dring, i); in cas_rx_ringN()
2379 cas_post_page(cp, dring, i); in cas_rx_ringN()
2386 cas_post_page(cp, dring, i); in cas_rx_ringN()
2397 cp->rx_new[ring] = entry; in cas_rx_ringN()
2400 netdev_info(cp->dev, "Memory squeeze, deferring packet\n"); in cas_rx_ringN()
2407 struct cas *cp, int ring) in cas_post_rxcs_ringN() argument
2409 struct cas_rx_comp *rxc = cp->init_rxcs[ring]; in cas_post_rxcs_ringN()
2412 last = cp->rx_cur[ring]; in cas_post_rxcs_ringN()
2413 entry = cp->rx_new[ring]; in cas_post_rxcs_ringN()
2414 netif_printk(cp, intr, KERN_DEBUG, dev, in cas_post_rxcs_ringN()
2416 ring, readl(cp->regs + REG_RX_COMP_HEAD), entry); in cas_post_rxcs_ringN()
2423 cp->rx_cur[ring] = last; in cas_post_rxcs_ringN()
2426 writel(last, cp->regs + REG_RX_COMP_TAIL); in cas_post_rxcs_ringN()
2427 else if (cp->cas_flags & CAS_FLAG_REG_PLUS) in cas_post_rxcs_ringN()
2428 writel(last, cp->regs + REG_PLUS_RX_COMPN_TAIL(ring)); in cas_post_rxcs_ringN()
2438 struct cas *cp, const u32 status, in cas_handle_irqN() argument
2442 cas_post_rxcs_ringN(dev, cp, ring); in cas_handle_irqN()
2448 struct cas *cp = netdev_priv(dev); in cas_interruptN() local
2450 int ring = (irq == cp->pci_irq_INTC) ? 2 : 3; in cas_interruptN()
2451 u32 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(ring)); in cas_interruptN()
2457 spin_lock_irqsave(&cp->lock, flags); in cas_interruptN()
2460 cas_mask_intr(cp); in cas_interruptN()
2461 napi_schedule(&cp->napi); in cas_interruptN()
2463 cas_rx_ringN(cp, ring, 0); in cas_interruptN()
2469 cas_handle_irqN(dev, cp, status, ring); in cas_interruptN()
2470 spin_unlock_irqrestore(&cp->lock, flags); in cas_interruptN()
2477 static inline void cas_handle_irq1(struct cas *cp, const u32 status) in cas_handle_irq1() argument
2482 cas_post_rxds_ringN(cp, 1, 0); in cas_handle_irq1()
2483 spin_lock(&cp->stat_lock[1]); in cas_handle_irq1()
2484 cp->net_stats[1].rx_dropped++; in cas_handle_irq1()
2485 spin_unlock(&cp->stat_lock[1]); in cas_handle_irq1()
2489 cas_post_rxds_ringN(cp, 1, RX_DESC_RINGN_SIZE(1) - in cas_handle_irq1()
2493 cas_post_rxcs_ringN(cp, 1); in cas_handle_irq1()
2500 struct cas *cp = netdev_priv(dev); in cas_interrupt1() local
2502 u32 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(1)); in cas_interrupt1()
2508 spin_lock_irqsave(&cp->lock, flags); in cas_interrupt1()
2511 cas_mask_intr(cp); in cas_interrupt1()
2512 napi_schedule(&cp->napi); in cas_interrupt1()
2514 cas_rx_ringN(cp, 1, 0); in cas_interrupt1()
2519 cas_handle_irq1(cp, status); in cas_interrupt1()
2520 spin_unlock_irqrestore(&cp->lock, flags); in cas_interrupt1()
2526 struct cas *cp, const u32 status) in cas_handle_irq() argument
2530 cas_abnormal_irq(dev, cp, status); in cas_handle_irq()
2536 cas_post_rxds_ringN(cp, 0, 0); in cas_handle_irq()
2537 spin_lock(&cp->stat_lock[0]); in cas_handle_irq()
2538 cp->net_stats[0].rx_dropped++; in cas_handle_irq()
2539 spin_unlock(&cp->stat_lock[0]); in cas_handle_irq()
2541 cas_post_rxds_ringN(cp, 0, RX_DESC_RINGN_SIZE(0) - in cas_handle_irq()
2546 cas_post_rxcs_ringN(dev, cp, 0); in cas_handle_irq()
2552 struct cas *cp = netdev_priv(dev); in cas_interrupt() local
2554 u32 status = readl(cp->regs + REG_INTR_STATUS); in cas_interrupt()
2559 spin_lock_irqsave(&cp->lock, flags); in cas_interrupt()
2561 cas_tx(dev, cp, status); in cas_interrupt()
2567 cas_mask_intr(cp); in cas_interrupt()
2568 napi_schedule(&cp->napi); in cas_interrupt()
2570 cas_rx_ringN(cp, 0, 0); in cas_interrupt()
2576 cas_handle_irq(dev, cp, status); in cas_interrupt()
2577 spin_unlock_irqrestore(&cp->lock, flags); in cas_interrupt()
2585 struct cas *cp = container_of(napi, struct cas, napi); in cas_poll() local
2586 struct net_device *dev = cp->dev; in cas_poll()
2588 u32 status = readl(cp->regs + REG_INTR_STATUS); in cas_poll()
2591 spin_lock_irqsave(&cp->lock, flags); in cas_poll()
2592 cas_tx(dev, cp, status); in cas_poll()
2593 spin_unlock_irqrestore(&cp->lock, flags); in cas_poll()
2607 credits += cas_rx_ringN(cp, j, budget / N_RX_COMP_RINGS); in cas_poll()
2617 spin_lock_irqsave(&cp->lock, flags); in cas_poll()
2619 cas_handle_irq(dev, cp, status); in cas_poll()
2623 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(1)); in cas_poll()
2625 cas_handle_irq1(dev, cp, status); in cas_poll()
2631 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(2)); in cas_poll()
2633 cas_handle_irqN(dev, cp, status, 2); in cas_poll()
2639 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(3)); in cas_poll()
2641 cas_handle_irqN(dev, cp, status, 3); in cas_poll()
2644 spin_unlock_irqrestore(&cp->lock, flags); in cas_poll()
2647 cas_unmask_intr(cp); in cas_poll()
2656 struct cas *cp = netdev_priv(dev); in cas_netpoll() local
2658 cas_disable_irq(cp, 0); in cas_netpoll()
2659 cas_interrupt(cp->pdev->irq, dev); in cas_netpoll()
2660 cas_enable_irq(cp, 0); in cas_netpoll()
2682 struct cas *cp = netdev_priv(dev); in cas_tx_timeout() local
2685 if (!cp->hw_running) { in cas_tx_timeout()
2691 readl(cp->regs + REG_MIF_STATE_MACHINE)); in cas_tx_timeout()
2694 readl(cp->regs + REG_MAC_STATE_MACHINE)); in cas_tx_timeout()
2697 readl(cp->regs + REG_TX_CFG), in cas_tx_timeout()
2698 readl(cp->regs + REG_MAC_TX_STATUS), in cas_tx_timeout()
2699 readl(cp->regs + REG_MAC_TX_CFG), in cas_tx_timeout()
2700 readl(cp->regs + REG_TX_FIFO_PKT_CNT), in cas_tx_timeout()
2701 readl(cp->regs + REG_TX_FIFO_WRITE_PTR), in cas_tx_timeout()
2702 readl(cp->regs + REG_TX_FIFO_READ_PTR), in cas_tx_timeout()
2703 readl(cp->regs + REG_TX_SM_1), in cas_tx_timeout()
2704 readl(cp->regs + REG_TX_SM_2)); in cas_tx_timeout()
2707 readl(cp->regs + REG_RX_CFG), in cas_tx_timeout()
2708 readl(cp->regs + REG_MAC_RX_STATUS), in cas_tx_timeout()
2709 readl(cp->regs + REG_MAC_RX_CFG)); in cas_tx_timeout()
2712 readl(cp->regs + REG_HP_STATE_MACHINE), in cas_tx_timeout()
2713 readl(cp->regs + REG_HP_STATUS0), in cas_tx_timeout()
2714 readl(cp->regs + REG_HP_STATUS1), in cas_tx_timeout()
2715 readl(cp->regs + REG_HP_STATUS2)); in cas_tx_timeout()
2718 atomic_inc(&cp->reset_task_pending); in cas_tx_timeout()
2719 atomic_inc(&cp->reset_task_pending_all); in cas_tx_timeout()
2720 schedule_work(&cp->reset_task); in cas_tx_timeout()
2722 atomic_set(&cp->reset_task_pending, CAS_RESET_ALL); in cas_tx_timeout()
2723 schedule_work(&cp->reset_task); in cas_tx_timeout()
2736 static void cas_write_txd(struct cas *cp, int ring, int entry, in cas_write_txd() argument
2739 struct cas_tx_desc *txd = cp->init_txds[ring] + entry; in cas_write_txd()
2750 static inline void *tx_tiny_buf(struct cas *cp, const int ring, in tx_tiny_buf() argument
2753 return cp->tx_tiny_bufs[ring] + TX_TINY_BUF_LEN*entry; in tx_tiny_buf()
2756 static inline dma_addr_t tx_tiny_map(struct cas *cp, const int ring, in tx_tiny_map() argument
2759 cp->tx_tiny_use[ring][tentry].nbufs++; in tx_tiny_map()
2760 cp->tx_tiny_use[ring][entry].used = 1; in tx_tiny_map()
2761 return cp->tx_tiny_dvma[ring] + TX_TINY_BUF_LEN*entry; in tx_tiny_map()
2764 static inline int cas_xmit_tx_ringN(struct cas *cp, int ring, in cas_xmit_tx_ringN() argument
2767 struct net_device *dev = cp->dev; in cas_xmit_tx_ringN()
2774 spin_lock_irqsave(&cp->tx_lock[ring], flags); in cas_xmit_tx_ringN()
2777 if (TX_BUFFS_AVAIL(cp, ring) <= in cas_xmit_tx_ringN()
2778 CAS_TABORT(cp)*(skb_shinfo(skb)->nr_frags + 1)) { in cas_xmit_tx_ringN()
2780 spin_unlock_irqrestore(&cp->tx_lock[ring], flags); in cas_xmit_tx_ringN()
2795 entry = cp->tx_new[ring]; in cas_xmit_tx_ringN()
2796 cp->tx_skbs[ring][entry] = skb; in cas_xmit_tx_ringN()
2800 mapping = pci_map_page(cp->pdev, virt_to_page(skb->data), in cas_xmit_tx_ringN()
2805 tabort = cas_calc_tabort(cp, (unsigned long) skb->data, len); in cas_xmit_tx_ringN()
2808 cas_write_txd(cp, ring, entry, mapping, len - tabort, in cas_xmit_tx_ringN()
2813 tx_tiny_buf(cp, ring, entry), tabort); in cas_xmit_tx_ringN()
2814 mapping = tx_tiny_map(cp, ring, entry, tentry); in cas_xmit_tx_ringN()
2815 cas_write_txd(cp, ring, entry, mapping, tabort, ctrl, in cas_xmit_tx_ringN()
2818 cas_write_txd(cp, ring, entry, mapping, len, ctrl | in cas_xmit_tx_ringN()
2827 mapping = skb_frag_dma_map(&cp->pdev->dev, fragp, 0, len, in cas_xmit_tx_ringN()
2830 tabort = cas_calc_tabort(cp, fragp->page_offset, len); in cas_xmit_tx_ringN()
2835 cas_write_txd(cp, ring, entry, mapping, len - tabort, in cas_xmit_tx_ringN()
2840 memcpy(tx_tiny_buf(cp, ring, entry), in cas_xmit_tx_ringN()
2844 mapping = tx_tiny_map(cp, ring, entry, tentry); in cas_xmit_tx_ringN()
2848 cas_write_txd(cp, ring, entry, mapping, len, ctrl, in cas_xmit_tx_ringN()
2853 cp->tx_new[ring] = entry; in cas_xmit_tx_ringN()
2854 if (TX_BUFFS_AVAIL(cp, ring) <= CAS_TABORT(cp)*(MAX_SKB_FRAGS + 1)) in cas_xmit_tx_ringN()
2857 netif_printk(cp, tx_queued, KERN_DEBUG, dev, in cas_xmit_tx_ringN()
2859 ring, entry, skb->len, TX_BUFFS_AVAIL(cp, ring)); in cas_xmit_tx_ringN()
2860 writel(entry, cp->regs + REG_TX_KICKN(ring)); in cas_xmit_tx_ringN()
2861 spin_unlock_irqrestore(&cp->tx_lock[ring], flags); in cas_xmit_tx_ringN()
2867 struct cas *cp = netdev_priv(dev); in cas_start_xmit() local
2874 if (skb_padto(skb, cp->min_frame_size)) in cas_start_xmit()
2880 if (cas_xmit_tx_ringN(cp, ring++ & N_TX_RINGS_MASK, skb)) in cas_start_xmit()
2885 static void cas_init_tx_dma(struct cas *cp) in cas_init_tx_dma() argument
2887 u64 desc_dma = cp->block_dvma; in cas_init_tx_dma()
2895 writel((desc_dma + off) >> 32, cp->regs + REG_TX_COMPWB_DB_HI); in cas_init_tx_dma()
2896 writel((desc_dma + off) & 0xffffffff, cp->regs + REG_TX_COMPWB_DB_LOW); in cas_init_tx_dma()
2909 off = (unsigned long) cp->init_txds[i] - in cas_init_tx_dma()
2910 (unsigned long) cp->init_block; in cas_init_tx_dma()
2913 writel((desc_dma + off) >> 32, cp->regs + REG_TX_DBN_HI(i)); in cas_init_tx_dma()
2914 writel((desc_dma + off) & 0xffffffff, cp->regs + in cas_init_tx_dma()
2920 writel(val, cp->regs + REG_TX_CFG); in cas_init_tx_dma()
2926 writel(0x800, cp->regs + REG_TX_MAXBURST_0); in cas_init_tx_dma()
2927 writel(0x1600, cp->regs + REG_TX_MAXBURST_1); in cas_init_tx_dma()
2928 writel(0x2400, cp->regs + REG_TX_MAXBURST_2); in cas_init_tx_dma()
2929 writel(0x4800, cp->regs + REG_TX_MAXBURST_3); in cas_init_tx_dma()
2931 writel(0x800, cp->regs + REG_TX_MAXBURST_0); in cas_init_tx_dma()
2932 writel(0x800, cp->regs + REG_TX_MAXBURST_1); in cas_init_tx_dma()
2933 writel(0x800, cp->regs + REG_TX_MAXBURST_2); in cas_init_tx_dma()
2934 writel(0x800, cp->regs + REG_TX_MAXBURST_3); in cas_init_tx_dma()
2939 static inline void cas_init_dma(struct cas *cp) in cas_init_dma() argument
2941 cas_init_tx_dma(cp); in cas_init_dma()
2942 cas_init_rx_dma(cp); in cas_init_dma()
2945 static void cas_process_mc_list(struct cas *cp) in cas_process_mc_list() argument
2953 netdev_for_each_mc_addr(ha, cp->dev) { in cas_process_mc_list()
2959 cp->regs + REG_MAC_ADDRN(i*3 + 0)); in cas_process_mc_list()
2961 cp->regs + REG_MAC_ADDRN(i*3 + 1)); in cas_process_mc_list()
2963 cp->regs + REG_MAC_ADDRN(i*3 + 2)); in cas_process_mc_list()
2976 writel(hash_table[i], cp->regs + REG_MAC_HASH_TABLEN(i)); in cas_process_mc_list()
2980 static u32 cas_setup_multicast(struct cas *cp) in cas_setup_multicast() argument
2985 if (cp->dev->flags & IFF_PROMISC) { in cas_setup_multicast()
2988 } else if (cp->dev->flags & IFF_ALLMULTI) { in cas_setup_multicast()
2990 writel(0xFFFF, cp->regs + REG_MAC_HASH_TABLEN(i)); in cas_setup_multicast()
2994 cas_process_mc_list(cp); in cas_setup_multicast()
3002 static void cas_clear_mac_err(struct cas *cp) in cas_clear_mac_err() argument
3004 writel(0, cp->regs + REG_MAC_COLL_NORMAL); in cas_clear_mac_err()
3005 writel(0, cp->regs + REG_MAC_COLL_FIRST); in cas_clear_mac_err()
3006 writel(0, cp->regs + REG_MAC_COLL_EXCESS); in cas_clear_mac_err()
3007 writel(0, cp->regs + REG_MAC_COLL_LATE); in cas_clear_mac_err()
3008 writel(0, cp->regs + REG_MAC_TIMER_DEFER); in cas_clear_mac_err()
3009 writel(0, cp->regs + REG_MAC_ATTEMPTS_PEAK); in cas_clear_mac_err()
3010 writel(0, cp->regs + REG_MAC_RECV_FRAME); in cas_clear_mac_err()
3011 writel(0, cp->regs + REG_MAC_LEN_ERR); in cas_clear_mac_err()
3012 writel(0, cp->regs + REG_MAC_ALIGN_ERR); in cas_clear_mac_err()
3013 writel(0, cp->regs + REG_MAC_FCS_ERR); in cas_clear_mac_err()
3014 writel(0, cp->regs + REG_MAC_RX_CODE_ERR); in cas_clear_mac_err()
3018 static void cas_mac_reset(struct cas *cp) in cas_mac_reset() argument
3023 writel(0x1, cp->regs + REG_MAC_TX_RESET); in cas_mac_reset()
3024 writel(0x1, cp->regs + REG_MAC_RX_RESET); in cas_mac_reset()
3029 if (readl(cp->regs + REG_MAC_TX_RESET) == 0) in cas_mac_reset()
3037 if (readl(cp->regs + REG_MAC_RX_RESET) == 0) in cas_mac_reset()
3042 if (readl(cp->regs + REG_MAC_TX_RESET) | in cas_mac_reset()
3043 readl(cp->regs + REG_MAC_RX_RESET)) in cas_mac_reset()
3044 netdev_err(cp->dev, "mac tx[%d]/rx[%d] reset failed [%08x]\n", in cas_mac_reset()
3045 readl(cp->regs + REG_MAC_TX_RESET), in cas_mac_reset()
3046 readl(cp->regs + REG_MAC_RX_RESET), in cas_mac_reset()
3047 readl(cp->regs + REG_MAC_STATE_MACHINE)); in cas_mac_reset()
3052 static void cas_init_mac(struct cas *cp) in cas_init_mac() argument
3054 unsigned char *e = &cp->dev->dev_addr[0]; in cas_init_mac()
3056 cas_mac_reset(cp); in cas_init_mac()
3059 writel(CAWR_RR_DIS, cp->regs + REG_CAWR); in cas_init_mac()
3065 if ((cp->cas_flags & CAS_FLAG_TARGET_ABORT) == 0) in cas_init_mac()
3066 writel(INF_BURST_EN, cp->regs + REG_INF_BURST); in cas_init_mac()
3069 writel(0x1BF0, cp->regs + REG_MAC_SEND_PAUSE); in cas_init_mac()
3071 writel(0x00, cp->regs + REG_MAC_IPG0); in cas_init_mac()
3072 writel(0x08, cp->regs + REG_MAC_IPG1); in cas_init_mac()
3073 writel(0x04, cp->regs + REG_MAC_IPG2); in cas_init_mac()
3076 writel(0x40, cp->regs + REG_MAC_SLOT_TIME); in cas_init_mac()
3079 writel(ETH_ZLEN + 4, cp->regs + REG_MAC_FRAMESIZE_MIN); in cas_init_mac()
3088 cp->regs + REG_MAC_FRAMESIZE_MAX); in cas_init_mac()
3094 if ((cp->cas_flags & CAS_FLAG_SATURN) && cp->crc_size) in cas_init_mac()
3095 writel(0x41, cp->regs + REG_MAC_PA_SIZE); in cas_init_mac()
3097 writel(0x07, cp->regs + REG_MAC_PA_SIZE); in cas_init_mac()
3098 writel(0x04, cp->regs + REG_MAC_JAM_SIZE); in cas_init_mac()
3099 writel(0x10, cp->regs + REG_MAC_ATTEMPT_LIMIT); in cas_init_mac()
3100 writel(0x8808, cp->regs + REG_MAC_CTRL_TYPE); in cas_init_mac()
3102 writel((e[5] | (e[4] << 8)) & 0x3ff, cp->regs + REG_MAC_RANDOM_SEED); in cas_init_mac()
3104 writel(0, cp->regs + REG_MAC_ADDR_FILTER0); in cas_init_mac()
3105 writel(0, cp->regs + REG_MAC_ADDR_FILTER1); in cas_init_mac()
3106 writel(0, cp->regs + REG_MAC_ADDR_FILTER2); in cas_init_mac()
3107 writel(0, cp->regs + REG_MAC_ADDR_FILTER2_1_MASK); in cas_init_mac()
3108 writel(0, cp->regs + REG_MAC_ADDR_FILTER0_MASK); in cas_init_mac()
3112 writel(0x0, cp->regs + REG_MAC_ADDRN(i)); in cas_init_mac()
3114 writel((e[4] << 8) | e[5], cp->regs + REG_MAC_ADDRN(0)); in cas_init_mac()
3115 writel((e[2] << 8) | e[3], cp->regs + REG_MAC_ADDRN(1)); in cas_init_mac()
3116 writel((e[0] << 8) | e[1], cp->regs + REG_MAC_ADDRN(2)); in cas_init_mac()
3118 writel(0x0001, cp->regs + REG_MAC_ADDRN(42)); in cas_init_mac()
3119 writel(0xc200, cp->regs + REG_MAC_ADDRN(43)); in cas_init_mac()
3120 writel(0x0180, cp->regs + REG_MAC_ADDRN(44)); in cas_init_mac()
3122 cp->mac_rx_cfg = cas_setup_multicast(cp); in cas_init_mac()
3124 spin_lock(&cp->stat_lock[N_TX_RINGS]); in cas_init_mac()
3125 cas_clear_mac_err(cp); in cas_init_mac()
3126 spin_unlock(&cp->stat_lock[N_TX_RINGS]); in cas_init_mac()
3132 writel(MAC_TX_FRAME_XMIT, cp->regs + REG_MAC_TX_MASK); in cas_init_mac()
3133 writel(MAC_RX_FRAME_RECV, cp->regs + REG_MAC_RX_MASK); in cas_init_mac()
3138 writel(0xffffffff, cp->regs + REG_MAC_CTRL_MASK); in cas_init_mac()
3142 static void cas_init_pause_thresholds(struct cas *cp) in cas_init_pause_thresholds() argument
3147 if (cp->rx_fifo_size <= (2 * 1024)) { in cas_init_pause_thresholds()
3148 cp->rx_pause_off = cp->rx_pause_on = cp->rx_fifo_size; in cas_init_pause_thresholds()
3150 int max_frame = (cp->dev->mtu + ETH_HLEN + 4 + 4 + 64) & ~63; in cas_init_pause_thresholds()
3151 if (max_frame * 3 > cp->rx_fifo_size) { in cas_init_pause_thresholds()
3152 cp->rx_pause_off = 7104; in cas_init_pause_thresholds()
3153 cp->rx_pause_on = 960; in cas_init_pause_thresholds()
3155 int off = (cp->rx_fifo_size - (max_frame * 2)); in cas_init_pause_thresholds()
3157 cp->rx_pause_off = off; in cas_init_pause_thresholds()
3158 cp->rx_pause_on = on; in cas_init_pause_thresholds()
3187 static int cas_get_vpd_info(struct cas *cp, unsigned char *dev_addr, in cas_get_vpd_info() argument
3190 void __iomem *p = cp->regs + REG_EXPANSION_ROM_RUN_START; in cas_get_vpd_info()
3206 cp->regs + REG_BIM_LOCAL_DEV_EN); in cas_get_vpd_info()
3311 cp->cas_flags |= CAS_FLAG_ENTROPY_DEV; in cas_get_vpd_info()
3352 addr = of_get_property(cp->of_node, "local-mac-address", NULL); in cas_get_vpd_info()
3367 writel(0, cp->regs + REG_BIM_LOCAL_DEV_EN); in cas_get_vpd_info()
3372 static void cas_check_pci_invariants(struct cas *cp) in cas_check_pci_invariants() argument
3374 struct pci_dev *pdev = cp->pdev; in cas_check_pci_invariants()
3376 cp->cas_flags = 0; in cas_check_pci_invariants()
3380 cp->cas_flags |= CAS_FLAG_REG_PLUS; in cas_check_pci_invariants()
3382 cp->cas_flags |= CAS_FLAG_TARGET_ABORT; in cas_check_pci_invariants()
3388 cp->cas_flags |= CAS_FLAG_NO_HW_CSUM; in cas_check_pci_invariants()
3391 cp->cas_flags |= CAS_FLAG_REG_PLUS; in cas_check_pci_invariants()
3398 cp->cas_flags |= CAS_FLAG_SATURN; in cas_check_pci_invariants()
3403 static int cas_check_invariants(struct cas *cp) in cas_check_invariants() argument
3405 struct pci_dev *pdev = cp->pdev; in cas_check_invariants()
3410 cp->page_order = 0; in cas_check_invariants()
3419 cp->page_order = CAS_JUMBO_PAGE_SHIFT - PAGE_SHIFT; in cas_check_invariants()
3425 cp->page_size = (PAGE_SIZE << cp->page_order); in cas_check_invariants()
3428 cp->tx_fifo_size = readl(cp->regs + REG_TX_FIFO_SIZE) * 64; in cas_check_invariants()
3429 cp->rx_fifo_size = RX_FIFO_SIZE; in cas_check_invariants()
3434 cp->phy_type = cas_get_vpd_info(cp, cp->dev->dev_addr, in cas_check_invariants()
3436 if (cp->phy_type & CAS_PHY_SERDES) { in cas_check_invariants()
3437 cp->cas_flags |= CAS_FLAG_1000MB_CAP; in cas_check_invariants()
3442 cfg = readl(cp->regs + REG_MIF_CFG); in cas_check_invariants()
3444 cp->phy_type = CAS_PHY_MII_MDIO1; in cas_check_invariants()
3446 cp->phy_type = CAS_PHY_MII_MDIO0; in cas_check_invariants()
3449 cas_mif_poll(cp, 0); in cas_check_invariants()
3450 writel(PCS_DATAPATH_MODE_MII, cp->regs + REG_PCS_DATAPATH_MODE); in cas_check_invariants()
3457 cp->phy_addr = i; in cas_check_invariants()
3458 phy_id = cas_phy_read(cp, MII_PHYSID1) << 16; in cas_check_invariants()
3459 phy_id |= cas_phy_read(cp, MII_PHYSID2); in cas_check_invariants()
3461 cp->phy_id = phy_id; in cas_check_invariants()
3467 readl(cp->regs + REG_MIF_STATE_MACHINE)); in cas_check_invariants()
3472 cfg = cas_phy_read(cp, MII_BMSR); in cas_check_invariants()
3474 cas_phy_read(cp, CAS_MII_1000_EXTEND)) in cas_check_invariants()
3475 cp->cas_flags |= CAS_FLAG_1000MB_CAP; in cas_check_invariants()
3480 static inline void cas_start_dma(struct cas *cp) in cas_start_dma() argument
3487 val = readl(cp->regs + REG_TX_CFG) | TX_CFG_DMA_EN; in cas_start_dma()
3488 writel(val, cp->regs + REG_TX_CFG); in cas_start_dma()
3489 val = readl(cp->regs + REG_RX_CFG) | RX_CFG_DMA_EN; in cas_start_dma()
3490 writel(val, cp->regs + REG_RX_CFG); in cas_start_dma()
3493 val = readl(cp->regs + REG_MAC_TX_CFG) | MAC_TX_CFG_EN; in cas_start_dma()
3494 writel(val, cp->regs + REG_MAC_TX_CFG); in cas_start_dma()
3495 val = readl(cp->regs + REG_MAC_RX_CFG) | MAC_RX_CFG_EN; in cas_start_dma()
3496 writel(val, cp->regs + REG_MAC_RX_CFG); in cas_start_dma()
3500 val = readl(cp->regs + REG_MAC_TX_CFG); in cas_start_dma()
3508 val = readl(cp->regs + REG_MAC_RX_CFG); in cas_start_dma()
3511 netdev_err(cp->dev, in cas_start_dma()
3513 readl(cp->regs + REG_MIF_STATE_MACHINE), in cas_start_dma()
3514 readl(cp->regs + REG_MAC_STATE_MACHINE)); in cas_start_dma()
3520 netdev_err(cp->dev, "enabling mac failed [%s:%08x:%08x]\n", in cas_start_dma()
3522 readl(cp->regs + REG_MIF_STATE_MACHINE), in cas_start_dma()
3523 readl(cp->regs + REG_MAC_STATE_MACHINE)); in cas_start_dma()
3526 cas_unmask_intr(cp); /* enable interrupts */ in cas_start_dma()
3527 writel(RX_DESC_RINGN_SIZE(0) - 4, cp->regs + REG_RX_KICK); in cas_start_dma()
3528 writel(0, cp->regs + REG_RX_COMP_TAIL); in cas_start_dma()
3530 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_start_dma()
3533 cp->regs + REG_PLUS_RX_KICK1); in cas_start_dma()
3536 writel(0, cp->regs + REG_PLUS_RX_COMPN_TAIL(i)); in cas_start_dma()
3541 static void cas_read_pcs_link_mode(struct cas *cp, int *fd, int *spd, in cas_read_pcs_link_mode() argument
3544 u32 val = readl(cp->regs + REG_PCS_MII_LPA); in cas_read_pcs_link_mode()
3553 static void cas_read_mii_link_mode(struct cas *cp, int *fd, int *spd, in cas_read_mii_link_mode() argument
3563 val = cas_phy_read(cp, MII_LPA); in cas_read_mii_link_mode()
3575 if (cp->cas_flags & CAS_FLAG_1000MB_CAP) { in cas_read_mii_link_mode()
3576 val = cas_phy_read(cp, CAS_MII_1000_STATUS); in cas_read_mii_link_mode()
3589 static void cas_set_link_modes(struct cas *cp) in cas_set_link_modes() argument
3598 if (CAS_PHY_MII(cp->phy_type)) { in cas_set_link_modes()
3599 cas_mif_poll(cp, 0); in cas_set_link_modes()
3600 val = cas_phy_read(cp, MII_BMCR); in cas_set_link_modes()
3602 cas_read_mii_link_mode(cp, &full_duplex, &speed, in cas_set_link_modes()
3611 speed = (cp->cas_flags & CAS_FLAG_1000MB_CAP) ? in cas_set_link_modes()
3614 cas_mif_poll(cp, 1); in cas_set_link_modes()
3617 val = readl(cp->regs + REG_PCS_MII_CTRL); in cas_set_link_modes()
3618 cas_read_pcs_link_mode(cp, &full_duplex, &speed, &pause); in cas_set_link_modes()
3625 netif_info(cp, link, cp->dev, "Link up at %d Mbps, %s-duplex\n", in cas_set_link_modes()
3629 if (CAS_PHY_MII(cp->phy_type)) { in cas_set_link_modes()
3638 writel(val, cp->regs + REG_MAC_XIF_CFG); in cas_set_link_modes()
3660 cp->regs + REG_MAC_TX_CFG); in cas_set_link_modes()
3662 val = readl(cp->regs + REG_MAC_RX_CFG); in cas_set_link_modes()
3665 cp->regs + REG_MAC_RX_CFG); in cas_set_link_modes()
3667 writel(0x200, cp->regs + REG_MAC_SLOT_TIME); in cas_set_link_modes()
3669 cp->crc_size = 4; in cas_set_link_modes()
3671 cp->min_frame_size = CAS_1000MB_MIN_FRAME; in cas_set_link_modes()
3674 writel(val, cp->regs + REG_MAC_TX_CFG); in cas_set_link_modes()
3679 val = readl(cp->regs + REG_MAC_RX_CFG); in cas_set_link_modes()
3682 cp->crc_size = 0; in cas_set_link_modes()
3683 cp->min_frame_size = CAS_MIN_MTU; in cas_set_link_modes()
3686 cp->crc_size = 4; in cas_set_link_modes()
3687 cp->min_frame_size = CAS_MIN_FRAME; in cas_set_link_modes()
3690 cp->regs + REG_MAC_RX_CFG); in cas_set_link_modes()
3691 writel(0x40, cp->regs + REG_MAC_SLOT_TIME); in cas_set_link_modes()
3694 if (netif_msg_link(cp)) { in cas_set_link_modes()
3696 netdev_info(cp->dev, "Pause is enabled (rxfifo: %d off: %d on: %d)\n", in cas_set_link_modes()
3697 cp->rx_fifo_size, in cas_set_link_modes()
3698 cp->rx_pause_off, in cas_set_link_modes()
3699 cp->rx_pause_on); in cas_set_link_modes()
3701 netdev_info(cp->dev, "TX pause enabled\n"); in cas_set_link_modes()
3703 netdev_info(cp->dev, "Pause is disabled\n"); in cas_set_link_modes()
3707 val = readl(cp->regs + REG_MAC_CTRL_CFG); in cas_set_link_modes()
3715 writel(val, cp->regs + REG_MAC_CTRL_CFG); in cas_set_link_modes()
3716 cas_start_dma(cp); in cas_set_link_modes()
3720 static void cas_init_hw(struct cas *cp, int restart_link) in cas_init_hw() argument
3723 cas_phy_init(cp); in cas_init_hw()
3725 cas_init_pause_thresholds(cp); in cas_init_hw()
3726 cas_init_mac(cp); in cas_init_hw()
3727 cas_init_dma(cp); in cas_init_hw()
3731 cp->timer_ticks = 0; in cas_init_hw()
3732 cas_begin_auto_negotiation(cp, NULL); in cas_init_hw()
3733 } else if (cp->lstate == link_up) { in cas_init_hw()
3734 cas_set_link_modes(cp); in cas_init_hw()
3735 netif_carrier_on(cp->dev); in cas_init_hw()
3743 static void cas_hard_reset(struct cas *cp) in cas_hard_reset() argument
3745 writel(BIM_LOCAL_DEV_SOFT_0, cp->regs + REG_BIM_LOCAL_DEV_EN); in cas_hard_reset()
3747 pci_restore_state(cp->pdev); in cas_hard_reset()
3751 static void cas_global_reset(struct cas *cp, int blkflag) in cas_global_reset() argument
3756 if (blkflag && !CAS_PHY_MII(cp->phy_type)) { in cas_global_reset()
3764 cp->regs + REG_SW_RESET); in cas_global_reset()
3766 writel(SW_RESET_TX | SW_RESET_RX, cp->regs + REG_SW_RESET); in cas_global_reset()
3774 u32 val = readl(cp->regs + REG_SW_RESET); in cas_global_reset()
3779 netdev_err(cp->dev, "sw reset failed\n"); in cas_global_reset()
3784 BIM_CFG_RTA_INTR_ENABLE, cp->regs + REG_BIM_CFG); in cas_global_reset()
3792 PCI_ERR_BIM_DMA_READ), cp->regs + in cas_global_reset()
3798 writel(PCS_DATAPATH_MODE_MII, cp->regs + REG_PCS_DATAPATH_MODE); in cas_global_reset()
3801 static void cas_reset(struct cas *cp, int blkflag) in cas_reset() argument
3805 cas_mask_intr(cp); in cas_reset()
3806 cas_global_reset(cp, blkflag); in cas_reset()
3807 cas_mac_reset(cp); in cas_reset()
3808 cas_entropy_reset(cp); in cas_reset()
3811 val = readl(cp->regs + REG_TX_CFG); in cas_reset()
3813 writel(val, cp->regs + REG_TX_CFG); in cas_reset()
3815 val = readl(cp->regs + REG_RX_CFG); in cas_reset()
3817 writel(val, cp->regs + REG_RX_CFG); in cas_reset()
3820 if ((cp->cas_flags & CAS_FLAG_TARGET_ABORT) || in cas_reset()
3822 cas_load_firmware(cp, CAS_HP_FIRMWARE); in cas_reset()
3824 cas_load_firmware(cp, CAS_HP_ALT_FIRMWARE); in cas_reset()
3828 spin_lock(&cp->stat_lock[N_TX_RINGS]); in cas_reset()
3829 cas_clear_mac_err(cp); in cas_reset()
3830 spin_unlock(&cp->stat_lock[N_TX_RINGS]); in cas_reset()
3834 static void cas_shutdown(struct cas *cp) in cas_shutdown() argument
3839 cp->hw_running = 0; in cas_shutdown()
3841 del_timer_sync(&cp->link_timer); in cas_shutdown()
3845 while (atomic_read(&cp->reset_task_pending_mtu) || in cas_shutdown()
3846 atomic_read(&cp->reset_task_pending_spare) || in cas_shutdown()
3847 atomic_read(&cp->reset_task_pending_all)) in cas_shutdown()
3851 while (atomic_read(&cp->reset_task_pending)) in cas_shutdown()
3855 cas_lock_all_save(cp, flags); in cas_shutdown()
3856 cas_reset(cp, 0); in cas_shutdown()
3857 if (cp->cas_flags & CAS_FLAG_SATURN) in cas_shutdown()
3858 cas_phy_powerdown(cp); in cas_shutdown()
3859 cas_unlock_all_restore(cp, flags); in cas_shutdown()
3864 struct cas *cp = netdev_priv(dev); in cas_change_mtu() local
3875 atomic_inc(&cp->reset_task_pending); in cas_change_mtu()
3876 if ((cp->phy_type & CAS_PHY_SERDES)) { in cas_change_mtu()
3877 atomic_inc(&cp->reset_task_pending_all); in cas_change_mtu()
3879 atomic_inc(&cp->reset_task_pending_mtu); in cas_change_mtu()
3881 schedule_work(&cp->reset_task); in cas_change_mtu()
3883 atomic_set(&cp->reset_task_pending, (cp->phy_type & CAS_PHY_SERDES) ? in cas_change_mtu()
3886 schedule_work(&cp->reset_task); in cas_change_mtu()
3889 flush_work(&cp->reset_task); in cas_change_mtu()
3893 static void cas_clean_txd(struct cas *cp, int ring) in cas_clean_txd() argument
3895 struct cas_tx_desc *txd = cp->init_txds[ring]; in cas_clean_txd()
3896 struct sk_buff *skb, **skbs = cp->tx_skbs[ring]; in cas_clean_txd()
3919 pci_unmap_page(cp->pdev, daddr, dlen, in cas_clean_txd()
3929 if (cp->tx_tiny_use[ring][ent].used) in cas_clean_txd()
3937 memset(cp->tx_tiny_use[ring], 0, size*sizeof(*cp->tx_tiny_use[ring])); in cas_clean_txd()
3941 static inline void cas_free_rx_desc(struct cas *cp, int ring) in cas_free_rx_desc() argument
3943 cas_page_t **page = cp->rx_pages[ring]; in cas_free_rx_desc()
3949 cas_page_free(cp, page[i]); in cas_free_rx_desc()
3955 static void cas_free_rxds(struct cas *cp) in cas_free_rxds() argument
3960 cas_free_rx_desc(cp, i); in cas_free_rxds()
3964 static void cas_clean_rings(struct cas *cp) in cas_clean_rings() argument
3969 memset(cp->tx_old, 0, sizeof(*cp->tx_old)*N_TX_RINGS); in cas_clean_rings()
3970 memset(cp->tx_new, 0, sizeof(*cp->tx_new)*N_TX_RINGS); in cas_clean_rings()
3972 cas_clean_txd(cp, i); in cas_clean_rings()
3975 memset(cp->init_block, 0, sizeof(struct cas_init_block)); in cas_clean_rings()
3976 cas_clean_rxds(cp); in cas_clean_rings()
3977 cas_clean_rxcs(cp); in cas_clean_rings()
3981 static inline int cas_alloc_rx_desc(struct cas *cp, int ring) in cas_alloc_rx_desc() argument
3983 cas_page_t **page = cp->rx_pages[ring]; in cas_alloc_rx_desc()
3988 if ((page[i] = cas_page_alloc(cp, GFP_KERNEL)) == NULL) in cas_alloc_rx_desc()
3994 static int cas_alloc_rxds(struct cas *cp) in cas_alloc_rxds() argument
3999 if (cas_alloc_rx_desc(cp, i) < 0) { in cas_alloc_rxds()
4000 cas_free_rxds(cp); in cas_alloc_rxds()
4009 struct cas *cp = container_of(work, struct cas, reset_task); in cas_reset_task() local
4011 int pending = atomic_read(&cp->reset_task_pending); in cas_reset_task()
4013 int pending_all = atomic_read(&cp->reset_task_pending_all); in cas_reset_task()
4014 int pending_spare = atomic_read(&cp->reset_task_pending_spare); in cas_reset_task()
4015 int pending_mtu = atomic_read(&cp->reset_task_pending_mtu); in cas_reset_task()
4021 atomic_dec(&cp->reset_task_pending); in cas_reset_task()
4029 if (cp->hw_running) { in cas_reset_task()
4033 netif_device_detach(cp->dev); in cas_reset_task()
4034 cas_lock_all_save(cp, flags); in cas_reset_task()
4036 if (cp->opened) { in cas_reset_task()
4041 cas_spare_recover(cp, GFP_ATOMIC); in cas_reset_task()
4059 cas_reset(cp, !(pending_all > 0)); in cas_reset_task()
4060 if (cp->opened) in cas_reset_task()
4061 cas_clean_rings(cp); in cas_reset_task()
4062 cas_init_hw(cp, (pending_all > 0)); in cas_reset_task()
4064 cas_reset(cp, !(pending == CAS_RESET_ALL)); in cas_reset_task()
4065 if (cp->opened) in cas_reset_task()
4066 cas_clean_rings(cp); in cas_reset_task()
4067 cas_init_hw(cp, pending == CAS_RESET_ALL); in cas_reset_task()
4071 cas_unlock_all_restore(cp, flags); in cas_reset_task()
4072 netif_device_attach(cp->dev); in cas_reset_task()
4075 atomic_sub(pending_all, &cp->reset_task_pending_all); in cas_reset_task()
4076 atomic_sub(pending_spare, &cp->reset_task_pending_spare); in cas_reset_task()
4077 atomic_sub(pending_mtu, &cp->reset_task_pending_mtu); in cas_reset_task()
4078 atomic_dec(&cp->reset_task_pending); in cas_reset_task()
4080 atomic_set(&cp->reset_task_pending, 0); in cas_reset_task()
4086 struct cas *cp = (struct cas *) data; in cas_link_timer() local
4091 cp->link_transition_jiffies_valid && in cas_link_timer()
4092 ((jiffies - cp->link_transition_jiffies) > in cas_link_timer()
4098 cp->link_transition_jiffies_valid = 0; in cas_link_timer()
4101 if (!cp->hw_running) in cas_link_timer()
4104 spin_lock_irqsave(&cp->lock, flags); in cas_link_timer()
4105 cas_lock_tx(cp); in cas_link_timer()
4106 cas_entropy_gather(cp); in cas_link_timer()
4112 if (atomic_read(&cp->reset_task_pending_all) || in cas_link_timer()
4113 atomic_read(&cp->reset_task_pending_spare) || in cas_link_timer()
4114 atomic_read(&cp->reset_task_pending_mtu)) in cas_link_timer()
4117 if (atomic_read(&cp->reset_task_pending)) in cas_link_timer()
4122 if ((mask = (cp->cas_flags & CAS_FLAG_RXD_POST_MASK))) { in cas_link_timer()
4131 if (cas_post_rxds_ringN(cp, i, cp->rx_last[i]) < 0) { in cas_link_timer()
4135 cp->cas_flags &= ~rmask; in cas_link_timer()
4139 if (CAS_PHY_MII(cp->phy_type)) { in cas_link_timer()
4141 cas_mif_poll(cp, 0); in cas_link_timer()
4142 bmsr = cas_phy_read(cp, MII_BMSR); in cas_link_timer()
4148 bmsr = cas_phy_read(cp, MII_BMSR); in cas_link_timer()
4149 cas_mif_poll(cp, 1); in cas_link_timer()
4150 readl(cp->regs + REG_MIF_STATUS); /* avoid dups */ in cas_link_timer()
4151 reset = cas_mii_link_check(cp, bmsr); in cas_link_timer()
4153 reset = cas_pcs_link_check(cp); in cas_link_timer()
4160 if ((readl(cp->regs + REG_MAC_TX_STATUS) & MAC_TX_FRAME_XMIT) == 0) { in cas_link_timer()
4161 u32 val = readl(cp->regs + REG_MAC_STATE_MACHINE); in cas_link_timer()
4167 netif_printk(cp, tx_err, KERN_DEBUG, cp->dev, in cas_link_timer()
4173 val = readl(cp->regs + REG_TX_FIFO_PKT_CNT); in cas_link_timer()
4174 wptr = readl(cp->regs + REG_TX_FIFO_WRITE_PTR); in cas_link_timer()
4175 rptr = readl(cp->regs + REG_TX_FIFO_READ_PTR); in cas_link_timer()
4177 netif_printk(cp, tx_err, KERN_DEBUG, cp->dev, in cas_link_timer()
4184 cas_hard_reset(cp); in cas_link_timer()
4190 atomic_inc(&cp->reset_task_pending); in cas_link_timer()
4191 atomic_inc(&cp->reset_task_pending_all); in cas_link_timer()
4192 schedule_work(&cp->reset_task); in cas_link_timer()
4194 atomic_set(&cp->reset_task_pending, CAS_RESET_ALL); in cas_link_timer()
4196 schedule_work(&cp->reset_task); in cas_link_timer()
4201 mod_timer(&cp->link_timer, jiffies + CAS_LINK_TIMEOUT); in cas_link_timer()
4202 cas_unlock_tx(cp); in cas_link_timer()
4203 spin_unlock_irqrestore(&cp->lock, flags); in cas_link_timer()
4209 static void cas_tx_tiny_free(struct cas *cp) in cas_tx_tiny_free() argument
4211 struct pci_dev *pdev = cp->pdev; in cas_tx_tiny_free()
4215 if (!cp->tx_tiny_bufs[i]) in cas_tx_tiny_free()
4219 cp->tx_tiny_bufs[i], in cas_tx_tiny_free()
4220 cp->tx_tiny_dvma[i]); in cas_tx_tiny_free()
4221 cp->tx_tiny_bufs[i] = NULL; in cas_tx_tiny_free()
4225 static int cas_tx_tiny_alloc(struct cas *cp) in cas_tx_tiny_alloc() argument
4227 struct pci_dev *pdev = cp->pdev; in cas_tx_tiny_alloc()
4231 cp->tx_tiny_bufs[i] = in cas_tx_tiny_alloc()
4233 &cp->tx_tiny_dvma[i]); in cas_tx_tiny_alloc()
4234 if (!cp->tx_tiny_bufs[i]) { in cas_tx_tiny_alloc()
4235 cas_tx_tiny_free(cp); in cas_tx_tiny_alloc()
4245 struct cas *cp = netdev_priv(dev); in cas_open() local
4249 mutex_lock(&cp->pm_mutex); in cas_open()
4251 hw_was_up = cp->hw_running; in cas_open()
4256 if (!cp->hw_running) { in cas_open()
4258 cas_lock_all_save(cp, flags); in cas_open()
4264 cas_reset(cp, 0); in cas_open()
4265 cp->hw_running = 1; in cas_open()
4266 cas_unlock_all_restore(cp, flags); in cas_open()
4270 if (cas_tx_tiny_alloc(cp) < 0) in cas_open()
4274 if (cas_alloc_rxds(cp) < 0) in cas_open()
4278 cas_spare_init(cp); in cas_open()
4279 cas_spare_recover(cp, GFP_KERNEL); in cas_open()
4286 if (request_irq(cp->pdev->irq, cas_interrupt, in cas_open()
4288 netdev_err(cp->dev, "failed to request irq !\n"); in cas_open()
4294 napi_enable(&cp->napi); in cas_open()
4297 cas_lock_all_save(cp, flags); in cas_open()
4298 cas_clean_rings(cp); in cas_open()
4299 cas_init_hw(cp, !hw_was_up); in cas_open()
4300 cp->opened = 1; in cas_open()
4301 cas_unlock_all_restore(cp, flags); in cas_open()
4304 mutex_unlock(&cp->pm_mutex); in cas_open()
4308 cas_spare_free(cp); in cas_open()
4309 cas_free_rxds(cp); in cas_open()
4311 cas_tx_tiny_free(cp); in cas_open()
4313 mutex_unlock(&cp->pm_mutex); in cas_open()
4320 struct cas *cp = netdev_priv(dev); in cas_close() local
4323 napi_disable(&cp->napi); in cas_close()
4326 mutex_lock(&cp->pm_mutex); in cas_close()
4331 cas_lock_all_save(cp, flags); in cas_close()
4332 cp->opened = 0; in cas_close()
4333 cas_reset(cp, 0); in cas_close()
4334 cas_phy_init(cp); in cas_close()
4335 cas_begin_auto_negotiation(cp, NULL); in cas_close()
4336 cas_clean_rings(cp); in cas_close()
4337 cas_unlock_all_restore(cp, flags); in cas_close()
4339 free_irq(cp->pdev->irq, (void *) dev); in cas_close()
4340 cas_spare_free(cp); in cas_close()
4341 cas_free_rxds(cp); in cas_close()
4342 cas_tx_tiny_free(cp); in cas_close()
4343 mutex_unlock(&cp->pm_mutex); in cas_close()
4394 static void cas_read_regs(struct cas *cp, u8 *ptr, int len) in cas_read_regs() argument
4400 spin_lock_irqsave(&cp->lock, flags); in cas_read_regs()
4405 hval = cas_phy_read(cp, in cas_read_regs()
4409 val= readl(cp->regs+ethtool_register_table[i].offsets); in cas_read_regs()
4413 spin_unlock_irqrestore(&cp->lock, flags); in cas_read_regs()
4418 struct cas *cp = netdev_priv(dev); in cas_get_stats() local
4419 struct net_device_stats *stats = cp->net_stats; in cas_get_stats()
4425 if (!cp->hw_running) in cas_get_stats()
4436 spin_lock_irqsave(&cp->stat_lock[N_TX_RINGS], flags); in cas_get_stats()
4438 readl(cp->regs + REG_MAC_FCS_ERR) & 0xffff; in cas_get_stats()
4440 readl(cp->regs + REG_MAC_ALIGN_ERR) &0xffff; in cas_get_stats()
4442 readl(cp->regs + REG_MAC_LEN_ERR) & 0xffff; in cas_get_stats()
4444 tmp = (readl(cp->regs + REG_MAC_COLL_EXCESS) & 0xffff) + in cas_get_stats()
4445 (readl(cp->regs + REG_MAC_COLL_LATE) & 0xffff); in cas_get_stats()
4448 tmp + (readl(cp->regs + REG_MAC_COLL_NORMAL) & 0xffff); in cas_get_stats()
4451 readl(cp->regs + REG_MAC_COLL_EXCESS); in cas_get_stats()
4452 stats[N_TX_RINGS].collisions += readl(cp->regs + REG_MAC_COLL_EXCESS) + in cas_get_stats()
4453 readl(cp->regs + REG_MAC_COLL_LATE); in cas_get_stats()
4455 cas_clear_mac_err(cp); in cas_get_stats()
4458 spin_lock(&cp->stat_lock[0]); in cas_get_stats()
4465 spin_unlock(&cp->stat_lock[0]); in cas_get_stats()
4468 spin_lock(&cp->stat_lock[i]); in cas_get_stats()
4481 spin_unlock(&cp->stat_lock[i]); in cas_get_stats()
4483 spin_unlock_irqrestore(&cp->stat_lock[N_TX_RINGS], flags); in cas_get_stats()
4490 struct cas *cp = netdev_priv(dev); in cas_set_multicast() local
4495 if (!cp->hw_running) in cas_set_multicast()
4498 spin_lock_irqsave(&cp->lock, flags); in cas_set_multicast()
4499 rxcfg = readl(cp->regs + REG_MAC_RX_CFG); in cas_set_multicast()
4502 writel(rxcfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG); in cas_set_multicast()
4503 while (readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_EN) { in cas_set_multicast()
4512 writel(rxcfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG); in cas_set_multicast()
4513 while (readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_HASH_FILTER_EN) { in cas_set_multicast()
4520 cp->mac_rx_cfg = rxcfg_new = cas_setup_multicast(cp); in cas_set_multicast()
4522 writel(rxcfg, cp->regs + REG_MAC_RX_CFG); in cas_set_multicast()
4523 spin_unlock_irqrestore(&cp->lock, flags); in cas_set_multicast()
4528 struct cas *cp = netdev_priv(dev); in cas_get_drvinfo() local
4531 strlcpy(info->bus_info, pci_name(cp->pdev), sizeof(info->bus_info)); in cas_get_drvinfo()
4536 struct cas *cp = netdev_priv(dev); in cas_get_settings() local
4544 if (cp->cas_flags & CAS_FLAG_1000MB_CAP) { in cas_get_settings()
4550 spin_lock_irqsave(&cp->lock, flags); in cas_get_settings()
4552 linkstate = cp->lstate; in cas_get_settings()
4553 if (CAS_PHY_MII(cp->phy_type)) { in cas_get_settings()
4555 cmd->transceiver = (cp->cas_flags & CAS_FLAG_SATURN) ? in cas_get_settings()
4557 cmd->phy_address = cp->phy_addr; in cas_get_settings()
4571 if (cp->hw_running) { in cas_get_settings()
4572 cas_mif_poll(cp, 0); in cas_get_settings()
4573 bmcr = cas_phy_read(cp, MII_BMCR); in cas_get_settings()
4574 cas_read_mii_link_mode(cp, &full_duplex, in cas_get_settings()
4576 cas_mif_poll(cp, 1); in cas_get_settings()
4586 if (cp->hw_running) { in cas_get_settings()
4588 bmcr = readl(cp->regs + REG_PCS_MII_CTRL); in cas_get_settings()
4589 cas_read_pcs_link_mode(cp, &full_duplex, in cas_get_settings()
4593 spin_unlock_irqrestore(&cp->lock, flags); in cas_get_settings()
4624 if (cp->link_cntl & BMCR_ANENABLE) { in cas_get_settings()
4629 if (cp->link_cntl & BMCR_SPEED100) { in cas_get_settings()
4631 } else if (cp->link_cntl & CAS_BMCR_SPEED1000) { in cas_get_settings()
4634 cmd->duplex = (cp->link_cntl & BMCR_FULLDPLX)? in cas_get_settings()
4643 struct cas *cp = netdev_priv(dev); in cas_set_settings() local
4661 spin_lock_irqsave(&cp->lock, flags); in cas_set_settings()
4662 cas_begin_auto_negotiation(cp, cmd); in cas_set_settings()
4663 spin_unlock_irqrestore(&cp->lock, flags); in cas_set_settings()
4669 struct cas *cp = netdev_priv(dev); in cas_nway_reset() local
4672 if ((cp->link_cntl & BMCR_ANENABLE) == 0) in cas_nway_reset()
4676 spin_lock_irqsave(&cp->lock, flags); in cas_nway_reset()
4677 cas_begin_auto_negotiation(cp, NULL); in cas_nway_reset()
4678 spin_unlock_irqrestore(&cp->lock, flags); in cas_nway_reset()
4685 struct cas *cp = netdev_priv(dev); in cas_get_link() local
4686 return cp->lstate == link_up; in cas_get_link()
4691 struct cas *cp = netdev_priv(dev); in cas_get_msglevel() local
4692 return cp->msg_enable; in cas_get_msglevel()
4697 struct cas *cp = netdev_priv(dev); in cas_set_msglevel() local
4698 cp->msg_enable = value; in cas_set_msglevel()
4703 struct cas *cp = netdev_priv(dev); in cas_get_regs_len() local
4704 return cp->casreg_len < CAS_MAX_REGS ? cp->casreg_len: CAS_MAX_REGS; in cas_get_regs_len()
4710 struct cas *cp = netdev_priv(dev); in cas_get_regs() local
4713 cas_read_regs(cp, p, regs->len / sizeof(u32)); in cas_get_regs()
4735 struct cas *cp = netdev_priv(dev); in cas_get_ethtool_stats() local
4736 struct net_device_stats *stats = cas_get_stats(cp->dev); in cas_get_ethtool_stats()
4774 struct cas *cp = netdev_priv(dev); in cas_ioctl() local
4782 mutex_lock(&cp->pm_mutex); in cas_ioctl()
4785 data->phy_id = cp->phy_addr; in cas_ioctl()
4789 spin_lock_irqsave(&cp->lock, flags); in cas_ioctl()
4790 cas_mif_poll(cp, 0); in cas_ioctl()
4791 data->val_out = cas_phy_read(cp, data->reg_num & 0x1f); in cas_ioctl()
4792 cas_mif_poll(cp, 1); in cas_ioctl()
4793 spin_unlock_irqrestore(&cp->lock, flags); in cas_ioctl()
4798 spin_lock_irqsave(&cp->lock, flags); in cas_ioctl()
4799 cas_mif_poll(cp, 0); in cas_ioctl()
4800 rc = cas_phy_write(cp, data->reg_num & 0x1f, data->val_in); in cas_ioctl()
4801 cas_mif_poll(cp, 1); in cas_ioctl()
4802 spin_unlock_irqrestore(&cp->lock, flags); in cas_ioctl()
4808 mutex_unlock(&cp->pm_mutex); in cas_ioctl()
4917 struct cas *cp; in cas_init_one() local
4938 dev = alloc_etherdev(sizeof(*cp)); in cas_init_one()
5012 cp = netdev_priv(dev); in cas_init_one()
5013 cp->pdev = pdev; in cas_init_one()
5016 cp->orig_cacheline_size = cas_cacheline_size ? orig_cacheline_size: 0; in cas_init_one()
5018 cp->dev = dev; in cas_init_one()
5019 cp->msg_enable = (cassini_debug < 0) ? CAS_DEF_MSG_ENABLE : in cas_init_one()
5023 cp->of_node = pci_device_to_OF_node(pdev); in cas_init_one()
5026 cp->link_transition = LINK_TRANSITION_UNKNOWN; in cas_init_one()
5027 cp->link_transition_jiffies_valid = 0; in cas_init_one()
5029 spin_lock_init(&cp->lock); in cas_init_one()
5030 spin_lock_init(&cp->rx_inuse_lock); in cas_init_one()
5031 spin_lock_init(&cp->rx_spare_lock); in cas_init_one()
5033 spin_lock_init(&cp->stat_lock[i]); in cas_init_one()
5034 spin_lock_init(&cp->tx_lock[i]); in cas_init_one()
5036 spin_lock_init(&cp->stat_lock[N_TX_RINGS]); in cas_init_one()
5037 mutex_init(&cp->pm_mutex); in cas_init_one()
5039 init_timer(&cp->link_timer); in cas_init_one()
5040 cp->link_timer.function = cas_link_timer; in cas_init_one()
5041 cp->link_timer.data = (unsigned long) cp; in cas_init_one()
5047 atomic_set(&cp->reset_task_pending, 0); in cas_init_one()
5048 atomic_set(&cp->reset_task_pending_all, 0); in cas_init_one()
5049 atomic_set(&cp->reset_task_pending_spare, 0); in cas_init_one()
5050 atomic_set(&cp->reset_task_pending_mtu, 0); in cas_init_one()
5052 INIT_WORK(&cp->reset_task, cas_reset_task); in cas_init_one()
5056 cp->link_cntl = link_modes[link_mode]; in cas_init_one()
5058 cp->link_cntl = BMCR_ANENABLE; in cas_init_one()
5059 cp->lstate = link_down; in cas_init_one()
5060 cp->link_transition = LINK_TRANSITION_LINK_DOWN; in cas_init_one()
5061 netif_carrier_off(cp->dev); in cas_init_one()
5062 cp->timer_ticks = 0; in cas_init_one()
5065 cp->regs = pci_iomap(pdev, 0, casreg_len); in cas_init_one()
5066 if (!cp->regs) { in cas_init_one()
5070 cp->casreg_len = casreg_len; in cas_init_one()
5073 cas_check_pci_invariants(cp); in cas_init_one()
5074 cas_hard_reset(cp); in cas_init_one()
5075 cas_reset(cp, 0); in cas_init_one()
5076 if (cas_check_invariants(cp)) in cas_init_one()
5078 if (cp->cas_flags & CAS_FLAG_SATURN) in cas_init_one()
5079 cas_saturn_firmware_init(cp); in cas_init_one()
5081 cp->init_block = (struct cas_init_block *) in cas_init_one()
5083 &cp->block_dvma); in cas_init_one()
5084 if (!cp->init_block) { in cas_init_one()
5090 cp->init_txds[i] = cp->init_block->txds[i]; in cas_init_one()
5093 cp->init_rxds[i] = cp->init_block->rxds[i]; in cas_init_one()
5096 cp->init_rxcs[i] = cp->init_block->rxcs[i]; in cas_init_one()
5099 skb_queue_head_init(&cp->rx_flows[i]); in cas_init_one()
5106 netif_napi_add(dev, &cp->napi, cas_poll, 64); in cas_init_one()
5112 if ((cp->cas_flags & CAS_FLAG_NO_HW_CSUM) == 0) in cas_init_one()
5123 i = readl(cp->regs + REG_BIM_CFG); in cas_init_one()
5125 (cp->cas_flags & CAS_FLAG_REG_PLUS) ? "+" : "", in cas_init_one()
5128 (cp->phy_type == CAS_PHY_SERDES) ? "Fi" : "Cu", pdev->irq, in cas_init_one()
5132 cp->hw_running = 1; in cas_init_one()
5133 cas_entropy_reset(cp); in cas_init_one()
5134 cas_phy_init(cp); in cas_init_one()
5135 cas_begin_auto_negotiation(cp, NULL); in cas_init_one()
5140 cp->init_block, cp->block_dvma); in cas_init_one()
5143 mutex_lock(&cp->pm_mutex); in cas_init_one()
5144 if (cp->hw_running) in cas_init_one()
5145 cas_shutdown(cp); in cas_init_one()
5146 mutex_unlock(&cp->pm_mutex); in cas_init_one()
5148 pci_iounmap(pdev, cp->regs); in cas_init_one()
5171 struct cas *cp; in cas_remove_one() local
5175 cp = netdev_priv(dev); in cas_remove_one()
5178 vfree(cp->fw_data); in cas_remove_one()
5180 mutex_lock(&cp->pm_mutex); in cas_remove_one()
5181 cancel_work_sync(&cp->reset_task); in cas_remove_one()
5182 if (cp->hw_running) in cas_remove_one()
5183 cas_shutdown(cp); in cas_remove_one()
5184 mutex_unlock(&cp->pm_mutex); in cas_remove_one()
5187 if (cp->orig_cacheline_size) { in cas_remove_one()
5192 cp->orig_cacheline_size); in cas_remove_one()
5196 cp->init_block, cp->block_dvma); in cas_remove_one()
5197 pci_iounmap(pdev, cp->regs); in cas_remove_one()
5207 struct cas *cp = netdev_priv(dev); in cas_suspend() local
5210 mutex_lock(&cp->pm_mutex); in cas_suspend()
5213 if (cp->opened) { in cas_suspend()
5216 cas_lock_all_save(cp, flags); in cas_suspend()
5223 cas_reset(cp, 0); in cas_suspend()
5224 cas_clean_rings(cp); in cas_suspend()
5225 cas_unlock_all_restore(cp, flags); in cas_suspend()
5228 if (cp->hw_running) in cas_suspend()
5229 cas_shutdown(cp); in cas_suspend()
5230 mutex_unlock(&cp->pm_mutex); in cas_suspend()
5238 struct cas *cp = netdev_priv(dev); in cas_resume() local
5242 mutex_lock(&cp->pm_mutex); in cas_resume()
5243 cas_hard_reset(cp); in cas_resume()
5244 if (cp->opened) { in cas_resume()
5246 cas_lock_all_save(cp, flags); in cas_resume()
5247 cas_reset(cp, 0); in cas_resume()
5248 cp->hw_running = 1; in cas_resume()
5249 cas_clean_rings(cp); in cas_resume()
5250 cas_init_hw(cp, 1); in cas_resume()
5251 cas_unlock_all_restore(cp, flags); in cas_resume()
5255 mutex_unlock(&cp->pm_mutex); in cas_resume()