94 #define RBR(iobase) (iobase+0)  argument
95 #define THR(iobase) (iobase+0)  argument
96 #define IER(iobase) (iobase+1)  argument
97 #define IIR(iobase) (iobase+2)  argument
98 #define FCR(iobase) (iobase+2)  argument
99 #define LCR(iobase) (iobase+3)  argument
100 #define MCR(iobase) (iobase+4)  argument
101 #define LSR(iobase) (iobase+5)  argument
102 #define MSR(iobase) (iobase+6)  argument
103 #define SCR(iobase) (iobase+7)  argument
104 #define DLL(iobase) (iobase+0)  argument
105 #define DLM(iobase) (iobase+1)  argument
439 static enum uart ser12_check_uart(unsigned int iobase)  in ser12_check_uart()  argument
446 	b1 = inb(MCR(iobase));  in ser12_check_uart()
447 	outb(b1 | 0x10, MCR(iobase));	/* loopback mode */  in ser12_check_uart()
448 	b2 = inb(MSR(iobase));  in ser12_check_uart()
449 	outb(0x1a, MCR(iobase));  in ser12_check_uart()
450 	b3 = inb(MSR(iobase)) & 0xf0;  in ser12_check_uart()
451 	outb(b1, MCR(iobase));			/* restore old values */  in ser12_check_uart()
452 	outb(b2, MSR(iobase));  in ser12_check_uart()
455 	inb(RBR(iobase));  in ser12_check_uart()
456 	inb(RBR(iobase));  in ser12_check_uart()
457 	outb(0x01, FCR(iobase));		/* enable FIFOs */  in ser12_check_uart()
458 	u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];  in ser12_check_uart()
460 		outb(0x5a, SCR(iobase));  in ser12_check_uart()
461 		b1 = inb(SCR(iobase));  in ser12_check_uart()
462 		outb(0xa5, SCR(iobase));  in ser12_check_uart()
463 		b2 = inb(SCR(iobase));  in ser12_check_uart()
640 static int iobase[NR_PORTS] = { 0x3f8, };  variable
645 module_param_array(iobase, int, NULL, 0);
646 MODULE_PARM_DESC(iobase, "baycom io base address");
675 			iobase[i] = irq[i] = 0;  in init_baycomserhdx()
679 				       ifname, iobase[i], irq[i], 0);  in init_baycomserhdx()
734 	iobase[nr_dev] = ints[1];  in baycom_ser_hdx_setup()