Lines Matching refs:ci
248 static void brcmf_chip_sb_corerev(struct brcmf_chip_priv *ci, in brcmf_chip_sb_corerev() argument
253 regdata = ci->ops->read32(ci->ctx, CORE_SB(core->base, sbidhigh)); in brcmf_chip_sb_corerev()
259 struct brcmf_chip_priv *ci; in brcmf_chip_sb_iscoreup() local
263 ci = core->chip; in brcmf_chip_sb_iscoreup()
265 regdata = ci->ops->read32(ci->ctx, address); in brcmf_chip_sb_iscoreup()
273 struct brcmf_chip_priv *ci; in brcmf_chip_ai_iscoreup() local
277 ci = core->chip; in brcmf_chip_ai_iscoreup()
278 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_iscoreup()
281 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL); in brcmf_chip_ai_iscoreup()
290 struct brcmf_chip_priv *ci; in brcmf_chip_sb_coredisable() local
293 ci = core->chip; in brcmf_chip_sb_coredisable()
295 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
299 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
305 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
306 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_coredisable()
309 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
311 SPINWAIT((ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)) in brcmf_chip_sb_coredisable()
314 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)); in brcmf_chip_sb_coredisable()
318 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow)); in brcmf_chip_sb_coredisable()
320 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
323 ci->ops->write32(ci->ctx, in brcmf_chip_sb_coredisable()
325 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
328 SPINWAIT((ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
336 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), val); in brcmf_chip_sb_coredisable()
337 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
341 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow)); in brcmf_chip_sb_coredisable()
343 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
346 ci->ops->write32(ci->ctx, in brcmf_chip_sb_coredisable()
352 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_coredisable()
360 struct brcmf_chip_priv *ci; in brcmf_chip_ai_coredisable() local
363 ci = core->chip; in brcmf_chip_ai_coredisable()
366 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL); in brcmf_chip_ai_coredisable()
371 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_coredisable()
373 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_coredisable()
376 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL, in brcmf_chip_ai_coredisable()
381 SPINWAIT(ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) != in brcmf_chip_ai_coredisable()
386 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_coredisable()
388 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_coredisable()
394 struct brcmf_chip_priv *ci; in brcmf_chip_sb_resetcore() local
398 ci = core->chip; in brcmf_chip_sb_resetcore()
411 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
414 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
418 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)); in brcmf_chip_sb_resetcore()
420 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatehigh), 0); in brcmf_chip_sb_resetcore()
422 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbimstate)); in brcmf_chip_sb_resetcore()
425 ci->ops->write32(ci->ctx, CORE_SB(base, sbimstate), regdata); in brcmf_chip_sb_resetcore()
429 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
431 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
435 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
437 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
444 struct brcmf_chip_priv *ci; in brcmf_chip_ai_resetcore() local
447 ci = core->chip; in brcmf_chip_ai_resetcore()
453 while (ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) & in brcmf_chip_ai_resetcore()
455 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL, 0); in brcmf_chip_ai_resetcore()
462 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_resetcore()
464 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_resetcore()
476 static struct brcmf_core *brcmf_chip_add_core(struct brcmf_chip_priv *ci, in brcmf_chip_add_core() argument
488 core->chip = ci; in brcmf_chip_add_core()
491 list_add_tail(&core->list, &ci->cores); in brcmf_chip_add_core()
496 static int brcmf_chip_cores_check(struct brcmf_chip_priv *ci) in brcmf_chip_cores_check() argument
504 list_for_each_entry(core, &ci->cores, list) { in brcmf_chip_cores_check()
670 static u32 brcmf_chip_tcm_rambase(struct brcmf_chip_priv *ci) in brcmf_chip_tcm_rambase() argument
672 switch (ci->pub.chip) { in brcmf_chip_tcm_rambase()
694 brcmf_err("unknown chip: %s\n", ci->pub.name); in brcmf_chip_tcm_rambase()
700 static int brcmf_chip_get_raminfo(struct brcmf_chip_priv *ci) in brcmf_chip_get_raminfo() argument
705 mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_ARM_CR4); in brcmf_chip_get_raminfo()
708 ci->pub.ramsize = brcmf_chip_tcm_ramsize(mem_core); in brcmf_chip_get_raminfo()
709 ci->pub.rambase = brcmf_chip_tcm_rambase(ci); in brcmf_chip_get_raminfo()
710 if (!ci->pub.rambase) { in brcmf_chip_get_raminfo()
715 mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_SYS_MEM); in brcmf_chip_get_raminfo()
719 ci->pub.ramsize = brcmf_chip_sysmem_ramsize(mem_core); in brcmf_chip_get_raminfo()
720 ci->pub.rambase = brcmf_chip_tcm_rambase(ci); in brcmf_chip_get_raminfo()
721 if (!ci->pub.rambase) { in brcmf_chip_get_raminfo()
726 mem = brcmf_chip_get_core(&ci->pub, in brcmf_chip_get_raminfo()
734 brcmf_chip_socram_ramsize(mem_core, &ci->pub.ramsize, in brcmf_chip_get_raminfo()
735 &ci->pub.srsize); in brcmf_chip_get_raminfo()
739 ci->pub.rambase, ci->pub.ramsize, ci->pub.ramsize, in brcmf_chip_get_raminfo()
740 ci->pub.srsize, ci->pub.srsize); in brcmf_chip_get_raminfo()
742 if (!ci->pub.ramsize) { in brcmf_chip_get_raminfo()
747 if (ci->pub.ramsize > BRCMF_CHIP_MAX_MEMSIZE) { in brcmf_chip_get_raminfo()
755 static u32 brcmf_chip_dmp_get_desc(struct brcmf_chip_priv *ci, u32 *eromaddr, in brcmf_chip_dmp_get_desc() argument
761 val = ci->ops->read32(ci->ctx, *eromaddr); in brcmf_chip_dmp_get_desc()
775 static int brcmf_chip_dmp_get_regaddr(struct brcmf_chip_priv *ci, u32 *eromaddr, in brcmf_chip_dmp_get_regaddr() argument
786 val = brcmf_chip_dmp_get_desc(ci, eromaddr, &desc); in brcmf_chip_dmp_get_regaddr()
802 val = brcmf_chip_dmp_get_desc(ci, eromaddr, &desc); in brcmf_chip_dmp_get_regaddr()
819 brcmf_chip_dmp_get_desc(ci, eromaddr, NULL); in brcmf_chip_dmp_get_regaddr()
825 val = brcmf_chip_dmp_get_desc(ci, eromaddr, NULL); in brcmf_chip_dmp_get_regaddr()
828 brcmf_chip_dmp_get_desc(ci, eromaddr, NULL); in brcmf_chip_dmp_get_regaddr()
848 int brcmf_chip_dmp_erom_scan(struct brcmf_chip_priv *ci) in brcmf_chip_dmp_erom_scan() argument
859 eromaddr = ci->ops->read32(ci->ctx, CORE_CC_REG(SI_ENUM_BASE, eromptr)); in brcmf_chip_dmp_erom_scan()
862 val = brcmf_chip_dmp_get_desc(ci, &eromaddr, &desc_type); in brcmf_chip_dmp_erom_scan()
876 val = brcmf_chip_dmp_get_desc(ci, &eromaddr, &desc_type); in brcmf_chip_dmp_erom_scan()
893 err = brcmf_chip_dmp_get_regaddr(ci, &eromaddr, &base, &wrap); in brcmf_chip_dmp_erom_scan()
898 core = brcmf_chip_add_core(ci, id, base, wrap); in brcmf_chip_dmp_erom_scan()
908 static int brcmf_chip_recognition(struct brcmf_chip_priv *ci) in brcmf_chip_recognition() argument
920 regdata = ci->ops->read32(ci->ctx, CORE_CC_REG(SI_ENUM_BASE, chipid)); in brcmf_chip_recognition()
921 ci->pub.chip = regdata & CID_ID_MASK; in brcmf_chip_recognition()
922 ci->pub.chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT; in brcmf_chip_recognition()
925 brcmf_chip_name(ci->pub.chip, ci->pub.name, sizeof(ci->pub.name)); in brcmf_chip_recognition()
927 socitype == SOCI_SB ? "SB" : "AXI", ci->pub.name, in brcmf_chip_recognition()
928 ci->pub.chiprev); in brcmf_chip_recognition()
931 if (ci->pub.chip != BRCM_CC_4329_CHIP_ID) { in brcmf_chip_recognition()
935 ci->iscoreup = brcmf_chip_sb_iscoreup; in brcmf_chip_recognition()
936 ci->coredisable = brcmf_chip_sb_coredisable; in brcmf_chip_recognition()
937 ci->resetcore = brcmf_chip_sb_resetcore; in brcmf_chip_recognition()
939 core = brcmf_chip_add_core(ci, BCMA_CORE_CHIPCOMMON, in brcmf_chip_recognition()
941 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
942 core = brcmf_chip_add_core(ci, BCMA_CORE_SDIO_DEV, in brcmf_chip_recognition()
944 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
945 core = brcmf_chip_add_core(ci, BCMA_CORE_INTERNAL_MEM, in brcmf_chip_recognition()
947 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
948 core = brcmf_chip_add_core(ci, BCMA_CORE_ARM_CM3, in brcmf_chip_recognition()
950 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
952 core = brcmf_chip_add_core(ci, BCMA_CORE_80211, 0x18001000, 0); in brcmf_chip_recognition()
953 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
955 ci->iscoreup = brcmf_chip_ai_iscoreup; in brcmf_chip_recognition()
956 ci->coredisable = brcmf_chip_ai_coredisable; in brcmf_chip_recognition()
957 ci->resetcore = brcmf_chip_ai_resetcore; in brcmf_chip_recognition()
959 brcmf_chip_dmp_erom_scan(ci); in brcmf_chip_recognition()
966 ret = brcmf_chip_cores_check(ci); in brcmf_chip_recognition()
971 brcmf_chip_set_passive(&ci->pub); in brcmf_chip_recognition()
976 if (ci->ops->reset) { in brcmf_chip_recognition()
977 ci->ops->reset(ci->ctx, &ci->pub); in brcmf_chip_recognition()
978 brcmf_chip_set_passive(&ci->pub); in brcmf_chip_recognition()
981 return brcmf_chip_get_raminfo(ci); in brcmf_chip_recognition()