Lines Matching refs:ctrl
44 static inline struct pci_dev *ctrl_dev(struct controller *ctrl) in ctrl_dev() argument
46 return ctrl->pcie->port; in ctrl_dev()
50 static void start_int_poll_timer(struct controller *ctrl, int sec);
55 struct controller *ctrl = (struct controller *)data; in int_poll_timeout() local
58 pcie_isr(0, ctrl); in int_poll_timeout()
60 init_timer(&ctrl->poll_timer); in int_poll_timeout()
64 start_int_poll_timer(ctrl, pciehp_poll_time); in int_poll_timeout()
68 static void start_int_poll_timer(struct controller *ctrl, int sec) in start_int_poll_timer() argument
74 ctrl->poll_timer.function = &int_poll_timeout; in start_int_poll_timer()
75 ctrl->poll_timer.data = (unsigned long)ctrl; in start_int_poll_timer()
76 ctrl->poll_timer.expires = jiffies + sec * HZ; in start_int_poll_timer()
77 add_timer(&ctrl->poll_timer); in start_int_poll_timer()
80 static inline int pciehp_request_irq(struct controller *ctrl) in pciehp_request_irq() argument
82 int retval, irq = ctrl->pcie->irq; in pciehp_request_irq()
86 init_timer(&ctrl->poll_timer); in pciehp_request_irq()
87 start_int_poll_timer(ctrl, 10); in pciehp_request_irq()
92 retval = request_irq(irq, pcie_isr, IRQF_SHARED, MY_NAME, ctrl); in pciehp_request_irq()
94 ctrl_err(ctrl, "Cannot get irq %d for the hotplug controller\n", in pciehp_request_irq()
99 static inline void pciehp_free_irq(struct controller *ctrl) in pciehp_free_irq() argument
102 del_timer_sync(&ctrl->poll_timer); in pciehp_free_irq()
104 free_irq(ctrl->pcie->irq, ctrl); in pciehp_free_irq()
107 static int pcie_poll_cmd(struct controller *ctrl, int timeout) in pcie_poll_cmd() argument
109 struct pci_dev *pdev = ctrl_dev(ctrl); in pcie_poll_cmd()
115 ctrl_info(ctrl, "%s: no response from device\n", in pcie_poll_cmd()
133 static void pcie_wait_cmd(struct controller *ctrl) in pcie_wait_cmd() argument
137 unsigned long cmd_timeout = ctrl->cmd_started + duration; in pcie_wait_cmd()
145 if (NO_CMD_CMPL(ctrl)) in pcie_wait_cmd()
148 if (!ctrl->cmd_busy) in pcie_wait_cmd()
161 if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE && in pcie_wait_cmd()
162 ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE) in pcie_wait_cmd()
163 rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout); in pcie_wait_cmd()
165 rc = pcie_poll_cmd(ctrl, jiffies_to_msecs(timeout)); in pcie_wait_cmd()
176 ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n", in pcie_wait_cmd()
177 ctrl->slot_ctrl, in pcie_wait_cmd()
178 jiffies_to_msecs(jiffies - ctrl->cmd_started)); in pcie_wait_cmd()
181 static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd, in pcie_do_write_cmd() argument
184 struct pci_dev *pdev = ctrl_dev(ctrl); in pcie_do_write_cmd()
187 mutex_lock(&ctrl->ctrl_lock); in pcie_do_write_cmd()
192 pcie_wait_cmd(ctrl); in pcie_do_write_cmd()
196 ctrl_info(ctrl, "%s: no response from device\n", __func__); in pcie_do_write_cmd()
202 ctrl->cmd_busy = 1; in pcie_do_write_cmd()
205 ctrl->cmd_started = jiffies; in pcie_do_write_cmd()
206 ctrl->slot_ctrl = slot_ctrl; in pcie_do_write_cmd()
213 pcie_wait_cmd(ctrl); in pcie_do_write_cmd()
216 mutex_unlock(&ctrl->ctrl_lock); in pcie_do_write_cmd()
225 static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) in pcie_write_cmd() argument
227 pcie_do_write_cmd(ctrl, cmd, mask, true); in pcie_write_cmd()
231 static void pcie_write_cmd_nowait(struct controller *ctrl, u16 cmd, u16 mask) in pcie_write_cmd_nowait() argument
233 pcie_do_write_cmd(ctrl, cmd, mask, false); in pcie_write_cmd_nowait()
236 bool pciehp_check_link_active(struct controller *ctrl) in pciehp_check_link_active() argument
238 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_check_link_active()
246 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); in pciehp_check_link_active()
251 static void __pcie_wait_link_active(struct controller *ctrl, bool active) in __pcie_wait_link_active() argument
255 if (pciehp_check_link_active(ctrl) == active) in __pcie_wait_link_active()
260 if (pciehp_check_link_active(ctrl) == active) in __pcie_wait_link_active()
263 ctrl_dbg(ctrl, "Data Link Layer Link Active not %s in 1000 msec\n", in __pcie_wait_link_active()
267 static void pcie_wait_link_active(struct controller *ctrl) in pcie_wait_link_active() argument
269 __pcie_wait_link_active(ctrl, true); in pcie_wait_link_active()
298 int pciehp_check_link_status(struct controller *ctrl) in pciehp_check_link_status() argument
300 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_check_link_status()
309 if (ctrl->link_active_reporting) in pciehp_check_link_status()
310 pcie_wait_link_active(ctrl); in pciehp_check_link_status()
316 found = pci_bus_check_dev(ctrl->pcie->port->subordinate, in pciehp_check_link_status()
320 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); in pciehp_check_link_status()
323 ctrl_err(ctrl, "link training error: status %#06x\n", in pciehp_check_link_status()
328 pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); in pciehp_check_link_status()
336 static int __pciehp_link_set(struct controller *ctrl, bool enable) in __pciehp_link_set() argument
338 struct pci_dev *pdev = ctrl_dev(ctrl); in __pciehp_link_set()
349 ctrl_dbg(ctrl, "%s: lnk_ctrl = %x\n", __func__, lnk_ctrl); in __pciehp_link_set()
353 static int pciehp_link_enable(struct controller *ctrl) in pciehp_link_enable() argument
355 return __pciehp_link_set(ctrl, true); in pciehp_link_enable()
362 struct pci_dev *pdev = ctrl_dev(slot->ctrl); in pciehp_get_raw_indicator_status()
372 struct controller *ctrl = slot->ctrl; in pciehp_get_attention_status() local
373 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_attention_status()
377 ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__, in pciehp_get_attention_status()
378 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_attention_status()
398 struct controller *ctrl = slot->ctrl; in pciehp_get_power_status() local
399 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_power_status()
403 ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__, in pciehp_get_power_status()
404 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_power_status()
421 struct pci_dev *pdev = ctrl_dev(slot->ctrl); in pciehp_get_latch_status()
430 struct pci_dev *pdev = ctrl_dev(slot->ctrl); in pciehp_get_adapter_status()
439 struct pci_dev *pdev = ctrl_dev(slot->ctrl); in pciehp_query_power_fault()
450 struct controller *ctrl = slot->ctrl; in pciehp_set_raw_indicator_status() local
452 pcie_write_cmd_nowait(ctrl, status << 6, in pciehp_set_raw_indicator_status()
459 struct controller *ctrl = slot->ctrl; in pciehp_set_attention_status() local
462 if (!ATTN_LED(ctrl)) in pciehp_set_attention_status()
478 pcie_write_cmd_nowait(ctrl, slot_cmd, PCI_EXP_SLTCTL_AIC); in pciehp_set_attention_status()
479 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_set_attention_status()
480 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); in pciehp_set_attention_status()
485 struct controller *ctrl = slot->ctrl; in pciehp_green_led_on() local
487 if (!PWR_LED(ctrl)) in pciehp_green_led_on()
490 pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_PWR_IND_ON, in pciehp_green_led_on()
492 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_green_led_on()
493 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_green_led_on()
499 struct controller *ctrl = slot->ctrl; in pciehp_green_led_off() local
501 if (!PWR_LED(ctrl)) in pciehp_green_led_off()
504 pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF, in pciehp_green_led_off()
506 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_green_led_off()
507 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_green_led_off()
513 struct controller *ctrl = slot->ctrl; in pciehp_green_led_blink() local
515 if (!PWR_LED(ctrl)) in pciehp_green_led_blink()
518 pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_PWR_IND_BLINK, in pciehp_green_led_blink()
520 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_green_led_blink()
521 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_green_led_blink()
527 struct controller *ctrl = slot->ctrl; in pciehp_power_on_slot() local
528 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_power_on_slot()
537 ctrl->power_fault_detected = 0; in pciehp_power_on_slot()
539 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_ON, PCI_EXP_SLTCTL_PCC); in pciehp_power_on_slot()
540 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_power_on_slot()
541 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_power_on_slot()
544 retval = pciehp_link_enable(ctrl); in pciehp_power_on_slot()
546 ctrl_err(ctrl, "%s: Can not enable the link!\n", __func__); in pciehp_power_on_slot()
553 struct controller *ctrl = slot->ctrl; in pciehp_power_off_slot() local
555 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC); in pciehp_power_off_slot()
556 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_power_off_slot()
557 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_power_off_slot()
563 struct controller *ctrl = (struct controller *)dev_id; in pciehp_isr() local
564 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_isr()
567 struct slot *slot = ctrl->slot; in pciehp_isr()
578 ctrl_info(ctrl, "%s: no response from device\n", __func__); in pciehp_isr()
594 if (ctrl->power_fault_detected) in pciehp_isr()
602 link = pciehp_check_link_active(ctrl); in pciehp_isr()
605 ctrl_dbg(ctrl, "pending interrupts %#06x from Slot Status\n", events); in pciehp_isr()
609 ctrl->cmd_busy = 0; in pciehp_isr()
611 wake_up(&ctrl->queue); in pciehp_isr()
617 ctrl_dbg(ctrl, "ignoring hotplug event %#06x (%s requested no hotplug)\n", in pciehp_isr()
626 ctrl_info(ctrl, "Slot(%s): Attention button pressed\n", in pciehp_isr()
634 ctrl_info(ctrl, "Slot(%s): Card %spresent\n", slot_name(slot), in pciehp_isr()
641 if ((events & PCI_EXP_SLTSTA_PFD) && !ctrl->power_fault_detected) { in pciehp_isr()
642 ctrl->power_fault_detected = 1; in pciehp_isr()
643 ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(slot)); in pciehp_isr()
648 ctrl_info(ctrl, "Slot(%s): Link %s\n", slot_name(slot), in pciehp_isr()
676 void pcie_enable_notification(struct controller *ctrl) in pcie_enable_notification() argument
697 if (ATTN_BUTTN(ctrl)) in pcie_enable_notification()
709 pcie_write_cmd_nowait(ctrl, cmd, mask); in pcie_enable_notification()
710 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pcie_enable_notification()
711 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); in pcie_enable_notification()
714 static void pcie_disable_notification(struct controller *ctrl) in pcie_disable_notification() argument
722 pcie_write_cmd(ctrl, 0, mask); in pcie_disable_notification()
723 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pcie_disable_notification()
724 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); in pcie_disable_notification()
737 struct controller *ctrl = slot->ctrl; in pciehp_reset_slot() local
738 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_reset_slot()
744 if (!ATTN_BUTTN(ctrl)) { in pciehp_reset_slot()
751 pcie_write_cmd(ctrl, 0, ctrl_mask); in pciehp_reset_slot()
752 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_reset_slot()
753 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); in pciehp_reset_slot()
755 del_timer_sync(&ctrl->poll_timer); in pciehp_reset_slot()
757 pci_reset_bridge_secondary_bus(ctrl->pcie->port); in pciehp_reset_slot()
760 pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask); in pciehp_reset_slot()
761 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_reset_slot()
762 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask); in pciehp_reset_slot()
764 int_poll_timeout(ctrl->poll_timer.data); in pciehp_reset_slot()
769 int pcie_init_notification(struct controller *ctrl) in pcie_init_notification() argument
771 if (pciehp_request_irq(ctrl)) in pcie_init_notification()
773 pcie_enable_notification(ctrl); in pcie_init_notification()
774 ctrl->notification_enabled = 1; in pcie_init_notification()
778 static void pcie_shutdown_notification(struct controller *ctrl) in pcie_shutdown_notification() argument
780 if (ctrl->notification_enabled) { in pcie_shutdown_notification()
781 pcie_disable_notification(ctrl); in pcie_shutdown_notification()
782 pciehp_free_irq(ctrl); in pcie_shutdown_notification()
783 ctrl->notification_enabled = 0; in pcie_shutdown_notification()
787 static int pcie_init_slot(struct controller *ctrl) in pcie_init_slot() argument
795 slot->wq = alloc_workqueue("pciehp-%u", 0, 0, PSN(ctrl)); in pcie_init_slot()
799 slot->ctrl = ctrl; in pcie_init_slot()
803 ctrl->slot = slot; in pcie_init_slot()
810 static void pcie_cleanup_slot(struct controller *ctrl) in pcie_cleanup_slot() argument
812 struct slot *slot = ctrl->slot; in pcie_cleanup_slot()
818 static inline void dbg_ctrl(struct controller *ctrl) in dbg_ctrl() argument
820 struct pci_dev *pdev = ctrl->pcie->port; in dbg_ctrl()
826 ctrl_info(ctrl, "Slot Capabilities : 0x%08x\n", ctrl->slot_cap); in dbg_ctrl()
828 ctrl_info(ctrl, "Slot Status : 0x%04x\n", reg16); in dbg_ctrl()
830 ctrl_info(ctrl, "Slot Control : 0x%04x\n", reg16); in dbg_ctrl()
837 struct controller *ctrl; in pcie_init() local
841 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); in pcie_init()
842 if (!ctrl) { in pcie_init()
846 ctrl->pcie = dev; in pcie_init()
852 ctrl->slot_cap = slot_cap; in pcie_init()
853 mutex_init(&ctrl->ctrl_lock); in pcie_init()
854 init_waitqueue_head(&ctrl->queue); in pcie_init()
855 dbg_ctrl(ctrl); in pcie_init()
860 ctrl->link_active_reporting = 1; in pcie_init()
868 …ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interl… in pcie_init()
881 if (pcie_init_slot(ctrl)) in pcie_init()
884 return ctrl; in pcie_init()
887 kfree(ctrl); in pcie_init()
892 void pciehp_release_ctrl(struct controller *ctrl) in pciehp_release_ctrl() argument
894 pcie_shutdown_notification(ctrl); in pciehp_release_ctrl()
895 pcie_cleanup_slot(ctrl); in pciehp_release_ctrl()
896 kfree(ctrl); in pciehp_release_ctrl()