71 	u32 regval;  in phy_berlin_sata_reg_setbits()  local
77 	regval = readl(ctrl_reg + PORT_VSR_DATA);  in phy_berlin_sata_reg_setbits()
78 	regval &= ~mask;  in phy_berlin_sata_reg_setbits()
79 	regval |= val;  in phy_berlin_sata_reg_setbits()
80 	writel(regval, ctrl_reg + PORT_VSR_DATA);  in phy_berlin_sata_reg_setbits()
89 	u32 regval;  in phy_berlin_sata_power_on()  local
97 	regval = readl(priv->base + HOST_VSA_DATA);  in phy_berlin_sata_power_on()
98 	regval &= ~desc->power_bit;  in phy_berlin_sata_power_on()
99 	writel(regval, priv->base + HOST_VSA_DATA);  in phy_berlin_sata_power_on()
103 	regval = readl(priv->base + HOST_VSA_DATA);  in phy_berlin_sata_power_on()
104 	regval |= MBUS_WRITE_REQUEST_SIZE_128 | MBUS_READ_REQUEST_SIZE_128;  in phy_berlin_sata_power_on()
105 	writel(regval, priv->base + HOST_VSA_DATA);  in phy_berlin_sata_power_on()
124 	regval = readl(ctrl_reg + PORT_SCR_CTL);  in phy_berlin_sata_power_on()
125 	regval &= ~GENMASK(7, 4);  in phy_berlin_sata_power_on()
126 	regval |= 0x30;  in phy_berlin_sata_power_on()
127 	writel(regval, ctrl_reg + PORT_SCR_CTL);  in phy_berlin_sata_power_on()
140 	u32 regval;  in phy_berlin_sata_power_off()  local
148 	regval = readl(priv->base + HOST_VSA_DATA);  in phy_berlin_sata_power_off()
149 	regval |= desc->power_bit;  in phy_berlin_sata_power_off()
150 	writel(regval, priv->base + HOST_VSA_DATA);  in phy_berlin_sata_power_off()