64 			"CTRL0: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL0));  in dw_spi_show_regs()
66 			"CTRL1: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL1));  in dw_spi_show_regs()
68 			"SSIENR: \t0x%08x\n", dw_readl(dws, DW_SPI_SSIENR));  in dw_spi_show_regs()
70 			"SER: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SER));  in dw_spi_show_regs()
72 			"BAUDR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_BAUDR));  in dw_spi_show_regs()
74 			"TXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_TXFLTR));  in dw_spi_show_regs()
76 			"RXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_RXFLTR));  in dw_spi_show_regs()
78 			"TXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_TXFLR));  in dw_spi_show_regs()
80 			"RXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_RXFLR));  in dw_spi_show_regs()
82 			"SR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SR));  in dw_spi_show_regs()
84 			"IMR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_IMR));  in dw_spi_show_regs()
86 			"ISR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_ISR));  in dw_spi_show_regs()
88 			"DMACR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_DMACR));  in dw_spi_show_regs()
90 			"DMATDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMATDLR));  in dw_spi_show_regs()
92 			"DMARDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMARDLR));  in dw_spi_show_regs()
157 	tx_room = dws->fifo_len - dw_readl(dws, DW_SPI_TXFLR);  in tx_max()
178 	return min_t(u32, rx_left, dw_readl(dws, DW_SPI_RXFLR));  in rx_max()
228 	u16 irq_status = dw_readl(dws, DW_SPI_ISR);  in interrupt_transfer()
232 		dw_readl(dws, DW_SPI_ICR);  in interrupt_transfer()
257 	u16 irq_status = dw_readl(dws, DW_SPI_ISR) & 0x3f;  in dw_spi_irq()
464 			if (fifo != dw_readl(dws, DW_SPI_TXFLTR))  in spi_hw_init()