297 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
298 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
304 	outb(oldlcr, baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
313 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
314 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
320 	outb(oldlcr, baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
329 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xon1_value()
330 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_set_must_xon1_value()
338 	outb(oldlcr, baseio + UART_LCR);  in mxser_set_must_xon1_value()
346 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xoff1_value()
347 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_set_must_xoff1_value()
355 	outb(oldlcr, baseio + UART_LCR);  in mxser_set_must_xoff1_value()
363 	oldlcr = inb(info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
364 	outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
374 	outb(oldlcr, info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
382 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_enum_value()
383 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_set_must_enum_value()
391 	outb(oldlcr, baseio + UART_LCR);  in mxser_set_must_enum_value()
400 	oldlcr = inb(baseio + UART_LCR);  in mxser_get_must_hardware_id()
401 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_get_must_hardware_id()
409 	outb(oldlcr, baseio + UART_LCR);  in mxser_get_must_hardware_id()
418 	oldlcr = inb(baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
419 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
425 	outb(oldlcr, baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
433 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
434 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
441 	outb(oldlcr, baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
449 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
450 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
456 	outb(oldlcr, baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
464 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
465 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
472 	outb(oldlcr, baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
480 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
481 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
487 	outb(oldlcr, baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
496 	outb(0, io + UART_LCR);  in CheckIsMoxaMust()
609 	cval = inb(info->ioaddr + UART_LCR);  in mxser_set_baud()
611 	outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR);	/* set DLAB */  in mxser_set_baud()
615 	outb(cval, info->ioaddr + UART_LCR);	/* reset DLAB */  in mxser_set_baud()
804 	outb(cval, info->ioaddr + UART_LCR);  in mxser_change_speed()
915 	outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR);	/* reset DLAB */  in mxser_activate()
2044 		outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,  in mxser_rs_break()
2045 			info->ioaddr + UART_LCR);  in mxser_rs_break()
2047 		outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,  in mxser_rs_break()
2048 			info->ioaddr + UART_LCR);  in mxser_rs_break()
2514 	scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);  in mxser_get_ISA_conf()
2515 	outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);  in mxser_get_ISA_conf()
2517 	outb(scratch2, cap + UART_LCR);  in mxser_get_ISA_conf()