Lines Matching refs:up
236 static void ip22zilog_maybe_update_regs(struct uart_ip22zilog_port *up, in ip22zilog_maybe_update_regs() argument
239 if (!ZS_REGS_HELD(up)) { in ip22zilog_maybe_update_regs()
240 if (ZS_TX_ACTIVE(up)) { in ip22zilog_maybe_update_regs()
241 up->flags |= IP22ZILOG_FLAG_REGS_HELD; in ip22zilog_maybe_update_regs()
243 __load_zsregs(channel, up->curregs); in ip22zilog_maybe_update_regs()
251 static bool ip22zilog_receive_chars(struct uart_ip22zilog_port *up, in ip22zilog_receive_chars() argument
256 bool push = up->port.state != NULL; in ip22zilog_receive_chars()
274 ch &= up->parity_mask; in ip22zilog_receive_chars()
278 r1 |= up->tty_break; in ip22zilog_receive_chars()
282 up->port.icount.rx++; in ip22zilog_receive_chars()
284 up->tty_break = 0; in ip22zilog_receive_chars()
287 up->port.icount.brk++; in ip22zilog_receive_chars()
293 up->port.icount.parity++; in ip22zilog_receive_chars()
295 up->port.icount.frame++; in ip22zilog_receive_chars()
297 up->port.icount.overrun++; in ip22zilog_receive_chars()
298 r1 &= up->port.read_status_mask; in ip22zilog_receive_chars()
307 if (uart_handle_sysrq_char(&up->port, ch)) in ip22zilog_receive_chars()
311 uart_insert_char(&up->port, r1, Rx_OVR, ch, flag); in ip22zilog_receive_chars()
316 static void ip22zilog_status_handle(struct uart_ip22zilog_port *up, in ip22zilog_status_handle() argument
328 if (up->curregs[R15] & BRKIE) { in ip22zilog_status_handle()
329 if ((status & BRK_ABRT) && !(up->prev_status & BRK_ABRT)) { in ip22zilog_status_handle()
330 if (uart_handle_break(&up->port)) in ip22zilog_status_handle()
331 up->tty_break = Rx_SYS; in ip22zilog_status_handle()
333 up->tty_break = Rx_BRK; in ip22zilog_status_handle()
337 if (ZS_WANTS_MODEM_STATUS(up)) { in ip22zilog_status_handle()
339 up->port.icount.dsr++; in ip22zilog_status_handle()
345 if ((status ^ up->prev_status) ^ DCD) in ip22zilog_status_handle()
346 uart_handle_dcd_change(&up->port, in ip22zilog_status_handle()
348 if ((status ^ up->prev_status) ^ CTS) in ip22zilog_status_handle()
349 uart_handle_cts_change(&up->port, in ip22zilog_status_handle()
352 wake_up_interruptible(&up->port.state->port.delta_msr_wait); in ip22zilog_status_handle()
355 up->prev_status = status; in ip22zilog_status_handle()
358 static void ip22zilog_transmit_chars(struct uart_ip22zilog_port *up, in ip22zilog_transmit_chars() argument
363 if (ZS_IS_CONS(up)) { in ip22zilog_transmit_chars()
379 up->flags &= ~IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
381 if (ZS_REGS_HELD(up)) { in ip22zilog_transmit_chars()
382 __load_zsregs(channel, up->curregs); in ip22zilog_transmit_chars()
383 up->flags &= ~IP22ZILOG_FLAG_REGS_HELD; in ip22zilog_transmit_chars()
386 if (ZS_TX_STOPPED(up)) { in ip22zilog_transmit_chars()
387 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_transmit_chars()
391 if (up->port.x_char) { in ip22zilog_transmit_chars()
392 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
393 writeb(up->port.x_char, &channel->data); in ip22zilog_transmit_chars()
397 up->port.icount.tx++; in ip22zilog_transmit_chars()
398 up->port.x_char = 0; in ip22zilog_transmit_chars()
402 if (up->port.state == NULL) in ip22zilog_transmit_chars()
404 xmit = &up->port.state->xmit; in ip22zilog_transmit_chars()
407 if (uart_tx_stopped(&up->port)) in ip22zilog_transmit_chars()
410 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
416 up->port.icount.tx++; in ip22zilog_transmit_chars()
419 uart_write_wakeup(&up->port); in ip22zilog_transmit_chars()
431 struct uart_ip22zilog_port *up = dev_id; in ip22zilog_interrupt() local
433 while (up) { in ip22zilog_interrupt()
435 = ZILOG_CHANNEL_FROM_PORT(&up->port); in ip22zilog_interrupt()
439 spin_lock(&up->port.lock); in ip22zilog_interrupt()
449 push = ip22zilog_receive_chars(up, channel); in ip22zilog_interrupt()
451 ip22zilog_status_handle(up, channel); in ip22zilog_interrupt()
453 ip22zilog_transmit_chars(up, channel); in ip22zilog_interrupt()
455 spin_unlock(&up->port.lock); in ip22zilog_interrupt()
458 tty_flip_buffer_push(&up->port.state->port); in ip22zilog_interrupt()
461 up = up->next; in ip22zilog_interrupt()
462 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in ip22zilog_interrupt()
465 spin_lock(&up->port.lock); in ip22zilog_interrupt()
472 push = ip22zilog_receive_chars(up, channel); in ip22zilog_interrupt()
474 ip22zilog_status_handle(up, channel); in ip22zilog_interrupt()
476 ip22zilog_transmit_chars(up, channel); in ip22zilog_interrupt()
478 spin_unlock(&up->port.lock); in ip22zilog_interrupt()
481 tty_flip_buffer_push(&up->port.state->port); in ip22zilog_interrupt()
483 up = up->next; in ip22zilog_interrupt()
547 struct uart_ip22zilog_port *up = in ip22zilog_set_mctrl() local
564 up->curregs[R5] |= set_bits; in ip22zilog_set_mctrl()
565 up->curregs[R5] &= ~clear_bits; in ip22zilog_set_mctrl()
566 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_set_mctrl()
572 struct uart_ip22zilog_port *up = in ip22zilog_stop_tx() local
575 up->flags |= IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_stop_tx()
581 struct uart_ip22zilog_port *up = in ip22zilog_start_tx() local
586 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_start_tx()
587 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_start_tx()
619 uart_write_wakeup(&up->port); in ip22zilog_start_tx()
626 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_stop_rx() local
629 if (ZS_IS_CONS(up)) in ip22zilog_stop_rx()
635 up->curregs[R1] &= ~RxINT_MASK; in ip22zilog_stop_rx()
636 ip22zilog_maybe_update_regs(up, channel); in ip22zilog_stop_rx()
642 struct uart_ip22zilog_port *up = in ip22zilog_enable_ms() local
647 new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); in ip22zilog_enable_ms()
648 if (new_reg != up->curregs[R15]) { in ip22zilog_enable_ms()
649 up->curregs[R15] = new_reg; in ip22zilog_enable_ms()
652 write_zsreg(channel, R15, up->curregs[R15]); in ip22zilog_enable_ms()
659 struct uart_ip22zilog_port *up = in ip22zilog_break_ctl() local
674 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; in ip22zilog_break_ctl()
675 if (new_reg != up->curregs[R5]) { in ip22zilog_break_ctl()
676 up->curregs[R5] = new_reg; in ip22zilog_break_ctl()
679 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_break_ctl()
685 static void __ip22zilog_reset(struct uart_ip22zilog_port *up) in __ip22zilog_reset() argument
690 if (up->flags & IP22ZILOG_FLAG_RESET_DONE) in __ip22zilog_reset()
694 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_reset()
702 if (!ZS_IS_CHANNEL_A(up)) { in __ip22zilog_reset()
703 up++; in __ip22zilog_reset()
704 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_reset()
710 up->flags |= IP22ZILOG_FLAG_RESET_DONE; in __ip22zilog_reset()
711 up->next->flags |= IP22ZILOG_FLAG_RESET_DONE; in __ip22zilog_reset()
714 static void __ip22zilog_startup(struct uart_ip22zilog_port *up) in __ip22zilog_startup() argument
718 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_startup()
720 __ip22zilog_reset(up); in __ip22zilog_startup()
722 __load_zsregs(channel, up->curregs); in __ip22zilog_startup()
724 write_zsreg(channel, R9, up->curregs[R9]); in __ip22zilog_startup()
725 up->prev_status = readb(&channel->control); in __ip22zilog_startup()
728 up->curregs[R3] |= RxENAB; in __ip22zilog_startup()
729 up->curregs[R5] |= TxENAB; in __ip22zilog_startup()
731 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __ip22zilog_startup()
732 ip22zilog_maybe_update_regs(up, channel); in __ip22zilog_startup()
737 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_startup() local
740 if (ZS_IS_CONS(up)) in ip22zilog_startup()
744 __ip22zilog_startup(up); in ip22zilog_startup()
776 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_shutdown() local
780 if (ZS_IS_CONS(up)) in ip22zilog_shutdown()
788 up->curregs[R3] &= ~RxENAB; in ip22zilog_shutdown()
789 up->curregs[R5] &= ~TxENAB; in ip22zilog_shutdown()
792 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in ip22zilog_shutdown()
793 up->curregs[R5] &= ~SND_BRK; in ip22zilog_shutdown()
794 ip22zilog_maybe_update_regs(up, channel); in ip22zilog_shutdown()
803 ip22zilog_convert_to_zs(struct uart_ip22zilog_port *up, unsigned int cflag, in ip22zilog_convert_to_zs() argument
807 up->curregs[R10] = NRZ; in ip22zilog_convert_to_zs()
808 up->curregs[R11] = TCBR | RCBR; in ip22zilog_convert_to_zs()
811 up->curregs[R4] &= ~XCLK_MASK; in ip22zilog_convert_to_zs()
812 up->curregs[R4] |= X16CLK; in ip22zilog_convert_to_zs()
813 up->curregs[R12] = brg & 0xff; in ip22zilog_convert_to_zs()
814 up->curregs[R13] = (brg >> 8) & 0xff; in ip22zilog_convert_to_zs()
815 up->curregs[R14] = BRENAB; in ip22zilog_convert_to_zs()
818 up->curregs[3] &= ~RxN_MASK; in ip22zilog_convert_to_zs()
819 up->curregs[5] &= ~TxN_MASK; in ip22zilog_convert_to_zs()
822 up->curregs[3] |= Rx5; in ip22zilog_convert_to_zs()
823 up->curregs[5] |= Tx5; in ip22zilog_convert_to_zs()
824 up->parity_mask = 0x1f; in ip22zilog_convert_to_zs()
827 up->curregs[3] |= Rx6; in ip22zilog_convert_to_zs()
828 up->curregs[5] |= Tx6; in ip22zilog_convert_to_zs()
829 up->parity_mask = 0x3f; in ip22zilog_convert_to_zs()
832 up->curregs[3] |= Rx7; in ip22zilog_convert_to_zs()
833 up->curregs[5] |= Tx7; in ip22zilog_convert_to_zs()
834 up->parity_mask = 0x7f; in ip22zilog_convert_to_zs()
838 up->curregs[3] |= Rx8; in ip22zilog_convert_to_zs()
839 up->curregs[5] |= Tx8; in ip22zilog_convert_to_zs()
840 up->parity_mask = 0xff; in ip22zilog_convert_to_zs()
843 up->curregs[4] &= ~0x0c; in ip22zilog_convert_to_zs()
845 up->curregs[4] |= SB2; in ip22zilog_convert_to_zs()
847 up->curregs[4] |= SB1; in ip22zilog_convert_to_zs()
849 up->curregs[4] |= PAR_ENAB; in ip22zilog_convert_to_zs()
851 up->curregs[4] &= ~PAR_ENAB; in ip22zilog_convert_to_zs()
853 up->curregs[4] |= PAR_EVEN; in ip22zilog_convert_to_zs()
855 up->curregs[4] &= ~PAR_EVEN; in ip22zilog_convert_to_zs()
857 up->port.read_status_mask = Rx_OVR; in ip22zilog_convert_to_zs()
859 up->port.read_status_mask |= CRC_ERR | PAR_ERR; in ip22zilog_convert_to_zs()
861 up->port.read_status_mask |= BRK_ABRT; in ip22zilog_convert_to_zs()
863 up->port.ignore_status_mask = 0; in ip22zilog_convert_to_zs()
865 up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; in ip22zilog_convert_to_zs()
867 up->port.ignore_status_mask |= BRK_ABRT; in ip22zilog_convert_to_zs()
869 up->port.ignore_status_mask |= Rx_OVR; in ip22zilog_convert_to_zs()
873 up->port.ignore_status_mask = 0xff; in ip22zilog_convert_to_zs()
881 struct uart_ip22zilog_port *up = in ip22zilog_set_termios() local
888 spin_lock_irqsave(&up->port.lock, flags); in ip22zilog_set_termios()
892 ip22zilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); in ip22zilog_set_termios()
894 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in ip22zilog_set_termios()
895 up->flags |= IP22ZILOG_FLAG_MODEM_STATUS; in ip22zilog_set_termios()
897 up->flags &= ~IP22ZILOG_FLAG_MODEM_STATUS; in ip22zilog_set_termios()
899 ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); in ip22zilog_set_termios()
902 spin_unlock_irqrestore(&up->port.lock, flags); in ip22zilog_set_termios()
1021 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; in ip22zilog_console_write() local
1024 spin_lock_irqsave(&up->port.lock, flags); in ip22zilog_console_write()
1025 uart_console_write(&up->port, s, count, ip22zilog_put_char); in ip22zilog_console_write()
1027 spin_unlock_irqrestore(&up->port.lock, flags); in ip22zilog_console_write()
1032 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; in ip22zilog_console_setup() local
1038 up->flags |= IP22ZILOG_FLAG_IS_CONS; in ip22zilog_console_setup()
1042 spin_lock_irqsave(&up->port.lock, flags); in ip22zilog_console_setup()
1044 up->curregs[R15] |= BRKIE; in ip22zilog_console_setup()
1046 __ip22zilog_startup(up); in ip22zilog_console_setup()
1048 spin_unlock_irqrestore(&up->port.lock, flags); in ip22zilog_console_setup()
1052 return uart_set_options(&up->port, con, baud, parity, bits, flow); in ip22zilog_console_setup()
1082 struct uart_ip22zilog_port *up; in ip22zilog_prepare() local
1093 up = &ip22zilog_port_table[0]; in ip22zilog_prepare()
1095 up[channel].next = &up[channel - 1]; in ip22zilog_prepare()
1096 up[channel].next = NULL; in ip22zilog_prepare()
1102 up[(chip * 2) + 0].port.membase = (char *) &rp->channelB; in ip22zilog_prepare()
1103 up[(chip * 2) + 1].port.membase = (char *) &rp->channelA; in ip22zilog_prepare()
1106 up[(chip * 2) + 0].port.mapbase = in ip22zilog_prepare()
1108 up[(chip * 2) + 1].port.mapbase = in ip22zilog_prepare()
1113 up[(chip * 2) + 0].port.iotype = UPIO_MEM; in ip22zilog_prepare()
1114 up[(chip * 2) + 0].port.irq = zilog_irq; in ip22zilog_prepare()
1115 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()
1116 up[(chip * 2) + 0].port.fifosize = 1; in ip22zilog_prepare()
1117 up[(chip * 2) + 0].port.ops = &ip22zilog_pops; in ip22zilog_prepare()
1118 up[(chip * 2) + 0].port.type = PORT_IP22ZILOG; in ip22zilog_prepare()
1119 up[(chip * 2) + 0].port.flags = 0; in ip22zilog_prepare()
1120 up[(chip * 2) + 0].port.line = (chip * 2) + 0; in ip22zilog_prepare()
1121 up[(chip * 2) + 0].flags = 0; in ip22zilog_prepare()
1124 up[(chip * 2) + 1].port.iotype = UPIO_MEM; in ip22zilog_prepare()
1125 up[(chip * 2) + 1].port.irq = zilog_irq; in ip22zilog_prepare()
1126 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()
1127 up[(chip * 2) + 1].port.fifosize = 1; in ip22zilog_prepare()
1128 up[(chip * 2) + 1].port.ops = &ip22zilog_pops; in ip22zilog_prepare()
1129 up[(chip * 2) + 1].port.type = PORT_IP22ZILOG; in ip22zilog_prepare()
1130 up[(chip * 2) + 1].port.line = (chip * 2) + 1; in ip22zilog_prepare()
1131 up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A; in ip22zilog_prepare()
1135 struct uart_ip22zilog_port *up = &ip22zilog_port_table[channel]; in ip22zilog_prepare() local
1139 up->parity_mask = 0xff; in ip22zilog_prepare()
1140 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in ip22zilog_prepare()
1141 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in ip22zilog_prepare()
1142 up->curregs[R3] = RxENAB | Rx8; in ip22zilog_prepare()
1143 up->curregs[R5] = TxENAB | Tx8; in ip22zilog_prepare()
1144 up->curregs[R9] = NV | MIE; in ip22zilog_prepare()
1145 up->curregs[R10] = NRZ; in ip22zilog_prepare()
1146 up->curregs[R11] = TCBR | RCBR; in ip22zilog_prepare()
1148 up->curregs[R12] = (brg & 0xff); in ip22zilog_prepare()
1149 up->curregs[R13] = (brg >> 8) & 0xff; in ip22zilog_prepare()
1150 up->curregs[R14] = BRENAB; in ip22zilog_prepare()
1172 struct uart_ip22zilog_port *up = &ip22zilog_port_table[i]; in ip22zilog_ports_init() local
1174 uart_add_one_port(&ip22zilog_reg, &up->port); in ip22zilog_ports_init()
1193 struct uart_ip22zilog_port *up; in ip22zilog_exit() local
1196 up = &ip22zilog_port_table[i]; in ip22zilog_exit()
1198 uart_remove_one_port(&ip22zilog_reg, &up->port); in ip22zilog_exit()
1202 up = &ip22zilog_port_table[0]; in ip22zilog_exit()
1204 if (up[(i * 2) + 0].port.mapbase) { in ip22zilog_exit()
1205 iounmap((void*)up[(i * 2) + 0].port.mapbase); in ip22zilog_exit()
1206 up[(i * 2) + 0].port.mapbase = 0; in ip22zilog_exit()
1208 if (up[(i * 2) + 1].port.mapbase) { in ip22zilog_exit()
1209 iounmap((void*)up[(i * 2) + 1].port.mapbase); in ip22zilog_exit()
1210 up[(i * 2) + 1].port.mapbase = 0; in ip22zilog_exit()