125 #define	ALL_WRITE	0xFFFFFFFFU  macro
639 	p_setw(perm, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE, (u16)ALL_WRITE);  in init_pci_cap_basic_perm()
645 	p_setb(perm, PCI_CACHE_LINE_SIZE, NO_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
646 	p_setb(perm, PCI_LATENCY_TIMER, NO_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
647 	p_setb(perm, PCI_BIST, NO_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
650 	p_setd(perm, PCI_BASE_ADDRESS_0, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
651 	p_setd(perm, PCI_BASE_ADDRESS_1, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
652 	p_setd(perm, PCI_BASE_ADDRESS_2, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
653 	p_setd(perm, PCI_BASE_ADDRESS_3, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
654 	p_setd(perm, PCI_BASE_ADDRESS_4, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
655 	p_setd(perm, PCI_BASE_ADDRESS_5, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
656 	p_setd(perm, PCI_ROM_ADDRESS, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
662 	p_setb(perm, PCI_INTERRUPT_LINE, (u8)ALL_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
787 	p_setw(perm, PCI_VPD_ADDR, (u16)ALL_VIRT, (u16)ALL_WRITE);  in init_pci_cap_vpd_perm()
788 	p_setd(perm, PCI_VPD_DATA, ALL_VIRT, ALL_WRITE);  in init_pci_cap_vpd_perm()
802 	p_setw(perm, PCI_X_CMD, NO_VIRT, (u16)ALL_WRITE);  in init_pci_cap_pcix_perm()
803 	p_setd(perm, PCI_X_ECC_CSR, NO_VIRT, ALL_WRITE);  in init_pci_cap_pcix_perm()
997 	p_setb(perm, PCI_PWR_DATA, NO_VIRT, (u8)ALL_WRITE);  in init_pci_ext_cap_pwr_perm()
1141 	p_setb(perm, PCI_MSI_FLAGS, (u8)ALL_VIRT, (u8)ALL_WRITE);  in init_pci_cap_msi_perm()
1142 	p_setd(perm, PCI_MSI_ADDRESS_LO, ALL_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1144 		p_setd(perm, PCI_MSI_ADDRESS_HI, ALL_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1145 		p_setw(perm, PCI_MSI_DATA_64, (u16)ALL_VIRT, (u16)ALL_WRITE);  in init_pci_cap_msi_perm()
1147 			p_setd(perm, PCI_MSI_MASK_64, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1148 			p_setd(perm, PCI_MSI_PENDING_64, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1151 		p_setw(perm, PCI_MSI_DATA_32, (u16)ALL_VIRT, (u16)ALL_WRITE);  in init_pci_cap_msi_perm()
1153 			p_setd(perm, PCI_MSI_MASK_32, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1154 			p_setd(perm, PCI_MSI_PENDING_32, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()