460 static inline u8 igetbyte(struct intel8x0 *chip, u32 offset)  in igetbyte()  function
536       		if (!(igetbyte(chip, ICHREG(ACC_SEMA)) & ICH_CAS))  in snd_intel8x0_codec_semaphore()
546 			igetbyte(chip, ICHREG(ACC_SEMA)), igetdword(chip, ICHREG(GLOB_STA)));  in snd_intel8x0_codec_semaphore()
618 		int val = igetbyte(chip, ICHREG(ALI_CSPSR));  in snd_intel8x0_ali_codec_ready()
756 	status = igetbyte(chip, port + ichdev->roff_sr);  in snd_intel8x0_update()
757 	civ = igetbyte(chip, port + ICH_REG_OFF_CIV);  in snd_intel8x0_update()
872 		while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;  in snd_intel8x0_pcm_trigger()
916 		while (igetbyte(chip, port + ICH_REG_OFF_CR))  in snd_intel8x0_ali_trigger()
924 			 igetbyte(chip, port + ICH_REG_OFF_SR) | 0x1e);  in snd_intel8x0_ali_trigger()
1072 		civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV);  in snd_intel8x0_pcm_pointer()
1079 		if (civ != igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV))  in snd_intel8x0_pcm_pointer()
2251 					igetbyte(chip, ICHREG(SDM)) & ICH_LDI_MASK;  in snd_intel8x0_mixer()
2325 		u8 tmp = igetbyte(chip, ICHREG(SDM));  in snd_intel8x0_mixer()
2593         		if ((igetbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset) & ICH_RESETREGS) == 0)  in snd_intel8x0_chip_init()
2672 		chip->sdm_saved = igetbyte(chip, ICHREG(SDM));  in intel8x0_suspend()
2801 		civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV);  in intel8x0_measure_ac97_clock()
2807 		if (civ == igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV) &&  in intel8x0_measure_ac97_clock()
2824 		while (igetbyte(chip, port + ICH_REG_OFF_CR))  in intel8x0_measure_ac97_clock()
2828 		while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH))  in intel8x0_measure_ac97_clock()