1config PPC64 2 bool "64-bit kernel" 3 default n 4 select ZLIB_DEFLATE 5 help 6 This option selects whether a 32-bit or a 64-bit kernel 7 will be built. 8 9menu "Processor support" 10choice 11 prompt "Processor Type" 12 depends on PPC32 13 help 14 There are five families of 32 bit PowerPC chips supported. 15 The most common ones are the desktop and server CPUs (601, 603, 16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their 17 embedded 512x/52xx/82xx/83xx/86xx counterparts. 18 The other embedded parts, namely 4xx, 8xx, e200 (55xx) and e500 19 (85xx) each form a family of their own that is not compatible 20 with the others. 21 22 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. 23 24config PPC_BOOK3S_32 25 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" 26 select PPC_FPU 27 28config PPC_85xx 29 bool "Freescale 85xx" 30 select E500 31 32config PPC_8xx 33 bool "Freescale 8xx" 34 select FSL_SOC 35 select 8xx 36 select PPC_LIB_RHEAP 37 38config 40x 39 bool "AMCC 40x" 40 select PPC_DCR_NATIVE 41 select PPC_UDBG_16550 42 select 4xx_SOC 43 select PPC_PCI_CHOICE 44 45config 44x 46 bool "AMCC 44x, 46x or 47x" 47 select PPC_DCR_NATIVE 48 select PPC_UDBG_16550 49 select 4xx_SOC 50 select PPC_PCI_CHOICE 51 select PHYS_64BIT 52 53config E200 54 bool "Freescale e200" 55 56endchoice 57 58choice 59 prompt "Processor Type" 60 depends on PPC64 61 help 62 There are two families of 64 bit PowerPC chips supported. 63 The most common ones are the desktop and server CPUs 64 (POWER4, POWER5, 970, POWER5+, POWER6, POWER7, POWER8 ...) 65 66 The other are the "embedded" processors compliant with the 67 "Book 3E" variant of the architecture 68 69config PPC_BOOK3S_64 70 bool "Server processors" 71 select PPC_FPU 72 select PPC_HAVE_PMU_SUPPORT 73 select SYS_SUPPORTS_HUGETLBFS 74 select HAVE_ARCH_TRANSPARENT_HUGEPAGE 75 select ARCH_SUPPORTS_NUMA_BALANCING 76 select IRQ_WORK 77 select HAVE_KERNEL_XZ 78 79config PPC_BOOK3E_64 80 bool "Embedded processors" 81 select PPC_FPU # Make it a choice ? 82 select PPC_SMP_MUXED_IPI 83 select PPC_DOORBELL 84 85endchoice 86 87choice 88 prompt "CPU selection" 89 depends on PPC64 90 default POWER8_CPU if CPU_LITTLE_ENDIAN 91 default GENERIC_CPU 92 help 93 This will create a kernel which is optimised for a particular CPU. 94 The resulting kernel may not run on other CPUs, so use this with care. 95 96 If unsure, select Generic. 97 98config GENERIC_CPU 99 bool "Generic" 100 depends on !CPU_LITTLE_ENDIAN 101 102config CELL_CPU 103 bool "Cell Broadband Engine" 104 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN 105 106config POWER4_CPU 107 bool "POWER4" 108 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN 109 110config POWER5_CPU 111 bool "POWER5" 112 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN 113 114config POWER6_CPU 115 bool "POWER6" 116 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN 117 118config POWER7_CPU 119 bool "POWER7" 120 depends on PPC_BOOK3S_64 121 select ARCH_HAS_FAST_MULTIPLIER 122 123config POWER8_CPU 124 bool "POWER8" 125 depends on PPC_BOOK3S_64 126 select ARCH_HAS_FAST_MULTIPLIER 127 128config E5500_CPU 129 bool "Freescale e5500" 130 depends on E500 131 132config E6500_CPU 133 bool "Freescale e6500" 134 depends on E500 135 136endchoice 137 138config PPC_BOOK3S 139 def_bool y 140 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 141 142config PPC_BOOK3E 143 def_bool y 144 depends on PPC_BOOK3E_64 145 146config 6xx 147 def_bool y 148 depends on PPC32 && PPC_BOOK3S 149 select PPC_HAVE_PMU_SUPPORT 150 151# this is temp to handle compat with arch=ppc 152config 8xx 153 bool 154 155config E500 156 select FSL_EMB_PERFMON 157 select PPC_FSL_BOOK3E 158 bool 159 160config PPC_E500MC 161 bool "e500mc Support" 162 select PPC_FPU 163 select COMMON_CLK 164 depends on E500 165 help 166 This must be enabled for running on e500mc (and derivatives 167 such as e5500/e6500), and must be disabled for running on 168 e500v1 or e500v2. 169 170config PPC_FPU 171 bool 172 default y if PPC64 173 174config FSL_EMB_PERFMON 175 bool "Freescale Embedded Perfmon" 176 depends on E500 || PPC_83xx 177 help 178 This is the Performance Monitor support found on the e500 core 179 and some e300 cores (c3 and c4). Select this only if your 180 core supports the Embedded Performance Monitor APU 181 182config FSL_EMB_PERF_EVENT 183 bool 184 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS 185 default y 186 187config FSL_EMB_PERF_EVENT_E500 188 bool 189 depends on FSL_EMB_PERF_EVENT && E500 190 default y 191 192config 4xx 193 bool 194 depends on 40x || 44x 195 default y 196 197config BOOKE 198 bool 199 depends on E200 || E500 || 44x || PPC_BOOK3E 200 default y 201 202config FSL_BOOKE 203 bool 204 depends on (E200 || E500) && PPC32 205 default y 206 207# this is for common code between PPC32 & PPC64 FSL BOOKE 208config PPC_FSL_BOOK3E 209 bool 210 select FSL_EMB_PERFMON 211 select PPC_SMP_MUXED_IPI 212 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64 213 select PPC_DOORBELL 214 default y if FSL_BOOKE 215 216config PTE_64BIT 217 bool 218 depends on 44x || E500 || PPC_86xx 219 default y if PHYS_64BIT 220 221config PHYS_64BIT 222 bool 'Large physical address support' if E500 || PPC_86xx 223 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx 224 ---help--- 225 This option enables kernel support for larger than 32-bit physical 226 addresses. This feature may not be available on all cores. 227 228 If you have more than 3.5GB of RAM or so, you also need to enable 229 SWIOTLB under Kernel Options for this to work. The actual number 230 is platform-dependent. 231 232 If in doubt, say N here. 233 234config ALTIVEC 235 bool "AltiVec Support" 236 depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64) 237 ---help--- 238 This option enables kernel support for the Altivec extensions to the 239 PowerPC processor. The kernel currently supports saving and restoring 240 altivec registers, and turning on the 'altivec enable' bit so user 241 processes can execute altivec instructions. 242 243 This option is only usefully if you have a processor that supports 244 altivec (G4, otherwise known as 74xx series), but does not have 245 any affect on a non-altivec cpu (it does, however add code to the 246 kernel). 247 248 If in doubt, say Y here. 249 250config VSX 251 bool "VSX Support" 252 depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU 253 ---help--- 254 255 This option enables kernel support for the Vector Scaler extensions 256 to the PowerPC processor. The kernel currently supports saving and 257 restoring VSX registers, and turning on the 'VSX enable' bit so user 258 processes can execute VSX instructions. 259 260 This option is only useful if you have a processor that supports 261 VSX (P7 and above), but does not have any affect on a non-VSX 262 CPUs (it does, however add code to the kernel). 263 264 If in doubt, say Y here. 265 266config PPC_ICSWX 267 bool "Support for PowerPC icswx coprocessor instruction" 268 depends on PPC_BOOK3S_64 269 default n 270 ---help--- 271 272 This option enables kernel support for the PowerPC Initiate 273 Coprocessor Store Word (icswx) coprocessor instruction on POWER7 274 or newer processors. 275 276 This option is only useful if you have a processor that supports 277 the icswx coprocessor instruction. It does not have any effect 278 on processors without the icswx coprocessor instruction. 279 280 This option slightly increases kernel memory usage. 281 282 If in doubt, say N here. 283 284config PPC_ICSWX_PID 285 bool "icswx requires direct PID management" 286 depends on PPC_ICSWX 287 default y 288 ---help--- 289 The PID register in server is used explicitly for ICSWX. In 290 embedded systems PID management is done by the system. 291 292config PPC_ICSWX_USE_SIGILL 293 bool "Should a bad CT cause a SIGILL?" 294 depends on PPC_ICSWX 295 default n 296 ---help--- 297 Should a bad CT used for "non-record form ICSWX" cause an 298 illegal instruction signal or should it be silent as 299 architected. 300 301 If in doubt, say N here. 302 303config SPE_POSSIBLE 304 def_bool y 305 depends on E200 || (E500 && !PPC_E500MC) 306 307config SPE 308 bool "SPE Support" 309 depends on SPE_POSSIBLE 310 default y 311 ---help--- 312 This option enables kernel support for the Signal Processing 313 Extensions (SPE) to the PowerPC processor. The kernel currently 314 supports saving and restoring SPE registers, and turning on the 315 'spe enable' bit so user processes can execute SPE instructions. 316 317 This option is only useful if you have a processor that supports 318 SPE (e500, otherwise known as 85xx series), but does not have any 319 effect on a non-spe cpu (it does, however add code to the kernel). 320 321 If in doubt, say Y here. 322 323config PPC_STD_MMU 324 def_bool y 325 depends on PPC_BOOK3S 326 327config PPC_STD_MMU_32 328 def_bool y 329 depends on PPC_STD_MMU && PPC32 330 331config PPC_STD_MMU_64 332 def_bool y 333 depends on PPC_STD_MMU && PPC64 334 335config PPC_RADIX_MMU 336 bool "Radix MMU Support" 337 depends on PPC_BOOK3S_64 338 default y 339 help 340 Enable support for the Power ISA 3.0 Radix style MMU. Currently this 341 is only implemented by IBM Power9 CPUs, if you don't have one of them 342 you can probably disable this. 343 344config PPC_MMU_NOHASH 345 def_bool y 346 depends on !PPC_STD_MMU 347 348config PPC_BOOK3E_MMU 349 def_bool y 350 depends on FSL_BOOKE || PPC_BOOK3E 351 352config PPC_MM_SLICES 353 bool 354 default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES) 355 default n 356 357config PPC_HAVE_PMU_SUPPORT 358 bool 359 360config PPC_PERF_CTRS 361 def_bool y 362 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT 363 help 364 This enables the powerpc-specific perf_event back-end. 365 366config SMP 367 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x 368 bool "Symmetric multi-processing support" 369 ---help--- 370 This enables support for systems with more than one CPU. If you have 371 a system with only one CPU, say N. If you have a system with more 372 than one CPU, say Y. Note that the kernel does not currently 373 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors 374 since they have inadequate hardware support for multiprocessor 375 operation. 376 377 If you say N here, the kernel will run on single and multiprocessor 378 machines, but will use only one CPU of a multiprocessor machine. If 379 you say Y here, the kernel will run on single-processor machines. 380 On a single-processor machine, the kernel will run faster if you say 381 N here. 382 383 If you don't know what to do here, say N. 384 385config NR_CPUS 386 int "Maximum number of CPUs (2-8192)" 387 range 2 8192 388 depends on SMP 389 default "32" if PPC64 390 default "4" 391 392config NOT_COHERENT_CACHE 393 bool 394 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON 395 default n if PPC_47x 396 default y 397 398config CHECK_CACHE_COHERENCY 399 bool 400 401config PPC_DOORBELL 402 bool 403 default n 404 405endmenu 406 407config VDSO32 408 def_bool y 409 depends on PPC32 || CPU_BIG_ENDIAN 410 help 411 This symbol controls whether we build the 32-bit VDSO. We obviously 412 want to do that if we're building a 32-bit kernel. If we're building 413 a 64-bit kernel then we only want a 32-bit VDSO if we're building for 414 big endian. That is because the only little endian configuration we 415 support is ppc64le which is 64-bit only. 416 417choice 418 prompt "Endianness selection" 419 default CPU_BIG_ENDIAN 420 help 421 This option selects whether a big endian or little endian kernel will 422 be built. 423 424config CPU_BIG_ENDIAN 425 bool "Build big endian kernel" 426 help 427 Build a big endian kernel. 428 429 If unsure, select this option. 430 431config CPU_LITTLE_ENDIAN 432 bool "Build little endian kernel" 433 depends on PPC_BOOK3S_64 434 select PPC64_BOOT_WRAPPER 435 help 436 Build a little endian kernel. 437 438 Note that if cross compiling a little endian kernel, 439 CROSS_COMPILE must point to a toolchain capable of targeting 440 little endian powerpc. 441 442endchoice 443 444config PPC64_BOOT_WRAPPER 445 def_bool n 446 depends on CPU_LITTLE_ENDIAN 447