1# arch/arm/plat-samsung/Kconfig 2# 3# Copyright 2009 Simtec Electronics 4# 5# Licensed under GPLv2 6 7config PLAT_SAMSUNG 8 bool 9 depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_EXYNOS || ARCH_S5PV210 10 default y 11 select GENERIC_IRQ_CHIP 12 select NO_IOPORT_MAP 13 help 14 Base platform code for all Samsung SoC based systems 15 16config SAMSUNG_PM 17 bool 18 depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX) 19 default y 20 help 21 Base platform power management code for samsung code 22 23if PLAT_SAMSUNG 24menu "Samsung Common options" 25 26# boot configurations 27 28comment "Boot options" 29 30config S3C_LOWLEVEL_UART_PORT 31 int "S3C UART to use for low-level messages" 32 depends on ARCH_S3C64XX 33 default 0 34 help 35 Choice of which UART port to use for the low-level messages, 36 such as the `Uncompressing...` at start time. The value of 37 this configuration should be between zero and two. The port 38 must have been initialised by the boot-loader before use. 39 40config SAMSUNG_ATAGS 41 def_bool n 42 depends on ATAGS 43 help 44 This option enables ATAGS based boot support code for 45 Samsung platforms, including static platform devices, legacy 46 clock, timer and interrupt initialization, etc. 47 48 Platforms that support only DT based boot need not to select 49 this option. 50 51if SAMSUNG_ATAGS 52 53config S3C_GPIO_SPACE 54 int "Space between gpio banks" 55 default 0 56 help 57 Add a number of spare GPIO entries between each bank for debugging 58 purposes. This allows any problems where an counter overflows from 59 one bank to another to be caught, at the expense of using a little 60 more memory. 61 62config S3C_GPIO_TRACK 63 bool 64 help 65 Internal configuration option to enable the s3c specific gpio 66 chip tracking if the platform requires it. 67 68# ADC driver 69 70config S3C_ADC 71 bool "ADC common driver support" 72 depends on !ARCH_MULTIPLATFORM 73 help 74 Core support for the ADC block found in the Samsung SoC systems 75 for drivers such as the touchscreen and hwmon to use to share 76 this resource. 77 78# device definitions to compile in 79 80config S3C_DEV_HSMMC 81 bool 82 help 83 Compile in platform device definitions for HSMMC code 84 85config S3C_DEV_HSMMC1 86 bool 87 help 88 Compile in platform device definitions for HSMMC channel 1 89 90config S3C_DEV_HSMMC2 91 bool 92 help 93 Compile in platform device definitions for HSMMC channel 2 94 95config S3C_DEV_HSMMC3 96 bool 97 help 98 Compile in platform device definitions for HSMMC channel 3 99 100config S3C_DEV_HWMON 101 bool 102 help 103 Compile in platform device definitions for HWMON 104 105config S3C_DEV_I2C1 106 bool 107 help 108 Compile in platform device definitions for I2C channel 1 109 110config S3C_DEV_I2C2 111 bool 112 help 113 Compile in platform device definitions for I2C channel 2 114 115config S3C_DEV_I2C3 116 bool 117 help 118 Compile in platform device definition for I2C controller 3 119 120config S3C_DEV_I2C4 121 bool 122 help 123 Compile in platform device definition for I2C controller 4 124 125config S3C_DEV_I2C5 126 bool 127 help 128 Compile in platform device definition for I2C controller 5 129 130config S3C_DEV_I2C6 131 bool 132 help 133 Compile in platform device definition for I2C controller 6 134 135config S3C_DEV_I2C7 136 bool 137 help 138 Compile in platform device definition for I2C controller 7 139 140config S3C_DEV_FB 141 bool 142 help 143 Compile in platform device definition for framebuffer 144 145config S3C_DEV_USB_HOST 146 bool 147 help 148 Compile in platform device definition for USB host. 149 150config S3C_DEV_USB_HSOTG 151 bool 152 help 153 Compile in platform device definition for USB high-speed OtG 154 155config S3C_DEV_WDT 156 bool 157 default y if ARCH_S3C24XX 158 help 159 Complie in platform device definition for Watchdog Timer 160 161config S3C_DEV_NAND 162 bool 163 help 164 Compile in platform device definition for NAND controller 165 166config S3C_DEV_ONENAND 167 bool 168 help 169 Compile in platform device definition for OneNAND controller 170 171config S3C_DEV_RTC 172 bool 173 help 174 Complie in platform device definition for RTC 175 176config SAMSUNG_DEV_ADC 177 bool 178 help 179 Compile in platform device definition for ADC controller 180 181config SAMSUNG_DEV_IDE 182 bool 183 help 184 Compile in platform device definitions for IDE 185 186config S3C64XX_DEV_SPI0 187 bool 188 help 189 Compile in platform device definitions for S3C64XX's type 190 SPI controller 0 191 192config S3C64XX_DEV_SPI1 193 bool 194 help 195 Compile in platform device definitions for S3C64XX's type 196 SPI controller 1 197 198config S3C64XX_DEV_SPI2 199 bool 200 help 201 Compile in platform device definitions for S3C64XX's type 202 SPI controller 2 203 204config SAMSUNG_DEV_TS 205 bool 206 help 207 Common in platform device definitions for touchscreen device 208 209config SAMSUNG_DEV_KEYPAD 210 bool 211 help 212 Compile in platform device definitions for keypad 213 214config SAMSUNG_DEV_PWM 215 bool 216 default y if ARCH_S3C24XX 217 help 218 Compile in platform device definition for PWM Timer 219 220config S3C24XX_PWM 221 bool "PWM device support" 222 select PWM 223 select PWM_SAMSUNG 224 help 225 Support for exporting the PWM timer blocks via the pwm device 226 system 227 228config GPIO_SAMSUNG 229 def_bool y 230 231config SAMSUNG_PM_GPIO 232 bool 233 default y if GPIO_SAMSUNG && PM 234 help 235 Include legacy GPIO power management code for platforms not using 236 pinctrl-samsung driver. 237endif 238 239comment "Power management" 240 241config SAMSUNG_PM_DEBUG 242 bool "Samsung PM Suspend debug" 243 depends on PM && DEBUG_KERNEL 244 depends on DEBUG_EXYNOS_UART || DEBUG_S3C24XX_UART || DEBUG_S3C2410_UART 245 help 246 Say Y here if you want verbose debugging from the PM Suspend and 247 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 248 for more information. 249 250config S3C_PM_DEBUG_LED_SMDK 251 bool "SMDK LED suspend/resume debugging" 252 depends on PM && (MACH_SMDK6410) 253 help 254 Say Y here to enable the use of the SMDK LEDs on the baseboard 255 for debugging of the state of the suspend and resume process. 256 257 Note, this currently only works for S3C64XX based SMDK boards. 258 259config SAMSUNG_PM_CHECK 260 bool "S3C2410 PM Suspend Memory CRC" 261 depends on PM 262 select CRC32 263 help 264 Enable the PM code's memory area checksum over sleep. This option 265 will generate CRCs of all blocks of memory, and store them before 266 going to sleep. The blocks are then checked on resume for any 267 errors. 268 269 Note, this can take several seconds depending on memory size 270 and CPU speed. 271 272 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 273 274config SAMSUNG_PM_CHECK_CHUNKSIZE 275 int "S3C2410 PM Suspend CRC Chunksize (KiB)" 276 depends on PM && SAMSUNG_PM_CHECK 277 default 64 278 help 279 Set the chunksize in Kilobytes of the CRC for checking memory 280 corruption over suspend and resume. A smaller value will mean that 281 the CRC data block will take more memory, but wil identify any 282 faults with better precision. 283 284 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 285 286config SAMSUNG_WAKEMASK 287 bool 288 depends on PM 289 help 290 Compile support for wakeup-mask controls found on the S3C6400 291 and above. This code allows a set of interrupt to wakeup-mask 292 mappings. See <plat/wakeup-mask.h> 293 294config SAMSUNG_WDT_RESET 295 bool 296 help 297 Compile support for system restart by triggering watchdog reset. 298 Used on SoCs that do not provide dedicated reset control. 299 300config DEBUG_S3C_UART 301 depends on PLAT_SAMSUNG 302 int 303 default "0" if DEBUG_S3C_UART0 304 default "1" if DEBUG_S3C_UART1 305 default "2" if DEBUG_S3C_UART2 306 default "3" if DEBUG_S3C_UART3 307 308endmenu 309endif 310