1 /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13 #ifndef _CORESIGHT_PRIV_H
14 #define _CORESIGHT_PRIV_H
15
16 #include <linux/bitops.h>
17 #include <linux/io.h>
18 #include <linux/coresight.h>
19 #include <linux/pm_runtime.h>
20
21 /*
22 * Coresight management registers (0xf00-0xfcc)
23 * 0xfa0 - 0xfa4: Management registers in PFTv1.0
24 * Trace registers in PFTv1.1
25 */
26 #define CORESIGHT_ITCTRL 0xf00
27 #define CORESIGHT_CLAIMSET 0xfa0
28 #define CORESIGHT_CLAIMCLR 0xfa4
29 #define CORESIGHT_LAR 0xfb0
30 #define CORESIGHT_LSR 0xfb4
31 #define CORESIGHT_AUTHSTATUS 0xfb8
32 #define CORESIGHT_DEVID 0xfc8
33 #define CORESIGHT_DEVTYPE 0xfcc
34
35 #define TIMEOUT_US 100
36 #define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb)
37
38 #define ETM_MODE_EXCL_KERN BIT(30)
39 #define ETM_MODE_EXCL_USER BIT(31)
40
41 typedef u32 (*coresight_read_fn)(const struct device *, u32 offset);
42 #define coresight_simple_func(type, func, name, offset) \
43 static ssize_t name##_show(struct device *_dev, \
44 struct device_attribute *attr, char *buf) \
45 { \
46 type *drvdata = dev_get_drvdata(_dev->parent); \
47 coresight_read_fn fn = func; \
48 u32 val; \
49 pm_runtime_get_sync(_dev->parent); \
50 if (fn) \
51 val = fn(_dev->parent, offset); \
52 else \
53 val = readl_relaxed(drvdata->base + offset); \
54 pm_runtime_put_sync(_dev->parent); \
55 return scnprintf(buf, PAGE_SIZE, "0x%x\n", val); \
56 } \
57 static DEVICE_ATTR_RO(name)
58
59 enum etm_addr_type {
60 ETM_ADDR_TYPE_NONE,
61 ETM_ADDR_TYPE_SINGLE,
62 ETM_ADDR_TYPE_RANGE,
63 ETM_ADDR_TYPE_START,
64 ETM_ADDR_TYPE_STOP,
65 };
66
67 enum cs_mode {
68 CS_MODE_DISABLED,
69 CS_MODE_SYSFS,
70 CS_MODE_PERF,
71 };
72
73 /**
74 * struct cs_buffer - keep track of a recording session' specifics
75 * @cur: index of the current buffer
76 * @nr_pages: max number of pages granted to us
77 * @offset: offset within the current buffer
78 * @data_size: how much we collected in this run
79 * @lost: other than zero if we had a HW buffer wrap around
80 * @snapshot: is this run in snapshot mode
81 * @data_pages: a handle the ring buffer
82 */
83 struct cs_buffers {
84 unsigned int cur;
85 unsigned int nr_pages;
86 unsigned long offset;
87 local_t data_size;
88 local_t lost;
89 bool snapshot;
90 void **data_pages;
91 };
92
CS_LOCK(void __iomem * addr)93 static inline void CS_LOCK(void __iomem *addr)
94 {
95 do {
96 /* Wait for things to settle */
97 mb();
98 writel_relaxed(0x0, addr + CORESIGHT_LAR);
99 } while (0);
100 }
101
CS_UNLOCK(void __iomem * addr)102 static inline void CS_UNLOCK(void __iomem *addr)
103 {
104 do {
105 writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR);
106 /* Make sure everyone has seen this */
107 mb();
108 } while (0);
109 }
110
111 void coresight_disable_path(struct list_head *path);
112 int coresight_enable_path(struct list_head *path, u32 mode);
113 struct coresight_device *coresight_get_sink(struct list_head *path);
114 struct coresight_device *coresight_get_enabled_sink(bool reset);
115 struct list_head *coresight_build_path(struct coresight_device *csdev,
116 struct coresight_device *sink);
117 void coresight_release_path(struct list_head *path);
118
119 #ifdef CONFIG_CORESIGHT_SOURCE_ETM3X
120 extern int etm_readl_cp14(u32 off, unsigned int *val);
121 extern int etm_writel_cp14(u32 off, u32 val);
122 #else
etm_readl_cp14(u32 off,unsigned int * val)123 static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; }
etm_writel_cp14(u32 off,u32 val)124 static inline int etm_writel_cp14(u32 off, u32 val) { return 0; }
125 #endif
126
127 #endif
128