1 /*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35 #ifndef __CXGB4_ULD_H
36 #define __CXGB4_ULD_H
37
38 #include <linux/cache.h>
39 #include <linux/spinlock.h>
40 #include <linux/skbuff.h>
41 #include <linux/inetdevice.h>
42 #include <linux/atomic.h>
43 #include "cxgb4.h"
44
45 #define MAX_ULD_QSETS 16
46
47 /* CPL message priority levels */
48 enum {
49 CPL_PRIORITY_DATA = 0, /* data messages */
50 CPL_PRIORITY_SETUP = 1, /* connection setup messages */
51 CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */
52 CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */
53 CPL_PRIORITY_ACK = 1, /* RX ACK messages */
54 CPL_PRIORITY_CONTROL = 1 /* control messages */
55 };
56
57 #define INIT_TP_WR(w, tid) do { \
58 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \
59 FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \
60 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \
61 FW_WR_FLOWID_V(tid)); \
62 (w)->wr.wr_lo = cpu_to_be64(0); \
63 } while (0)
64
65 #define INIT_TP_WR_CPL(w, cpl, tid) do { \
66 INIT_TP_WR(w, tid); \
67 OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \
68 } while (0)
69
70 #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \
71 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \
72 FW_WR_ATOMIC_V(atomic)); \
73 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \
74 FW_WR_FLOWID_V(tid)); \
75 (w)->wr.wr_lo = cpu_to_be64(0); \
76 } while (0)
77
78 /* Special asynchronous notification message */
79 #define CXGB4_MSG_AN ((void *)1)
80
81 struct serv_entry {
82 void *data;
83 };
84
85 union aopen_entry {
86 void *data;
87 union aopen_entry *next;
88 };
89
90 /*
91 * Holds the size, base address, free list start, etc of the TID, server TID,
92 * and active-open TID tables. The tables themselves are allocated dynamically.
93 */
94 struct tid_info {
95 void **tid_tab;
96 unsigned int ntids;
97
98 struct serv_entry *stid_tab;
99 unsigned long *stid_bmap;
100 unsigned int nstids;
101 unsigned int stid_base;
102 unsigned int hash_base;
103
104 union aopen_entry *atid_tab;
105 unsigned int natids;
106 unsigned int atid_base;
107
108 struct filter_entry *ftid_tab;
109 unsigned long *ftid_bmap;
110 unsigned int nftids;
111 unsigned int ftid_base;
112 unsigned int aftid_base;
113 unsigned int aftid_end;
114 /* Server filter region */
115 unsigned int sftid_base;
116 unsigned int nsftids;
117
118 spinlock_t atid_lock ____cacheline_aligned_in_smp;
119 union aopen_entry *afree;
120 unsigned int atids_in_use;
121
122 spinlock_t stid_lock;
123 unsigned int stids_in_use;
124 unsigned int sftids_in_use;
125
126 /* TIDs in the TCAM */
127 atomic_t tids_in_use;
128 /* TIDs in the HASH */
129 atomic_t hash_tids_in_use;
130 /* lock for setting/clearing filter bitmap */
131 spinlock_t ftid_lock;
132 };
133
lookup_tid(const struct tid_info * t,unsigned int tid)134 static inline void *lookup_tid(const struct tid_info *t, unsigned int tid)
135 {
136 return tid < t->ntids ? t->tid_tab[tid] : NULL;
137 }
138
lookup_atid(const struct tid_info * t,unsigned int atid)139 static inline void *lookup_atid(const struct tid_info *t, unsigned int atid)
140 {
141 return atid < t->natids ? t->atid_tab[atid].data : NULL;
142 }
143
lookup_stid(const struct tid_info * t,unsigned int stid)144 static inline void *lookup_stid(const struct tid_info *t, unsigned int stid)
145 {
146 /* Is it a server filter TID? */
147 if (t->nsftids && (stid >= t->sftid_base)) {
148 stid -= t->sftid_base;
149 stid += t->nstids;
150 } else {
151 stid -= t->stid_base;
152 }
153
154 return stid < (t->nstids + t->nsftids) ? t->stid_tab[stid].data : NULL;
155 }
156
cxgb4_insert_tid(struct tid_info * t,void * data,unsigned int tid)157 static inline void cxgb4_insert_tid(struct tid_info *t, void *data,
158 unsigned int tid)
159 {
160 t->tid_tab[tid] = data;
161 if (t->hash_base && (tid >= t->hash_base))
162 atomic_inc(&t->hash_tids_in_use);
163 else
164 atomic_inc(&t->tids_in_use);
165 }
166
167 int cxgb4_alloc_atid(struct tid_info *t, void *data);
168 int cxgb4_alloc_stid(struct tid_info *t, int family, void *data);
169 int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data);
170 void cxgb4_free_atid(struct tid_info *t, unsigned int atid);
171 void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family);
172 void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid);
173
174 struct in6_addr;
175
176 int cxgb4_create_server(const struct net_device *dev, unsigned int stid,
177 __be32 sip, __be16 sport, __be16 vlan,
178 unsigned int queue);
179 int cxgb4_create_server6(const struct net_device *dev, unsigned int stid,
180 const struct in6_addr *sip, __be16 sport,
181 unsigned int queue);
182 int cxgb4_remove_server(const struct net_device *dev, unsigned int stid,
183 unsigned int queue, bool ipv6);
184 int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid,
185 __be32 sip, __be16 sport, __be16 vlan,
186 unsigned int queue,
187 unsigned char port, unsigned char mask);
188 int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid,
189 unsigned int queue, bool ipv6);
190
191 /* Filter operation context to allow callers of cxgb4_set_filter() and
192 * cxgb4_del_filter() to wait for an asynchronous completion.
193 */
194 struct filter_ctx {
195 struct completion completion; /* completion rendezvous */
196 void *closure; /* caller's opaque information */
197 int result; /* result of operation */
198 u32 tid; /* to store tid */
199 };
200
201 struct ch_filter_specification;
202
203 int __cxgb4_set_filter(struct net_device *dev, int filter_id,
204 struct ch_filter_specification *fs,
205 struct filter_ctx *ctx);
206 int __cxgb4_del_filter(struct net_device *dev, int filter_id,
207 struct filter_ctx *ctx);
208 int cxgb4_set_filter(struct net_device *dev, int filter_id,
209 struct ch_filter_specification *fs);
210 int cxgb4_del_filter(struct net_device *dev, int filter_id);
211
set_wr_txq(struct sk_buff * skb,int prio,int queue)212 static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue)
213 {
214 skb_set_queue_mapping(skb, (queue << 1) | prio);
215 }
216
217 enum cxgb4_uld {
218 CXGB4_ULD_INIT,
219 CXGB4_ULD_RDMA,
220 CXGB4_ULD_ISCSI,
221 CXGB4_ULD_ISCSIT,
222 CXGB4_ULD_CRYPTO,
223 CXGB4_ULD_MAX
224 };
225
226 enum cxgb4_state {
227 CXGB4_STATE_UP,
228 CXGB4_STATE_START_RECOVERY,
229 CXGB4_STATE_DOWN,
230 CXGB4_STATE_DETACH
231 };
232
233 enum cxgb4_control {
234 CXGB4_CONTROL_DB_FULL,
235 CXGB4_CONTROL_DB_EMPTY,
236 CXGB4_CONTROL_DB_DROP,
237 };
238
239 struct pci_dev;
240 struct l2t_data;
241 struct net_device;
242 struct pkt_gl;
243 struct tp_tcp_stats;
244 struct t4_lro_mgr;
245
246 struct cxgb4_range {
247 unsigned int start;
248 unsigned int size;
249 };
250
251 struct cxgb4_virt_res { /* virtualized HW resources */
252 struct cxgb4_range ddp;
253 struct cxgb4_range iscsi;
254 struct cxgb4_range stag;
255 struct cxgb4_range rq;
256 struct cxgb4_range pbl;
257 struct cxgb4_range qp;
258 struct cxgb4_range cq;
259 struct cxgb4_range ocq;
260 };
261
262 #define OCQ_WIN_OFFSET(pdev, vres) \
263 (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size))
264
265 /*
266 * Block of information the LLD provides to ULDs attaching to a device.
267 */
268 struct cxgb4_lld_info {
269 struct pci_dev *pdev; /* associated PCI device */
270 struct l2t_data *l2t; /* L2 table */
271 struct tid_info *tids; /* TID table */
272 struct net_device **ports; /* device ports */
273 const struct cxgb4_virt_res *vr; /* assorted HW resources */
274 const unsigned short *mtus; /* MTU table */
275 const unsigned short *rxq_ids; /* the ULD's Rx queue ids */
276 const unsigned short *ciq_ids; /* the ULD's concentrator IQ ids */
277 unsigned short nrxq; /* # of Rx queues */
278 unsigned short ntxq; /* # of Tx queues */
279 unsigned short nciq; /* # of concentrator IQ */
280 unsigned char nchan:4; /* # of channels */
281 unsigned char nports:4; /* # of ports */
282 unsigned char wr_cred; /* WR 16-byte credits */
283 unsigned char adapter_type; /* type of adapter */
284 unsigned char fw_api_ver; /* FW API version */
285 unsigned int fw_vers; /* FW version */
286 unsigned int iscsi_iolen; /* iSCSI max I/O length */
287 unsigned int cclk_ps; /* Core clock period in psec */
288 unsigned short udb_density; /* # of user DB/page */
289 unsigned short ucq_density; /* # of user CQs/page */
290 unsigned short filt_mode; /* filter optional components */
291 unsigned short tx_modq[NCHAN]; /* maps each tx channel to a */
292 /* scheduler queue */
293 void __iomem *gts_reg; /* address of GTS register */
294 void __iomem *db_reg; /* address of kernel doorbell */
295 int dbfifo_int_thresh; /* doorbell fifo int threshold */
296 unsigned int sge_ingpadboundary; /* SGE ingress padding boundary */
297 unsigned int sge_egrstatuspagesize; /* SGE egress status page size */
298 unsigned int sge_pktshift; /* Padding between CPL and */
299 /* packet data */
300 unsigned int pf; /* Physical Function we're using */
301 bool enable_fw_ofld_conn; /* Enable connection through fw */
302 /* WR */
303 unsigned int max_ordird_qp; /* Max ORD/IRD depth per RDMA QP */
304 unsigned int max_ird_adapter; /* Max IRD memory per adapter */
305 bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */
306 unsigned int iscsi_tagmask; /* iscsi ddp tag mask */
307 unsigned int iscsi_pgsz_order; /* iscsi ddp page size orders */
308 unsigned int iscsi_llimit; /* chip's iscsi region llimit */
309 void **iscsi_ppm; /* iscsi page pod manager */
310 int nodeid; /* device numa node id */
311 bool fr_nsmr_tpte_wr_support; /* FW supports FR_NSMR_TPTE_WR */
312 };
313
314 struct cxgb4_uld_info {
315 const char *name;
316 void *handle;
317 unsigned int nrxq;
318 unsigned int rxq_size;
319 bool ciq;
320 bool lro;
321 void *(*add)(const struct cxgb4_lld_info *p);
322 int (*rx_handler)(void *handle, const __be64 *rsp,
323 const struct pkt_gl *gl);
324 int (*state_change)(void *handle, enum cxgb4_state new_state);
325 int (*control)(void *handle, enum cxgb4_control control, ...);
326 int (*lro_rx_handler)(void *handle, const __be64 *rsp,
327 const struct pkt_gl *gl,
328 struct t4_lro_mgr *lro_mgr,
329 struct napi_struct *napi);
330 void (*lro_flush)(struct t4_lro_mgr *);
331 };
332
333 int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
334 int cxgb4_unregister_uld(enum cxgb4_uld type);
335 int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb);
336 unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);
337 unsigned int cxgb4_port_chan(const struct net_device *dev);
338 unsigned int cxgb4_port_viid(const struct net_device *dev);
339 unsigned int cxgb4_tp_smt_idx(enum chip_type chip, unsigned int viid);
340 unsigned int cxgb4_port_idx(const struct net_device *dev);
341 unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu,
342 unsigned int *idx);
343 unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus,
344 unsigned short header_size,
345 unsigned short data_size_max,
346 unsigned short data_size_align,
347 unsigned int *mtu_idxp);
348 void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4,
349 struct tp_tcp_stats *v6);
350 void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
351 const unsigned int *pgsz_order);
352 struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl,
353 unsigned int skb_len, unsigned int pull_len);
354 int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size);
355 int cxgb4_flush_eq_cache(struct net_device *dev);
356 int cxgb4_read_tpte(struct net_device *dev, u32 stag, __be32 *tpte);
357 u64 cxgb4_read_sge_timestamp(struct net_device *dev);
358
359 enum cxgb4_bar2_qtype { CXGB4_BAR2_QTYPE_EGRESS, CXGB4_BAR2_QTYPE_INGRESS };
360 int cxgb4_bar2_sge_qregs(struct net_device *dev,
361 unsigned int qid,
362 enum cxgb4_bar2_qtype qtype,
363 int user,
364 u64 *pbar2_qoffset,
365 unsigned int *pbar2_qid);
366
367 #endif /* !__CXGB4_ULD_H */
368