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1 /*
2  * Copyright (C) 2009-2010 Advanced Micro Devices, Inc.
3  * Author: Joerg Roedel <jroedel@suse.de>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published
7  * by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
17  */
18 
19 #ifndef _ASM_X86_AMD_IOMMU_PROTO_H
20 #define _ASM_X86_AMD_IOMMU_PROTO_H
21 
22 #include "amd_iommu_types.h"
23 
24 extern int amd_iommu_init_dma_ops(void);
25 extern int amd_iommu_init_passthrough(void);
26 extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
27 extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
28 extern void amd_iommu_apply_erratum_63(u16 devid);
29 extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
30 extern int amd_iommu_init_devices(void);
31 extern void amd_iommu_uninit_devices(void);
32 extern void amd_iommu_init_notifier(void);
33 extern int amd_iommu_init_api(void);
34 
35 /* Needed for interrupt remapping */
36 extern int amd_iommu_prepare(void);
37 extern int amd_iommu_enable(void);
38 extern void amd_iommu_disable(void);
39 extern int amd_iommu_reenable(int);
40 extern int amd_iommu_enable_faulting(void);
41 extern int amd_iommu_guest_ir;
42 
43 /* IOMMUv2 specific functions */
44 struct iommu_domain;
45 
46 extern bool amd_iommu_v2_supported(void);
47 extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb);
48 extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb);
49 extern void amd_iommu_domain_direct_map(struct iommu_domain *dom);
50 extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids);
51 extern int amd_iommu_flush_page(struct iommu_domain *dom, int pasid,
52 				u64 address);
53 extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid);
54 extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,
55 				     unsigned long cr3);
56 extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid);
57 extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);
58 
59 /* IOMMU Performance Counter functions */
60 extern bool amd_iommu_pc_supported(void);
61 extern u8 amd_iommu_pc_get_max_banks(u16 devid);
62 extern u8 amd_iommu_pc_get_max_counters(u16 devid);
63 extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn,
64 				    u64 *value, bool is_write);
65 
66 #ifdef CONFIG_IRQ_REMAP
67 extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
68 #else
amd_iommu_create_irq_domain(struct amd_iommu * iommu)69 static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
70 {
71 	return 0;
72 }
73 #endif
74 
75 #define PPR_SUCCESS			0x0
76 #define PPR_INVALID			0x1
77 #define PPR_FAILURE			0xf
78 
79 extern int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid,
80 				  int status, int tag);
81 
is_rd890_iommu(struct pci_dev * pdev)82 static inline bool is_rd890_iommu(struct pci_dev *pdev)
83 {
84 	return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
85 	       (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
86 }
87 
iommu_feature(struct amd_iommu * iommu,u64 f)88 static inline bool iommu_feature(struct amd_iommu *iommu, u64 f)
89 {
90 	if (!(iommu->cap & (1 << IOMMU_CAP_EFR)))
91 		return false;
92 
93 	return !!(iommu->features & f);
94 }
95 
96 #endif /* _ASM_X86_AMD_IOMMU_PROTO_H  */
97