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1 /*
2  * File:         sound/soc/codec/ad73311.h
3  * Based on:
4  * Author:       Cliff Cai <cliff.cai@analog.com>
5  *
6  * Created:      Thur Sep 25, 2008
7  * Description:  definitions for AD73311 registers
8  *
9  *
10  * Modified:
11  *               Copyright 2006 Analog Devices Inc.
12  *
13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
14  *
15  * This program is free software; you can redistribute it and/or modify
16  * it under the terms of the GNU General Public License as published by
17  * the Free Software Foundation; either version 2 of the License, or
18  * (at your option) any later version.
19  *
20  * This program is distributed in the hope that it will be useful,
21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  * GNU General Public License for more details.
24  *
25  * You should have received a copy of the GNU General Public License
26  * along with this program; if not, see the file COPYING, or write
27  * to the Free Software Foundation, Inc.,
28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
29  */
30 
31 #ifndef __AD73311_H__
32 #define __AD73311_H__
33 
34 #define AD_CONTROL	0x8000
35 #define AD_DATA		0x0000
36 #define AD_READ		0x4000
37 #define AD_WRITE	0x0000
38 
39 /* Control register A */
40 #define CTRL_REG_A	(0 << 8)
41 
42 #define REGA_MODE_PRO	0x00
43 #define REGA_MODE_DATA	0x01
44 #define REGA_MODE_MIXED	0x03
45 #define REGA_DLB		0x04
46 #define REGA_SLB		0x08
47 #define REGA_DEVC(x)		((x & 0x7) << 4)
48 #define REGA_RESET		0x80
49 
50 /* Control register B */
51 #define CTRL_REG_B	(1 << 8)
52 
53 #define REGB_DIRATE(x)	(x & 0x3)
54 #define REGB_SCDIV(x)	((x & 0x3) << 2)
55 #define REGB_MCDIV(x)	((x & 0x7) << 4)
56 #define REGB_CEE		(1 << 7)
57 
58 /* Control register C */
59 #define CTRL_REG_C	(2 << 8)
60 
61 #define REGC_PUDEV		(1 << 0)
62 #define REGC_PUADC		(1 << 3)
63 #define REGC_PUDAC		(1 << 4)
64 #define REGC_PUREF		(1 << 5)
65 #define REGC_REFUSE		(1 << 6)
66 
67 /* Control register D */
68 #define CTRL_REG_D	(3 << 8)
69 
70 #define REGD_IGS(x)		(x & 0x7)
71 #define REGD_RMOD		(1 << 3)
72 #define REGD_OGS(x)		((x & 0x7) << 4)
73 #define REGD_MUTE		(1 << 7)
74 
75 /* Control register E */
76 #define CTRL_REG_E	(4 << 8)
77 
78 #define REGE_DA(x)		(x & 0x1f)
79 #define REGE_IBYP		(1 << 5)
80 
81 /* Control register F */
82 #define CTRL_REG_F	(5 << 8)
83 
84 #define REGF_SEEN		(1 << 5)
85 #define REGF_INV		(1 << 6)
86 #define REGF_ALB		(1 << 7)
87 
88 #endif
89