1 /*
2 * Adaptec AAC series RAID controller driver
3 * (c) Copyright 2001 Red Hat Inc.
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Module Name:
26 * src.c
27 *
28 * Abstract: Hardware Device Interface for PMC SRC based controllers
29 *
30 */
31
32 #include <linux/kernel.h>
33 #include <linux/init.h>
34 #include <linux/types.h>
35 #include <linux/pci.h>
36 #include <linux/spinlock.h>
37 #include <linux/slab.h>
38 #include <linux/blkdev.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/time.h>
42 #include <linux/interrupt.h>
43 #include <scsi/scsi_host.h>
44
45 #include "aacraid.h"
46
47 static int aac_src_get_sync_status(struct aac_dev *dev);
48
aac_src_intr_message(int irq,void * dev_id)49 static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
50 {
51 struct aac_msix_ctx *ctx;
52 struct aac_dev *dev;
53 unsigned long bellbits, bellbits_shifted;
54 int vector_no;
55 int isFastResponse, mode;
56 u32 index, handle;
57
58 ctx = (struct aac_msix_ctx *)dev_id;
59 dev = ctx->dev;
60 vector_no = ctx->vector_no;
61
62 if (dev->msi_enabled) {
63 mode = AAC_INT_MODE_MSI;
64 if (vector_no == 0) {
65 bellbits = src_readl(dev, MUnit.ODR_MSI);
66 if (bellbits & 0x40000)
67 mode |= AAC_INT_MODE_AIF;
68 if (bellbits & 0x1000)
69 mode |= AAC_INT_MODE_SYNC;
70 }
71 } else {
72 mode = AAC_INT_MODE_INTX;
73 bellbits = src_readl(dev, MUnit.ODR_R);
74 if (bellbits & PmDoorBellResponseSent) {
75 bellbits = PmDoorBellResponseSent;
76 src_writel(dev, MUnit.ODR_C, bellbits);
77 src_readl(dev, MUnit.ODR_C);
78 } else {
79 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
80 src_writel(dev, MUnit.ODR_C, bellbits);
81 src_readl(dev, MUnit.ODR_C);
82
83 if (bellbits_shifted & DoorBellAifPending)
84 mode |= AAC_INT_MODE_AIF;
85 else if (bellbits_shifted & OUTBOUNDDOORBELL_0)
86 mode |= AAC_INT_MODE_SYNC;
87 }
88 }
89
90 if (mode & AAC_INT_MODE_SYNC) {
91 unsigned long sflags;
92 struct list_head *entry;
93 int send_it = 0;
94 extern int aac_sync_mode;
95
96 if (!aac_sync_mode && !dev->msi_enabled) {
97 src_writel(dev, MUnit.ODR_C, bellbits);
98 src_readl(dev, MUnit.ODR_C);
99 }
100
101 if (dev->sync_fib) {
102 if (dev->sync_fib->callback)
103 dev->sync_fib->callback(dev->sync_fib->callback_data,
104 dev->sync_fib);
105 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
106 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
107 dev->management_fib_count--;
108 up(&dev->sync_fib->event_wait);
109 }
110 spin_unlock_irqrestore(&dev->sync_fib->event_lock,
111 sflags);
112 spin_lock_irqsave(&dev->sync_lock, sflags);
113 if (!list_empty(&dev->sync_fib_list)) {
114 entry = dev->sync_fib_list.next;
115 dev->sync_fib = list_entry(entry,
116 struct fib,
117 fiblink);
118 list_del(entry);
119 send_it = 1;
120 } else {
121 dev->sync_fib = NULL;
122 }
123 spin_unlock_irqrestore(&dev->sync_lock, sflags);
124 if (send_it) {
125 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
126 (u32)dev->sync_fib->hw_fib_pa,
127 0, 0, 0, 0, 0,
128 NULL, NULL, NULL, NULL, NULL);
129 }
130 }
131 if (!dev->msi_enabled)
132 mode = 0;
133
134 }
135
136 if (mode & AAC_INT_MODE_AIF) {
137 /* handle AIF */
138 if (dev->aif_thread && dev->fsa_dev)
139 aac_intr_normal(dev, 0, 2, 0, NULL);
140 if (dev->msi_enabled)
141 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT);
142 mode = 0;
143 }
144
145 if (mode) {
146 index = dev->host_rrq_idx[vector_no];
147
148 for (;;) {
149 isFastResponse = 0;
150 /* remove toggle bit (31) */
151 handle = (dev->host_rrq[index] & 0x7fffffff);
152 /* check fast response bit (30) */
153 if (handle & 0x40000000)
154 isFastResponse = 1;
155 handle &= 0x0000ffff;
156 if (handle == 0)
157 break;
158 if (dev->msi_enabled && dev->max_msix > 1)
159 atomic_dec(&dev->rrq_outstanding[vector_no]);
160 dev->host_rrq[index++] = 0;
161 aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL);
162 if (index == (vector_no + 1) * dev->vector_cap)
163 index = vector_no * dev->vector_cap;
164 dev->host_rrq_idx[vector_no] = index;
165 }
166 mode = 0;
167 }
168
169 return IRQ_HANDLED;
170 }
171
172 /**
173 * aac_src_disable_interrupt - Disable interrupts
174 * @dev: Adapter
175 */
176
aac_src_disable_interrupt(struct aac_dev * dev)177 static void aac_src_disable_interrupt(struct aac_dev *dev)
178 {
179 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
180 }
181
182 /**
183 * aac_src_enable_interrupt_message - Enable interrupts
184 * @dev: Adapter
185 */
186
aac_src_enable_interrupt_message(struct aac_dev * dev)187 static void aac_src_enable_interrupt_message(struct aac_dev *dev)
188 {
189 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT);
190 }
191
192 /**
193 * src_sync_cmd - send a command and wait
194 * @dev: Adapter
195 * @command: Command to execute
196 * @p1: first parameter
197 * @ret: adapter status
198 *
199 * This routine will send a synchronous command to the adapter and wait
200 * for its completion.
201 */
202
src_sync_cmd(struct aac_dev * dev,u32 command,u32 p1,u32 p2,u32 p3,u32 p4,u32 p5,u32 p6,u32 * status,u32 * r1,u32 * r2,u32 * r3,u32 * r4)203 static int src_sync_cmd(struct aac_dev *dev, u32 command,
204 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
205 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
206 {
207 unsigned long start;
208 unsigned long delay;
209 int ok;
210
211 /*
212 * Write the command into Mailbox 0
213 */
214 writel(command, &dev->IndexRegs->Mailbox[0]);
215 /*
216 * Write the parameters into Mailboxes 1 - 6
217 */
218 writel(p1, &dev->IndexRegs->Mailbox[1]);
219 writel(p2, &dev->IndexRegs->Mailbox[2]);
220 writel(p3, &dev->IndexRegs->Mailbox[3]);
221 writel(p4, &dev->IndexRegs->Mailbox[4]);
222
223 /*
224 * Clear the synch command doorbell to start on a clean slate.
225 */
226 if (!dev->msi_enabled)
227 src_writel(dev,
228 MUnit.ODR_C,
229 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
230
231 /*
232 * Disable doorbell interrupts
233 */
234 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
235
236 /*
237 * Force the completion of the mask register write before issuing
238 * the interrupt.
239 */
240 src_readl(dev, MUnit.OIMR);
241
242 /*
243 * Signal that there is a new synch command
244 */
245 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
246
247 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
248 ok = 0;
249 start = jiffies;
250
251 if (command == IOP_RESET_ALWAYS) {
252 /* Wait up to 10 sec */
253 delay = 10*HZ;
254 } else {
255 /* Wait up to 5 minutes */
256 delay = 300*HZ;
257 }
258 while (time_before(jiffies, start+delay)) {
259 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
260 /*
261 * Mon960 will set doorbell0 bit when it has completed the command.
262 */
263 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) {
264 /*
265 * Clear the doorbell.
266 */
267 if (dev->msi_enabled)
268 aac_src_access_devreg(dev,
269 AAC_CLEAR_SYNC_BIT);
270 else
271 src_writel(dev,
272 MUnit.ODR_C,
273 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
274 ok = 1;
275 break;
276 }
277 /*
278 * Yield the processor in case we are slow
279 */
280 msleep(1);
281 }
282 if (unlikely(ok != 1)) {
283 /*
284 * Restore interrupt mask even though we timed out
285 */
286 aac_adapter_enable_int(dev);
287 return -ETIMEDOUT;
288 }
289 /*
290 * Pull the synch status from Mailbox 0.
291 */
292 if (status)
293 *status = readl(&dev->IndexRegs->Mailbox[0]);
294 if (r1)
295 *r1 = readl(&dev->IndexRegs->Mailbox[1]);
296 if (r2)
297 *r2 = readl(&dev->IndexRegs->Mailbox[2]);
298 if (r3)
299 *r3 = readl(&dev->IndexRegs->Mailbox[3]);
300 if (r4)
301 *r4 = readl(&dev->IndexRegs->Mailbox[4]);
302 if (command == GET_COMM_PREFERRED_SETTINGS)
303 dev->max_msix =
304 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
305 /*
306 * Clear the synch command doorbell.
307 */
308 if (!dev->msi_enabled)
309 src_writel(dev,
310 MUnit.ODR_C,
311 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
312 }
313
314 /*
315 * Restore interrupt mask
316 */
317 aac_adapter_enable_int(dev);
318 return 0;
319 }
320
321 /**
322 * aac_src_interrupt_adapter - interrupt adapter
323 * @dev: Adapter
324 *
325 * Send an interrupt to the i960 and breakpoint it.
326 */
327
aac_src_interrupt_adapter(struct aac_dev * dev)328 static void aac_src_interrupt_adapter(struct aac_dev *dev)
329 {
330 src_sync_cmd(dev, BREAKPOINT_REQUEST,
331 0, 0, 0, 0, 0, 0,
332 NULL, NULL, NULL, NULL, NULL);
333 }
334
335 /**
336 * aac_src_notify_adapter - send an event to the adapter
337 * @dev: Adapter
338 * @event: Event to send
339 *
340 * Notify the i960 that something it probably cares about has
341 * happened.
342 */
343
aac_src_notify_adapter(struct aac_dev * dev,u32 event)344 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
345 {
346 switch (event) {
347
348 case AdapNormCmdQue:
349 src_writel(dev, MUnit.ODR_C,
350 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
351 break;
352 case HostNormRespNotFull:
353 src_writel(dev, MUnit.ODR_C,
354 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
355 break;
356 case AdapNormRespQue:
357 src_writel(dev, MUnit.ODR_C,
358 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
359 break;
360 case HostNormCmdNotFull:
361 src_writel(dev, MUnit.ODR_C,
362 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
363 break;
364 case FastIo:
365 src_writel(dev, MUnit.ODR_C,
366 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
367 break;
368 case AdapPrintfDone:
369 src_writel(dev, MUnit.ODR_C,
370 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
371 break;
372 default:
373 BUG();
374 break;
375 }
376 }
377
378 /**
379 * aac_src_start_adapter - activate adapter
380 * @dev: Adapter
381 *
382 * Start up processing on an i960 based AAC adapter
383 */
384
aac_src_start_adapter(struct aac_dev * dev)385 static void aac_src_start_adapter(struct aac_dev *dev)
386 {
387 struct aac_init *init;
388 int i;
389
390 /* reset host_rrq_idx first */
391 for (i = 0; i < dev->max_msix; i++) {
392 dev->host_rrq_idx[i] = i * dev->vector_cap;
393 atomic_set(&dev->rrq_outstanding[i], 0);
394 }
395 dev->fibs_pushed_no = 0;
396
397 init = dev->init;
398 init->HostElapsedSeconds = cpu_to_le32(get_seconds());
399
400 /* We can only use a 32 bit address here */
401 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
402 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
403 }
404
405 /**
406 * aac_src_check_health
407 * @dev: device to check if healthy
408 *
409 * Will attempt to determine if the specified adapter is alive and
410 * capable of handling requests, returning 0 if alive.
411 */
aac_src_check_health(struct aac_dev * dev)412 static int aac_src_check_health(struct aac_dev *dev)
413 {
414 u32 status = src_readl(dev, MUnit.OMR);
415
416 /*
417 * Check to see if the board panic'd.
418 */
419 if (unlikely(status & KERNEL_PANIC))
420 goto err_blink;
421
422 /*
423 * Check to see if the board failed any self tests.
424 */
425 if (unlikely(status & SELF_TEST_FAILED))
426 goto err_out;
427
428 /*
429 * Check to see if the board failed any self tests.
430 */
431 if (unlikely(status & MONITOR_PANIC))
432 goto err_out;
433
434 /*
435 * Wait for the adapter to be up and running.
436 */
437 if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
438 return -3;
439 /*
440 * Everything is OK
441 */
442 return 0;
443
444 err_out:
445 return -1;
446
447 err_blink:
448 return (status > 16) & 0xFF;
449 }
450
451 /**
452 * aac_src_deliver_message
453 * @fib: fib to issue
454 *
455 * Will send a fib, returning 0 if successful.
456 */
aac_src_deliver_message(struct fib * fib)457 static int aac_src_deliver_message(struct fib *fib)
458 {
459 struct aac_dev *dev = fib->dev;
460 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
461 u32 fibsize;
462 dma_addr_t address;
463 struct aac_fib_xporthdr *pFibX;
464 #if !defined(writeq)
465 unsigned long flags;
466 #endif
467
468 u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size);
469 u16 vector_no;
470
471 atomic_inc(&q->numpending);
472
473 if (dev->msi_enabled && fib->hw_fib_va->header.Command != AifRequest &&
474 dev->max_msix > 1) {
475 vector_no = fib->vector_no;
476 fib->hw_fib_va->header.Handle += (vector_no << 16);
477 } else {
478 vector_no = 0;
479 }
480
481 atomic_inc(&dev->rrq_outstanding[vector_no]);
482
483 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
484 /* Calculate the amount to the fibsize bits */
485 fibsize = (hdr_size + 127) / 128 - 1;
486 if (fibsize > (ALIGN32 - 1))
487 return -EMSGSIZE;
488 /* New FIB header, 32-bit */
489 address = fib->hw_fib_pa;
490 fib->hw_fib_va->header.StructType = FIB_MAGIC2;
491 fib->hw_fib_va->header.SenderFibAddress = (u32)address;
492 fib->hw_fib_va->header.u.TimeStamp = 0;
493 BUG_ON(upper_32_bits(address) != 0L);
494 address |= fibsize;
495 } else {
496 /* Calculate the amount to the fibsize bits */
497 fibsize = (sizeof(struct aac_fib_xporthdr) + hdr_size + 127) / 128 - 1;
498 if (fibsize > (ALIGN32 - 1))
499 return -EMSGSIZE;
500
501 /* Fill XPORT header */
502 pFibX = (void *)fib->hw_fib_va - sizeof(struct aac_fib_xporthdr);
503 pFibX->Handle = cpu_to_le32(fib->hw_fib_va->header.Handle);
504 pFibX->HostAddress = cpu_to_le64(fib->hw_fib_pa);
505 pFibX->Size = cpu_to_le32(hdr_size);
506
507 /*
508 * The xport header has been 32-byte aligned for us so that fibsize
509 * can be masked out of this address by hardware. -- BenC
510 */
511 address = fib->hw_fib_pa - sizeof(struct aac_fib_xporthdr);
512 if (address & (ALIGN32 - 1))
513 return -EINVAL;
514 address |= fibsize;
515 }
516 #if defined(writeq)
517 src_writeq(dev, MUnit.IQ_L, (u64)address);
518 #else
519 spin_lock_irqsave(&fib->dev->iq_lock, flags);
520 src_writel(dev, MUnit.IQ_H, upper_32_bits(address) & 0xffffffff);
521 src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
522 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
523 #endif
524 return 0;
525 }
526
527 /**
528 * aac_src_ioremap
529 * @size: mapping resize request
530 *
531 */
aac_src_ioremap(struct aac_dev * dev,u32 size)532 static int aac_src_ioremap(struct aac_dev *dev, u32 size)
533 {
534 if (!size) {
535 iounmap(dev->regs.src.bar1);
536 dev->regs.src.bar1 = NULL;
537 iounmap(dev->regs.src.bar0);
538 dev->base = dev->regs.src.bar0 = NULL;
539 return 0;
540 }
541 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
542 AAC_MIN_SRC_BAR1_SIZE);
543 dev->base = NULL;
544 if (dev->regs.src.bar1 == NULL)
545 return -1;
546 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
547 if (dev->base == NULL) {
548 iounmap(dev->regs.src.bar1);
549 dev->regs.src.bar1 = NULL;
550 return -1;
551 }
552 dev->IndexRegs = &((struct src_registers __iomem *)
553 dev->base)->u.tupelo.IndexRegs;
554 return 0;
555 }
556
557 /**
558 * aac_srcv_ioremap
559 * @size: mapping resize request
560 *
561 */
aac_srcv_ioremap(struct aac_dev * dev,u32 size)562 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
563 {
564 if (!size) {
565 iounmap(dev->regs.src.bar0);
566 dev->base = dev->regs.src.bar0 = NULL;
567 return 0;
568 }
569 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
570 if (dev->base == NULL)
571 return -1;
572 dev->IndexRegs = &((struct src_registers __iomem *)
573 dev->base)->u.denali.IndexRegs;
574 return 0;
575 }
576
aac_src_restart_adapter(struct aac_dev * dev,int bled)577 static int aac_src_restart_adapter(struct aac_dev *dev, int bled)
578 {
579 u32 var, reset_mask;
580
581 if (bled >= 0) {
582 if (bled)
583 printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
584 dev->name, dev->id, bled);
585 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
586 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
587 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL);
588 if ((bled || (var != 0x00000001)) &&
589 !dev->doorbell_mask)
590 return -EINVAL;
591 else if (dev->doorbell_mask) {
592 reset_mask = dev->doorbell_mask;
593 bled = 0;
594 var = 0x00000001;
595 }
596
597 if ((dev->pdev->device == PMC_DEVICE_S7 ||
598 dev->pdev->device == PMC_DEVICE_S8 ||
599 dev->pdev->device == PMC_DEVICE_S9) && dev->msi_enabled) {
600 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
601 dev->msi_enabled = 0;
602 msleep(5000); /* Delay 5 seconds */
603 }
604
605 if (!bled && (dev->supplement_adapter_info.SupportedOptions2 &
606 AAC_OPTION_DOORBELL_RESET)) {
607 src_writel(dev, MUnit.IDR, reset_mask);
608 ssleep(45);
609 } else {
610 src_writel(dev, MUnit.IDR, 0x100);
611 ssleep(45);
612 }
613 }
614
615 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
616 return -ENODEV;
617
618 if (startup_timeout < 300)
619 startup_timeout = 300;
620
621 return 0;
622 }
623
624 /**
625 * aac_src_select_comm - Select communications method
626 * @dev: Adapter
627 * @comm: communications method
628 */
aac_src_select_comm(struct aac_dev * dev,int comm)629 static int aac_src_select_comm(struct aac_dev *dev, int comm)
630 {
631 switch (comm) {
632 case AAC_COMM_MESSAGE:
633 dev->a_ops.adapter_intr = aac_src_intr_message;
634 dev->a_ops.adapter_deliver = aac_src_deliver_message;
635 break;
636 default:
637 return 1;
638 }
639 return 0;
640 }
641
642 /**
643 * aac_src_init - initialize an Cardinal Frey Bar card
644 * @dev: device to configure
645 *
646 */
647
aac_src_init(struct aac_dev * dev)648 int aac_src_init(struct aac_dev *dev)
649 {
650 unsigned long start;
651 unsigned long status;
652 int restart = 0;
653 int instance = dev->id;
654 const char *name = dev->name;
655
656 dev->a_ops.adapter_ioremap = aac_src_ioremap;
657 dev->a_ops.adapter_comm = aac_src_select_comm;
658
659 dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
660 if (aac_adapter_ioremap(dev, dev->base_size)) {
661 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
662 goto error_iounmap;
663 }
664
665 /* Failure to reset here is an option ... */
666 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
667 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
668 if ((aac_reset_devices || reset_devices) &&
669 !aac_src_restart_adapter(dev, 0))
670 ++restart;
671 /*
672 * Check to see if the board panic'd while booting.
673 */
674 status = src_readl(dev, MUnit.OMR);
675 if (status & KERNEL_PANIC) {
676 if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
677 goto error_iounmap;
678 ++restart;
679 }
680 /*
681 * Check to see if the board failed any self tests.
682 */
683 status = src_readl(dev, MUnit.OMR);
684 if (status & SELF_TEST_FAILED) {
685 printk(KERN_ERR "%s%d: adapter self-test failed.\n",
686 dev->name, instance);
687 goto error_iounmap;
688 }
689 /*
690 * Check to see if the monitor panic'd while booting.
691 */
692 if (status & MONITOR_PANIC) {
693 printk(KERN_ERR "%s%d: adapter monitor panic.\n",
694 dev->name, instance);
695 goto error_iounmap;
696 }
697 start = jiffies;
698 /*
699 * Wait for the adapter to be up and running. Wait up to 3 minutes
700 */
701 while (!((status = src_readl(dev, MUnit.OMR)) &
702 KERNEL_UP_AND_RUNNING)) {
703 if ((restart &&
704 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
705 time_after(jiffies, start+HZ*startup_timeout)) {
706 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
707 dev->name, instance, status);
708 goto error_iounmap;
709 }
710 if (!restart &&
711 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
712 time_after(jiffies, start + HZ *
713 ((startup_timeout > 60)
714 ? (startup_timeout - 60)
715 : (startup_timeout / 2))))) {
716 if (likely(!aac_src_restart_adapter(dev,
717 aac_src_check_health(dev))))
718 start = jiffies;
719 ++restart;
720 }
721 msleep(1);
722 }
723 if (restart && aac_commit)
724 aac_commit = 1;
725 /*
726 * Fill in the common function dispatch table.
727 */
728 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
729 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
730 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
731 dev->a_ops.adapter_notify = aac_src_notify_adapter;
732 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
733 dev->a_ops.adapter_check_health = aac_src_check_health;
734 dev->a_ops.adapter_restart = aac_src_restart_adapter;
735 dev->a_ops.adapter_start = aac_src_start_adapter;
736
737 /*
738 * First clear out all interrupts. Then enable the one's that we
739 * can handle.
740 */
741 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
742 aac_adapter_disable_int(dev);
743 src_writel(dev, MUnit.ODR_C, 0xffffffff);
744 aac_adapter_enable_int(dev);
745
746 if (aac_init_adapter(dev) == NULL)
747 goto error_iounmap;
748 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
749 goto error_iounmap;
750
751 dev->msi = !pci_enable_msi(dev->pdev);
752
753 dev->aac_msix[0].vector_no = 0;
754 dev->aac_msix[0].dev = dev;
755
756 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
757 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) {
758
759 if (dev->msi)
760 pci_disable_msi(dev->pdev);
761
762 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
763 name, instance);
764 goto error_iounmap;
765 }
766 dev->dbg_base = pci_resource_start(dev->pdev, 2);
767 dev->dbg_base_mapped = dev->regs.src.bar1;
768 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
769 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
770
771 aac_adapter_enable_int(dev);
772
773 if (!dev->sync_mode) {
774 /*
775 * Tell the adapter that all is configured, and it can
776 * start accepting requests
777 */
778 aac_src_start_adapter(dev);
779 }
780 return 0;
781
782 error_iounmap:
783
784 return -1;
785 }
786
787 /**
788 * aac_srcv_init - initialize an SRCv card
789 * @dev: device to configure
790 *
791 */
792
aac_srcv_init(struct aac_dev * dev)793 int aac_srcv_init(struct aac_dev *dev)
794 {
795 unsigned long start;
796 unsigned long status;
797 int restart = 0;
798 int instance = dev->id;
799 const char *name = dev->name;
800
801 dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
802 dev->a_ops.adapter_comm = aac_src_select_comm;
803
804 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE;
805 if (aac_adapter_ioremap(dev, dev->base_size)) {
806 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
807 goto error_iounmap;
808 }
809
810 /* Failure to reset here is an option ... */
811 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
812 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
813 if ((aac_reset_devices || reset_devices) &&
814 !aac_src_restart_adapter(dev, 0))
815 ++restart;
816 /*
817 * Check to see if flash update is running.
818 * Wait for the adapter to be up and running. Wait up to 5 minutes
819 */
820 status = src_readl(dev, MUnit.OMR);
821 if (status & FLASH_UPD_PENDING) {
822 start = jiffies;
823 do {
824 status = src_readl(dev, MUnit.OMR);
825 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) {
826 printk(KERN_ERR "%s%d: adapter flash update failed.\n",
827 dev->name, instance);
828 goto error_iounmap;
829 }
830 } while (!(status & FLASH_UPD_SUCCESS) &&
831 !(status & FLASH_UPD_FAILED));
832 /* Delay 10 seconds.
833 * Because right now FW is doing a soft reset,
834 * do not read scratch pad register at this time
835 */
836 ssleep(10);
837 }
838 /*
839 * Check to see if the board panic'd while booting.
840 */
841 status = src_readl(dev, MUnit.OMR);
842 if (status & KERNEL_PANIC) {
843 if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
844 goto error_iounmap;
845 ++restart;
846 }
847 /*
848 * Check to see if the board failed any self tests.
849 */
850 status = src_readl(dev, MUnit.OMR);
851 if (status & SELF_TEST_FAILED) {
852 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
853 goto error_iounmap;
854 }
855 /*
856 * Check to see if the monitor panic'd while booting.
857 */
858 if (status & MONITOR_PANIC) {
859 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
860 goto error_iounmap;
861 }
862 start = jiffies;
863 /*
864 * Wait for the adapter to be up and running. Wait up to 3 minutes
865 */
866 while (!((status = src_readl(dev, MUnit.OMR)) &
867 KERNEL_UP_AND_RUNNING) ||
868 status == 0xffffffff) {
869 if ((restart &&
870 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
871 time_after(jiffies, start+HZ*startup_timeout)) {
872 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
873 dev->name, instance, status);
874 goto error_iounmap;
875 }
876 if (!restart &&
877 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
878 time_after(jiffies, start + HZ *
879 ((startup_timeout > 60)
880 ? (startup_timeout - 60)
881 : (startup_timeout / 2))))) {
882 if (likely(!aac_src_restart_adapter(dev, aac_src_check_health(dev))))
883 start = jiffies;
884 ++restart;
885 }
886 msleep(1);
887 }
888 if (restart && aac_commit)
889 aac_commit = 1;
890 /*
891 * Fill in the common function dispatch table.
892 */
893 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
894 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
895 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
896 dev->a_ops.adapter_notify = aac_src_notify_adapter;
897 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
898 dev->a_ops.adapter_check_health = aac_src_check_health;
899 dev->a_ops.adapter_restart = aac_src_restart_adapter;
900 dev->a_ops.adapter_start = aac_src_start_adapter;
901
902 /*
903 * First clear out all interrupts. Then enable the one's that we
904 * can handle.
905 */
906 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
907 aac_adapter_disable_int(dev);
908 src_writel(dev, MUnit.ODR_C, 0xffffffff);
909 aac_adapter_enable_int(dev);
910
911 if (aac_init_adapter(dev) == NULL)
912 goto error_iounmap;
913 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE2)
914 goto error_iounmap;
915 if (dev->msi_enabled)
916 aac_src_access_devreg(dev, AAC_ENABLE_MSIX);
917
918 if (aac_acquire_irq(dev))
919 goto error_iounmap;
920
921 dev->dbg_base = dev->base_start;
922 dev->dbg_base_mapped = dev->base;
923 dev->dbg_size = dev->base_size;
924 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
925
926 aac_adapter_enable_int(dev);
927
928 if (!dev->sync_mode) {
929 /*
930 * Tell the adapter that all is configured, and it can
931 * start accepting requests
932 */
933 aac_src_start_adapter(dev);
934 }
935 return 0;
936
937 error_iounmap:
938
939 return -1;
940 }
941
aac_src_access_devreg(struct aac_dev * dev,int mode)942 void aac_src_access_devreg(struct aac_dev *dev, int mode)
943 {
944 u_int32_t val;
945
946 switch (mode) {
947 case AAC_ENABLE_INTERRUPT:
948 src_writel(dev,
949 MUnit.OIMR,
950 dev->OIMR = (dev->msi_enabled ?
951 AAC_INT_ENABLE_TYPE1_MSIX :
952 AAC_INT_ENABLE_TYPE1_INTX));
953 break;
954
955 case AAC_DISABLE_INTERRUPT:
956 src_writel(dev,
957 MUnit.OIMR,
958 dev->OIMR = AAC_INT_DISABLE_ALL);
959 break;
960
961 case AAC_ENABLE_MSIX:
962 /* set bit 6 */
963 val = src_readl(dev, MUnit.IDR);
964 val |= 0x40;
965 src_writel(dev, MUnit.IDR, val);
966 src_readl(dev, MUnit.IDR);
967 /* unmask int. */
968 val = PMC_ALL_INTERRUPT_BITS;
969 src_writel(dev, MUnit.IOAR, val);
970 val = src_readl(dev, MUnit.OIMR);
971 src_writel(dev,
972 MUnit.OIMR,
973 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
974 break;
975
976 case AAC_DISABLE_MSIX:
977 /* reset bit 6 */
978 val = src_readl(dev, MUnit.IDR);
979 val &= ~0x40;
980 src_writel(dev, MUnit.IDR, val);
981 src_readl(dev, MUnit.IDR);
982 break;
983
984 case AAC_CLEAR_AIF_BIT:
985 /* set bit 5 */
986 val = src_readl(dev, MUnit.IDR);
987 val |= 0x20;
988 src_writel(dev, MUnit.IDR, val);
989 src_readl(dev, MUnit.IDR);
990 break;
991
992 case AAC_CLEAR_SYNC_BIT:
993 /* set bit 4 */
994 val = src_readl(dev, MUnit.IDR);
995 val |= 0x10;
996 src_writel(dev, MUnit.IDR, val);
997 src_readl(dev, MUnit.IDR);
998 break;
999
1000 case AAC_ENABLE_INTX:
1001 /* set bit 7 */
1002 val = src_readl(dev, MUnit.IDR);
1003 val |= 0x80;
1004 src_writel(dev, MUnit.IDR, val);
1005 src_readl(dev, MUnit.IDR);
1006 /* unmask int. */
1007 val = PMC_ALL_INTERRUPT_BITS;
1008 src_writel(dev, MUnit.IOAR, val);
1009 src_readl(dev, MUnit.IOAR);
1010 val = src_readl(dev, MUnit.OIMR);
1011 src_writel(dev, MUnit.OIMR,
1012 val & (~(PMC_GLOBAL_INT_BIT2)));
1013 break;
1014
1015 default:
1016 break;
1017 }
1018 }
1019
aac_src_get_sync_status(struct aac_dev * dev)1020 static int aac_src_get_sync_status(struct aac_dev *dev)
1021 {
1022
1023 int val;
1024
1025 if (dev->msi_enabled)
1026 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0;
1027 else
1028 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT;
1029
1030 return val;
1031 }
1032