• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2  * TI Touch Screen / ADC MFD driver
3  *
4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation version 2.
9  *
10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11  * kind, whether express or implied; without even the implied warranty
12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #include <linux/module.h>
17 #include <linux/slab.h>
18 #include <linux/err.h>
19 #include <linux/io.h>
20 #include <linux/clk.h>
21 #include <linux/regmap.h>
22 #include <linux/mfd/core.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/of.h>
25 #include <linux/of_device.h>
26 #include <linux/sched.h>
27 
28 #include <linux/mfd/ti_am335x_tscadc.h>
29 
30 static const struct regmap_config tscadc_regmap_config = {
31 	.name = "ti_tscadc",
32 	.reg_bits = 32,
33 	.reg_stride = 4,
34 	.val_bits = 32,
35 };
36 
am335x_tsc_se_set_cache(struct ti_tscadc_dev * tscadc,u32 val)37 void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
38 {
39 	unsigned long flags;
40 
41 	spin_lock_irqsave(&tscadc->reg_lock, flags);
42 	tscadc->reg_se_cache |= val;
43 	if (tscadc->adc_waiting)
44 		wake_up(&tscadc->reg_se_wait);
45 	else if (!tscadc->adc_in_use)
46 		regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
47 
48 	spin_unlock_irqrestore(&tscadc->reg_lock, flags);
49 }
50 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
51 
am335x_tscadc_need_adc(struct ti_tscadc_dev * tscadc)52 static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
53 {
54 	DEFINE_WAIT(wait);
55 	u32 reg;
56 
57 	regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
58 	if (reg & SEQ_STATUS) {
59 		tscadc->adc_waiting = true;
60 		prepare_to_wait(&tscadc->reg_se_wait, &wait,
61 				TASK_UNINTERRUPTIBLE);
62 		spin_unlock_irq(&tscadc->reg_lock);
63 
64 		schedule();
65 
66 		spin_lock_irq(&tscadc->reg_lock);
67 		finish_wait(&tscadc->reg_se_wait, &wait);
68 
69 		/*
70 		 * Sequencer should either be idle or
71 		 * busy applying the charge step.
72 		 */
73 		regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
74 		WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
75 		tscadc->adc_waiting = false;
76 	}
77 	tscadc->adc_in_use = true;
78 }
79 
am335x_tsc_se_set_once(struct ti_tscadc_dev * tscadc,u32 val)80 void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
81 {
82 	spin_lock_irq(&tscadc->reg_lock);
83 	am335x_tscadc_need_adc(tscadc);
84 
85 	regmap_write(tscadc->regmap, REG_SE, val);
86 	spin_unlock_irq(&tscadc->reg_lock);
87 }
88 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
89 
am335x_tsc_se_adc_done(struct ti_tscadc_dev * tscadc)90 void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
91 {
92 	unsigned long flags;
93 
94 	spin_lock_irqsave(&tscadc->reg_lock, flags);
95 	tscadc->adc_in_use = false;
96 	regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
97 	spin_unlock_irqrestore(&tscadc->reg_lock, flags);
98 }
99 EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
100 
am335x_tsc_se_clr(struct ti_tscadc_dev * tscadc,u32 val)101 void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
102 {
103 	unsigned long flags;
104 
105 	spin_lock_irqsave(&tscadc->reg_lock, flags);
106 	tscadc->reg_se_cache &= ~val;
107 	regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
108 	spin_unlock_irqrestore(&tscadc->reg_lock, flags);
109 }
110 EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
111 
tscadc_idle_config(struct ti_tscadc_dev * tscadc)112 static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
113 {
114 	unsigned int idleconfig;
115 
116 	idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
117 			STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
118 
119 	regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
120 }
121 
ti_tscadc_probe(struct platform_device * pdev)122 static	int ti_tscadc_probe(struct platform_device *pdev)
123 {
124 	struct ti_tscadc_dev	*tscadc;
125 	struct resource		*res;
126 	struct clk		*clk;
127 	struct device_node	*node = pdev->dev.of_node;
128 	struct mfd_cell		*cell;
129 	struct property         *prop;
130 	const __be32            *cur;
131 	u32			val;
132 	int			err, ctrl;
133 	int			clock_rate;
134 	int			tsc_wires = 0, adc_channels = 0, total_channels;
135 	int			readouts = 0;
136 
137 	if (!pdev->dev.of_node) {
138 		dev_err(&pdev->dev, "Could not find valid DT data.\n");
139 		return -EINVAL;
140 	}
141 
142 	node = of_get_child_by_name(pdev->dev.of_node, "tsc");
143 	of_property_read_u32(node, "ti,wires", &tsc_wires);
144 	of_property_read_u32(node, "ti,coordiante-readouts", &readouts);
145 
146 	node = of_get_child_by_name(pdev->dev.of_node, "adc");
147 	of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
148 		adc_channels++;
149 		if (val > 7) {
150 			dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
151 					val);
152 			return -EINVAL;
153 		}
154 	}
155 	total_channels = tsc_wires + adc_channels;
156 	if (total_channels > 8) {
157 		dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
158 		return -EINVAL;
159 	}
160 	if (total_channels == 0) {
161 		dev_err(&pdev->dev, "Need atleast one channel.\n");
162 		return -EINVAL;
163 	}
164 
165 	if (readouts * 2 + 2 + adc_channels > 16) {
166 		dev_err(&pdev->dev, "Too many step configurations requested\n");
167 		return -EINVAL;
168 	}
169 
170 	/* Allocate memory for device */
171 	tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
172 	if (!tscadc) {
173 		dev_err(&pdev->dev, "failed to allocate memory.\n");
174 		return -ENOMEM;
175 	}
176 	tscadc->dev = &pdev->dev;
177 
178 	err = platform_get_irq(pdev, 0);
179 	if (err < 0) {
180 		dev_err(&pdev->dev, "no irq ID is specified.\n");
181 		goto ret;
182 	} else
183 		tscadc->irq = err;
184 
185 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
186 	tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res);
187 	if (IS_ERR(tscadc->tscadc_base))
188 		return PTR_ERR(tscadc->tscadc_base);
189 
190 	tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
191 			tscadc->tscadc_base, &tscadc_regmap_config);
192 	if (IS_ERR(tscadc->regmap)) {
193 		dev_err(&pdev->dev, "regmap init failed\n");
194 		err = PTR_ERR(tscadc->regmap);
195 		goto ret;
196 	}
197 
198 	spin_lock_init(&tscadc->reg_lock);
199 	init_waitqueue_head(&tscadc->reg_se_wait);
200 
201 	pm_runtime_enable(&pdev->dev);
202 	pm_runtime_get_sync(&pdev->dev);
203 
204 	/*
205 	 * The TSC_ADC_Subsystem has 2 clock domains
206 	 * OCP_CLK and ADC_CLK.
207 	 * The ADC clock is expected to run at target of 3MHz,
208 	 * and expected to capture 12-bit data at a rate of 200 KSPS.
209 	 * The TSC_ADC_SS controller design assumes the OCP clock is
210 	 * at least 6x faster than the ADC clock.
211 	 */
212 	clk = clk_get(&pdev->dev, "adc_tsc_fck");
213 	if (IS_ERR(clk)) {
214 		dev_err(&pdev->dev, "failed to get TSC fck\n");
215 		err = PTR_ERR(clk);
216 		goto err_disable_clk;
217 	}
218 	clock_rate = clk_get_rate(clk);
219 	clk_put(clk);
220 	tscadc->clk_div = clock_rate / ADC_CLK;
221 
222 	/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
223 	tscadc->clk_div--;
224 	regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
225 
226 	/* Set the control register bits */
227 	ctrl = CNTRLREG_STEPCONFIGWRT |	CNTRLREG_STEPID;
228 	regmap_write(tscadc->regmap, REG_CTRL, ctrl);
229 
230 	/* Set register bits for Idle Config Mode */
231 	if (tsc_wires > 0) {
232 		tscadc->tsc_wires = tsc_wires;
233 		if (tsc_wires == 5)
234 			ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
235 		else
236 			ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
237 		tscadc_idle_config(tscadc);
238 	}
239 
240 	/* Enable the TSC module enable bit */
241 	ctrl |= CNTRLREG_TSCSSENB;
242 	regmap_write(tscadc->regmap, REG_CTRL, ctrl);
243 
244 	tscadc->used_cells = 0;
245 	tscadc->tsc_cell = -1;
246 	tscadc->adc_cell = -1;
247 
248 	/* TSC Cell */
249 	if (tsc_wires > 0) {
250 		tscadc->tsc_cell = tscadc->used_cells;
251 		cell = &tscadc->cells[tscadc->used_cells++];
252 		cell->name = "TI-am335x-tsc";
253 		cell->of_compatible = "ti,am3359-tsc";
254 		cell->platform_data = &tscadc;
255 		cell->pdata_size = sizeof(tscadc);
256 	}
257 
258 	/* ADC Cell */
259 	if (adc_channels > 0) {
260 		tscadc->adc_cell = tscadc->used_cells;
261 		cell = &tscadc->cells[tscadc->used_cells++];
262 		cell->name = "TI-am335x-adc";
263 		cell->of_compatible = "ti,am3359-adc";
264 		cell->platform_data = &tscadc;
265 		cell->pdata_size = sizeof(tscadc);
266 	}
267 
268 	err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
269 			tscadc->used_cells, NULL, 0, NULL);
270 	if (err < 0)
271 		goto err_disable_clk;
272 
273 	device_init_wakeup(&pdev->dev, true);
274 	platform_set_drvdata(pdev, tscadc);
275 	return 0;
276 
277 err_disable_clk:
278 	pm_runtime_put_sync(&pdev->dev);
279 	pm_runtime_disable(&pdev->dev);
280 ret:
281 	return err;
282 }
283 
ti_tscadc_remove(struct platform_device * pdev)284 static int ti_tscadc_remove(struct platform_device *pdev)
285 {
286 	struct ti_tscadc_dev	*tscadc = platform_get_drvdata(pdev);
287 
288 	regmap_write(tscadc->regmap, REG_SE, 0x00);
289 
290 	pm_runtime_put_sync(&pdev->dev);
291 	pm_runtime_disable(&pdev->dev);
292 
293 	mfd_remove_devices(tscadc->dev);
294 
295 	return 0;
296 }
297 
tscadc_suspend(struct device * dev)298 static int __maybe_unused tscadc_suspend(struct device *dev)
299 {
300 	struct ti_tscadc_dev	*tscadc = dev_get_drvdata(dev);
301 
302 	regmap_write(tscadc->regmap, REG_SE, 0x00);
303 	pm_runtime_put_sync(dev);
304 
305 	return 0;
306 }
307 
tscadc_resume(struct device * dev)308 static int __maybe_unused tscadc_resume(struct device *dev)
309 {
310 	struct ti_tscadc_dev	*tscadc = dev_get_drvdata(dev);
311 	u32 ctrl;
312 
313 	pm_runtime_get_sync(dev);
314 
315 	/* context restore */
316 	ctrl = CNTRLREG_STEPCONFIGWRT |	CNTRLREG_STEPID;
317 	regmap_write(tscadc->regmap, REG_CTRL, ctrl);
318 
319 	if (tscadc->tsc_cell != -1) {
320 		if (tscadc->tsc_wires == 5)
321 			ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
322 		else
323 			ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
324 		tscadc_idle_config(tscadc);
325 	}
326 	ctrl |= CNTRLREG_TSCSSENB;
327 	regmap_write(tscadc->regmap, REG_CTRL, ctrl);
328 
329 	regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
330 
331 	return 0;
332 }
333 
334 static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
335 
336 static const struct of_device_id ti_tscadc_dt_ids[] = {
337 	{ .compatible = "ti,am3359-tscadc", },
338 	{ }
339 };
340 MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
341 
342 static struct platform_driver ti_tscadc_driver = {
343 	.driver = {
344 		.name   = "ti_am3359-tscadc",
345 		.pm	= &tscadc_pm_ops,
346 		.of_match_table = ti_tscadc_dt_ids,
347 	},
348 	.probe	= ti_tscadc_probe,
349 	.remove	= ti_tscadc_remove,
350 
351 };
352 
353 module_platform_driver(ti_tscadc_driver);
354 
355 MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
356 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
357 MODULE_LICENSE("GPL");
358