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1 /******************************************************************************
2  * x86_emulate.h
3  *
4  * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
5  *
6  * Copyright (c) 2005 Keir Fraser
7  *
8  * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
9  */
10 
11 #ifndef _ASM_X86_KVM_X86_EMULATE_H
12 #define _ASM_X86_KVM_X86_EMULATE_H
13 
14 #include <asm/desc_defs.h>
15 
16 struct x86_emulate_ctxt;
17 enum x86_intercept;
18 enum x86_intercept_stage;
19 
20 struct x86_exception {
21 	u8 vector;
22 	bool error_code_valid;
23 	u16 error_code;
24 	bool nested_page_fault;
25 	u64 address; /* cr2 or nested page fault gpa */
26 };
27 
28 /*
29  * This struct is used to carry enough information from the instruction
30  * decoder to main KVM so that a decision can be made whether the
31  * instruction needs to be intercepted or not.
32  */
33 struct x86_instruction_info {
34 	u8  intercept;          /* which intercept                      */
35 	u8  rep_prefix;         /* rep prefix?                          */
36 	u8  modrm_mod;		/* mod part of modrm			*/
37 	u8  modrm_reg;          /* index of register used               */
38 	u8  modrm_rm;		/* rm part of modrm			*/
39 	u64 src_val;            /* value of source operand              */
40 	u64 dst_val;            /* value of destination operand         */
41 	u8  src_bytes;          /* size of source operand               */
42 	u8  dst_bytes;          /* size of destination operand          */
43 	u8  ad_bytes;           /* size of src/dst address              */
44 	u64 next_rip;           /* rip following the instruction        */
45 };
46 
47 /*
48  * x86_emulate_ops:
49  *
50  * These operations represent the instruction emulator's interface to memory.
51  * There are two categories of operation: those that act on ordinary memory
52  * regions (*_std), and those that act on memory regions known to require
53  * special treatment or emulation (*_emulated).
54  *
55  * The emulator assumes that an instruction accesses only one 'emulated memory'
56  * location, that this location is the given linear faulting address (cr2), and
57  * that this is one of the instruction's data operands. Instruction fetches and
58  * stack operations are assumed never to access emulated memory. The emulator
59  * automatically deduces which operand of a string-move operation is accessing
60  * emulated memory, and assumes that the other operand accesses normal memory.
61  *
62  * NOTES:
63  *  1. The emulator isn't very smart about emulated vs. standard memory.
64  *     'Emulated memory' access addresses should be checked for sanity.
65  *     'Normal memory' accesses may fault, and the caller must arrange to
66  *     detect and handle reentrancy into the emulator via recursive faults.
67  *     Accesses may be unaligned and may cross page boundaries.
68  *  2. If the access fails (cannot emulate, or a standard access faults) then
69  *     it is up to the memop to propagate the fault to the guest VM via
70  *     some out-of-band mechanism, unknown to the emulator. The memop signals
71  *     failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
72  *     then immediately bail.
73  *  3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
74  *     cmpxchg8b_emulated need support 8-byte accesses.
75  *  4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
76  */
77 /* Access completed successfully: continue emulation as normal. */
78 #define X86EMUL_CONTINUE        0
79 /* Access is unhandleable: bail from emulation and return error to caller. */
80 #define X86EMUL_UNHANDLEABLE    1
81 /* Terminate emulation but return success to the caller. */
82 #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
83 #define X86EMUL_RETRY_INSTR     3 /* retry the instruction for some reason */
84 #define X86EMUL_CMPXCHG_FAILED  4 /* cmpxchg did not see expected value */
85 #define X86EMUL_IO_NEEDED       5 /* IO is needed to complete emulation */
86 #define X86EMUL_INTERCEPTED     6 /* Intercepted by nested VMCB/VMCS */
87 
88 struct x86_emulate_ops {
89 	/*
90 	 * read_gpr: read a general purpose register (rax - r15)
91 	 *
92 	 * @reg: gpr number.
93 	 */
94 	ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
95 	/*
96 	 * write_gpr: write a general purpose register (rax - r15)
97 	 *
98 	 * @reg: gpr number.
99 	 * @val: value to write.
100 	 */
101 	void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
102 	/*
103 	 * read_std: Read bytes of standard (non-emulated/special) memory.
104 	 *           Used for descriptor reading.
105 	 *  @addr:  [IN ] Linear address from which to read.
106 	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
107 	 *  @bytes: [IN ] Number of bytes to read from memory.
108 	 */
109 	int (*read_std)(struct x86_emulate_ctxt *ctxt,
110 			unsigned long addr, void *val,
111 			unsigned int bytes,
112 			struct x86_exception *fault);
113 
114 	/*
115 	 * read_phys: Read bytes of standard (non-emulated/special) memory.
116 	 *            Used for descriptor reading.
117 	 *  @addr:  [IN ] Physical address from which to read.
118 	 *  @val:   [OUT] Value read from memory.
119 	 *  @bytes: [IN ] Number of bytes to read from memory.
120 	 */
121 	int (*read_phys)(struct x86_emulate_ctxt *ctxt, unsigned long addr,
122 			void *val, unsigned int bytes);
123 
124 	/*
125 	 * write_std: Write bytes of standard (non-emulated/special) memory.
126 	 *            Used for descriptor writing.
127 	 *  @addr:  [IN ] Linear address to which to write.
128 	 *  @val:   [OUT] Value write to memory, zero-extended to 'u_long'.
129 	 *  @bytes: [IN ] Number of bytes to write to memory.
130 	 */
131 	int (*write_std)(struct x86_emulate_ctxt *ctxt,
132 			 unsigned long addr, void *val, unsigned int bytes,
133 			 struct x86_exception *fault);
134 	/*
135 	 * fetch: Read bytes of standard (non-emulated/special) memory.
136 	 *        Used for instruction fetch.
137 	 *  @addr:  [IN ] Linear address from which to read.
138 	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
139 	 *  @bytes: [IN ] Number of bytes to read from memory.
140 	 */
141 	int (*fetch)(struct x86_emulate_ctxt *ctxt,
142 		     unsigned long addr, void *val, unsigned int bytes,
143 		     struct x86_exception *fault);
144 
145 	/*
146 	 * read_emulated: Read bytes from emulated/special memory area.
147 	 *  @addr:  [IN ] Linear address from which to read.
148 	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
149 	 *  @bytes: [IN ] Number of bytes to read from memory.
150 	 */
151 	int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
152 			     unsigned long addr, void *val, unsigned int bytes,
153 			     struct x86_exception *fault);
154 
155 	/*
156 	 * write_emulated: Write bytes to emulated/special memory area.
157 	 *  @addr:  [IN ] Linear address to which to write.
158 	 *  @val:   [IN ] Value to write to memory (low-order bytes used as
159 	 *                required).
160 	 *  @bytes: [IN ] Number of bytes to write to memory.
161 	 */
162 	int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
163 			      unsigned long addr, const void *val,
164 			      unsigned int bytes,
165 			      struct x86_exception *fault);
166 
167 	/*
168 	 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
169 	 *                   emulated/special memory area.
170 	 *  @addr:  [IN ] Linear address to access.
171 	 *  @old:   [IN ] Value expected to be current at @addr.
172 	 *  @new:   [IN ] Value to write to @addr.
173 	 *  @bytes: [IN ] Number of bytes to access using CMPXCHG.
174 	 */
175 	int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
176 				unsigned long addr,
177 				const void *old,
178 				const void *new,
179 				unsigned int bytes,
180 				struct x86_exception *fault);
181 	void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
182 
183 	int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
184 			       int size, unsigned short port, void *val,
185 			       unsigned int count);
186 
187 	int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
188 				int size, unsigned short port, const void *val,
189 				unsigned int count);
190 
191 	bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
192 			    struct desc_struct *desc, u32 *base3, int seg);
193 	void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
194 			    struct desc_struct *desc, u32 base3, int seg);
195 	unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
196 						 int seg);
197 	void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
198 	void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
199 	void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
200 	void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
201 	ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
202 	int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
203 	int (*cpl)(struct x86_emulate_ctxt *ctxt);
204 	int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
205 	int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
206 	u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt);
207 	void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase);
208 	int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
209 	int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
210 	int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
211 	int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
212 	void (*halt)(struct x86_emulate_ctxt *ctxt);
213 	void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
214 	int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
215 	void (*get_fpu)(struct x86_emulate_ctxt *ctxt); /* disables preempt */
216 	void (*put_fpu)(struct x86_emulate_ctxt *ctxt); /* reenables preempt */
217 	int (*intercept)(struct x86_emulate_ctxt *ctxt,
218 			 struct x86_instruction_info *info,
219 			 enum x86_intercept_stage stage);
220 
221 	void (*get_cpuid)(struct x86_emulate_ctxt *ctxt,
222 			  u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
223 	void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
224 
225 	unsigned (*get_hflags)(struct x86_emulate_ctxt *ctxt);
226 	void (*set_hflags)(struct x86_emulate_ctxt *ctxt, unsigned hflags);
227 };
228 
229 typedef u32 __attribute__((vector_size(16))) sse128_t;
230 
231 /* Type, address-of, and value of an instruction's operand. */
232 struct operand {
233 	enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
234 	unsigned int bytes;
235 	unsigned int count;
236 	union {
237 		unsigned long orig_val;
238 		u64 orig_val64;
239 	};
240 	union {
241 		unsigned long *reg;
242 		struct segmented_address {
243 			ulong ea;
244 			unsigned seg;
245 		} mem;
246 		unsigned xmm;
247 		unsigned mm;
248 	} addr;
249 	union {
250 		unsigned long val;
251 		u64 val64;
252 		char valptr[sizeof(sse128_t)];
253 		sse128_t vec_val;
254 		u64 mm_val;
255 		void *data;
256 	};
257 };
258 
259 struct fetch_cache {
260 	u8 data[15];
261 	u8 *ptr;
262 	u8 *end;
263 };
264 
265 struct read_cache {
266 	u8 data[1024];
267 	unsigned long pos;
268 	unsigned long end;
269 };
270 
271 /* Execution mode, passed to the emulator. */
272 enum x86emul_mode {
273 	X86EMUL_MODE_REAL,	/* Real mode.             */
274 	X86EMUL_MODE_VM86,	/* Virtual 8086 mode.     */
275 	X86EMUL_MODE_PROT16,	/* 16-bit protected mode. */
276 	X86EMUL_MODE_PROT32,	/* 32-bit protected mode. */
277 	X86EMUL_MODE_PROT64,	/* 64-bit (long) mode.    */
278 };
279 
280 /* These match some of the HF_* flags defined in kvm_host.h  */
281 #define X86EMUL_GUEST_MASK           (1 << 5) /* VCPU is in guest-mode */
282 #define X86EMUL_SMM_MASK             (1 << 6)
283 #define X86EMUL_SMM_INSIDE_NMI_MASK  (1 << 7)
284 
285 struct x86_emulate_ctxt {
286 	const struct x86_emulate_ops *ops;
287 
288 	/* Register state before/after emulation. */
289 	unsigned long eflags;
290 	unsigned long eip; /* eip before instruction emulation */
291 	/* Emulated execution mode, represented by an X86EMUL_MODE value. */
292 	enum x86emul_mode mode;
293 
294 	/* interruptibility state, as a result of execution of STI or MOV SS */
295 	int interruptibility;
296 
297 	bool perm_ok; /* do not check permissions if true */
298 	bool ud;	/* inject an #UD if host doesn't support insn */
299 	bool tf;	/* TF value before instruction (after for syscall/sysret) */
300 
301 	bool have_exception;
302 	struct x86_exception exception;
303 
304 	/*
305 	 * decode cache
306 	 */
307 
308 	/* current opcode length in bytes */
309 	u8 opcode_len;
310 	u8 b;
311 	u8 intercept;
312 	u8 op_bytes;
313 	u8 ad_bytes;
314 	struct operand src;
315 	struct operand src2;
316 	struct operand dst;
317 	int (*execute)(struct x86_emulate_ctxt *ctxt);
318 	int (*check_perm)(struct x86_emulate_ctxt *ctxt);
319 	/*
320 	 * The following six fields are cleared together,
321 	 * the rest are initialized unconditionally in x86_decode_insn
322 	 * or elsewhere
323 	 */
324 	bool rip_relative;
325 	u8 rex_prefix;
326 	u8 lock_prefix;
327 	u8 rep_prefix;
328 	/* bitmaps of registers in _regs[] that can be read */
329 	u32 regs_valid;
330 	/* bitmaps of registers in _regs[] that have been written */
331 	u32 regs_dirty;
332 	/* modrm */
333 	u8 modrm;
334 	u8 modrm_mod;
335 	u8 modrm_reg;
336 	u8 modrm_rm;
337 	u8 modrm_seg;
338 	u8 seg_override;
339 	u64 d;
340 	unsigned long _eip;
341 	struct operand memop;
342 	/* Fields above regs are cleared together. */
343 	unsigned long _regs[NR_VCPU_REGS];
344 	struct operand *memopp;
345 	struct fetch_cache fetch;
346 	struct read_cache io_read;
347 	struct read_cache mem_read;
348 };
349 
350 /* Repeat String Operation Prefix */
351 #define REPE_PREFIX	0xf3
352 #define REPNE_PREFIX	0xf2
353 
354 /* CPUID vendors */
355 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
356 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
357 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
358 
359 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
360 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
361 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
362 
363 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
364 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
365 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
366 
367 enum x86_intercept_stage {
368 	X86_ICTP_NONE = 0,   /* Allow zero-init to not match anything */
369 	X86_ICPT_PRE_EXCEPT,
370 	X86_ICPT_POST_EXCEPT,
371 	X86_ICPT_POST_MEMACCESS,
372 };
373 
374 enum x86_intercept {
375 	x86_intercept_none,
376 	x86_intercept_cr_read,
377 	x86_intercept_cr_write,
378 	x86_intercept_clts,
379 	x86_intercept_lmsw,
380 	x86_intercept_smsw,
381 	x86_intercept_dr_read,
382 	x86_intercept_dr_write,
383 	x86_intercept_lidt,
384 	x86_intercept_sidt,
385 	x86_intercept_lgdt,
386 	x86_intercept_sgdt,
387 	x86_intercept_lldt,
388 	x86_intercept_sldt,
389 	x86_intercept_ltr,
390 	x86_intercept_str,
391 	x86_intercept_rdtsc,
392 	x86_intercept_rdpmc,
393 	x86_intercept_pushf,
394 	x86_intercept_popf,
395 	x86_intercept_cpuid,
396 	x86_intercept_rsm,
397 	x86_intercept_iret,
398 	x86_intercept_intn,
399 	x86_intercept_invd,
400 	x86_intercept_pause,
401 	x86_intercept_hlt,
402 	x86_intercept_invlpg,
403 	x86_intercept_invlpga,
404 	x86_intercept_vmrun,
405 	x86_intercept_vmload,
406 	x86_intercept_vmsave,
407 	x86_intercept_vmmcall,
408 	x86_intercept_stgi,
409 	x86_intercept_clgi,
410 	x86_intercept_skinit,
411 	x86_intercept_rdtscp,
412 	x86_intercept_icebp,
413 	x86_intercept_wbinvd,
414 	x86_intercept_monitor,
415 	x86_intercept_mwait,
416 	x86_intercept_rdmsr,
417 	x86_intercept_wrmsr,
418 	x86_intercept_in,
419 	x86_intercept_ins,
420 	x86_intercept_out,
421 	x86_intercept_outs,
422 
423 	nr_x86_intercepts
424 };
425 
426 /* Host execution mode. */
427 #if defined(CONFIG_X86_32)
428 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
429 #elif defined(CONFIG_X86_64)
430 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
431 #endif
432 
433 int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len);
434 bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
435 #define EMULATION_FAILED -1
436 #define EMULATION_OK 0
437 #define EMULATION_RESTART 1
438 #define EMULATION_INTERCEPTED 2
439 void init_decode_cache(struct x86_emulate_ctxt *ctxt);
440 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
441 int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
442 			 u16 tss_selector, int idt_index, int reason,
443 			 bool has_error_code, u32 error_code);
444 int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
445 void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
446 void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
447 
448 #endif /* _ASM_X86_KVM_X86_EMULATE_H */
449