| /drivers/gpu/drm/gma500/ |
| D | psb_intel_display.c | 116 u32 dpll = 0, fp = 0, dspcntr, pipeconf; in psb_intel_crtc_mode_set() local
315 u32 dpll; in psb_intel_crtc_clock_get() local
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| D | cdv_intel_display.c | 591 u32 dpll = 0, dspcntr, pipeconf; in cdv_intel_crtc_mode_set() local
856 u32 dpll; in cdv_intel_crtc_clock_get() local
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| D | mdfld_device.c | 251 u32 dpll; in mdfld_restore_display_registers() local
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| D | oaktrail_crtc.c | 378 u32 dpll = 0, fp = 0, dspcntr, pipeconf; in oaktrail_crtc_mode_set() local
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| D | mdfld_intel_display.c | 681 u32 dpll = 0, fp = 0; in mdfld_crtc_mode_set() local
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| D | oaktrail_hdmi.c | 281 u32 dspcntr, pipeconf, dpll, temp; in oaktrail_crtc_hdmi_mode_set() local
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| D | psb_drv.h | 283 u32 dpll; member
317 u32 dpll; member
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| /drivers/ata/ |
| D | pata_hpt3x2n.c | 316 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); in hpt3x2n_qc_defer() local
332 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); in hpt3x2n_qc_issue() local
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| D | pata_hpt37x.c | 982 int dpll, adjust; in hpt37x_init_one() local
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| /drivers/gpu/drm/i915/ |
| D | intel_drv.h | 314 struct dpll { struct
337 bool dpll_set, modeset; argument
593 struct dpll dpll; member
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| D | intel_ddi.c | 808 uint32_t dpll) in skl_calc_wrpll_link()
893 uint32_t dpll_ctl1, dpll; in skl_ddi_clock_get() local
984 enum intel_dpll_id dpll) in bxt_calc_pll_link()
1013 uint32_t dpll = port; in bxt_ddi_clock_get() local
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| D | intel_dpll_mgr.h | 71 uint32_t dpll; member
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| D | intel_dvo.c | 466 uint32_t dpll[I915_MAX_PIPES]; in intel_dvo_init() local
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| D | intel_display.c | 555 static uint32_t i9xx_dpll_compute_m(struct dpll *dpll) in i9xx_dpll_compute_m()
1617 u32 dpll = crtc->config->dpll_hw_state.dpll; in i9xx_enable_pll() local
7701 static uint32_t pnv_dpll_compute_fp(struct dpll *dpll) in pnv_dpll_compute_fp()
7706 static uint32_t i9xx_dpll_compute_fp(struct dpll *dpll) in i9xx_dpll_compute_fp()
8089 const struct dpll *dpll) in vlv_force_pll_on()
8140 u32 dpll; in i9xx_compute_dpll() local
8213 u32 dpll; in i8xx_compute_dpll() local
9453 static bool ironlake_needs_fb_cb_tune(struct dpll *dpll, int factor) in ironlake_needs_fb_cb_tune()
9465 u32 dpll, fp, fp2; in ironlake_compute_dpll() local
11330 u32 dpll = pipe_config->dpll_hw_state.dpll; in i9xx_pll_refclk() local
[all …]
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| D | intel_dp.c | 52 struct dpll dpll; member
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| /drivers/clk/rockchip/ |
| D | clk-rk3036.c | 29 apll, dpll, gpll, enumerator
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| D | clk-rk3228.c | 27 apll, dpll, cpll, gpll, enumerator
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| D | clk-rk3368.c | 25 apllb, aplll, dpll, cpll, gpll, npll, enumerator
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| D | clk-rk3399.c | 25 lpll, bpll, dpll, cpll, gpll, npll, vpll, enumerator
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| D | clk-rk3288.c | 27 apll, dpll, cpll, gpll, npll, enumerator
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| D | clk-rk3188.c | 27 apll, cpll, dpll, gpll, enumerator
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| /drivers/video/fbdev/intelfb/ |
| D | intelfbhw.c | 682 static void intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, in intelfbhw_get_p1p2()
1048 u32 *dpll, *fp0, *fp1; in intelfbhw_mode_to_hw() local
1284 const u32 *dpll, *fp0, *fp1, *pipe_conf; in intelfbhw_program_mode() local
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| /drivers/clk/ti/ |
| D | dpll.c | 225 struct ti_clk_dpll *dpll; in ti_clk_register_dpll() local
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| /drivers/clk/samsung/ |
| D | clk-exynos5420.c | 150 apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, enumerator
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| /drivers/ide/ |
| D | hpt366.c | 848 u32 dpll = (f_high << 16) | f_low | 0x100; in hpt37x_calibrate_dpll() local
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