1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "priv.h"
25
26 static const struct nvkm_mc_map
27 gf100_mc_reset[] = {
28 { 0x00020000, NVKM_ENGINE_MSPDEC },
29 { 0x00008000, NVKM_ENGINE_MSVLD },
30 { 0x00001000, NVKM_ENGINE_GR },
31 { 0x00000100, NVKM_ENGINE_FIFO },
32 { 0x00000080, NVKM_ENGINE_CE1 },
33 { 0x00000040, NVKM_ENGINE_CE0 },
34 { 0x00000002, NVKM_ENGINE_MSPPP },
35 {}
36 };
37
38 static const struct nvkm_mc_map
39 gf100_mc_intr[] = {
40 { 0x04000000, NVKM_ENGINE_DISP },
41 { 0x00020000, NVKM_ENGINE_MSPDEC },
42 { 0x00008000, NVKM_ENGINE_MSVLD },
43 { 0x00001000, NVKM_ENGINE_GR },
44 { 0x00000100, NVKM_ENGINE_FIFO },
45 { 0x00000040, NVKM_ENGINE_CE1 },
46 { 0x00000020, NVKM_ENGINE_CE0 },
47 { 0x00000001, NVKM_ENGINE_MSPPP },
48 { 0x40000000, NVKM_SUBDEV_IBUS },
49 { 0x10000000, NVKM_SUBDEV_BUS },
50 { 0x08000000, NVKM_SUBDEV_FB },
51 { 0x02000000, NVKM_SUBDEV_LTC },
52 { 0x01000000, NVKM_SUBDEV_PMU },
53 { 0x00200000, NVKM_SUBDEV_GPIO },
54 { 0x00200000, NVKM_SUBDEV_I2C },
55 { 0x00100000, NVKM_SUBDEV_TIMER },
56 { 0x00040000, NVKM_SUBDEV_THERM },
57 { 0x00002000, NVKM_SUBDEV_FB },
58 {},
59 };
60
61 void
gf100_mc_intr_unarm(struct nvkm_mc * mc)62 gf100_mc_intr_unarm(struct nvkm_mc *mc)
63 {
64 struct nvkm_device *device = mc->subdev.device;
65 nvkm_wr32(device, 0x000140, 0x00000000);
66 nvkm_wr32(device, 0x000144, 0x00000000);
67 nvkm_rd32(device, 0x000140);
68 }
69
70 void
gf100_mc_intr_rearm(struct nvkm_mc * mc)71 gf100_mc_intr_rearm(struct nvkm_mc *mc)
72 {
73 struct nvkm_device *device = mc->subdev.device;
74 nvkm_wr32(device, 0x000140, 0x00000001);
75 nvkm_wr32(device, 0x000144, 0x00000001);
76 }
77
78 u32
gf100_mc_intr_stat(struct nvkm_mc * mc)79 gf100_mc_intr_stat(struct nvkm_mc *mc)
80 {
81 struct nvkm_device *device = mc->subdev.device;
82 u32 intr0 = nvkm_rd32(device, 0x000100);
83 u32 intr1 = nvkm_rd32(device, 0x000104);
84 return intr0 | intr1;
85 }
86
87 void
gf100_mc_intr_mask(struct nvkm_mc * mc,u32 mask,u32 stat)88 gf100_mc_intr_mask(struct nvkm_mc *mc, u32 mask, u32 stat)
89 {
90 struct nvkm_device *device = mc->subdev.device;
91 nvkm_mask(device, 0x000640, mask, stat);
92 nvkm_mask(device, 0x000644, mask, stat);
93 }
94
95 void
gf100_mc_unk260(struct nvkm_mc * mc,u32 data)96 gf100_mc_unk260(struct nvkm_mc *mc, u32 data)
97 {
98 nvkm_wr32(mc->subdev.device, 0x000260, data);
99 }
100
101 static const struct nvkm_mc_func
102 gf100_mc = {
103 .init = nv50_mc_init,
104 .intr = gf100_mc_intr,
105 .intr_unarm = gf100_mc_intr_unarm,
106 .intr_rearm = gf100_mc_intr_rearm,
107 .intr_mask = gf100_mc_intr_mask,
108 .intr_stat = gf100_mc_intr_stat,
109 .reset = gf100_mc_reset,
110 .unk260 = gf100_mc_unk260,
111 };
112
113 int
gf100_mc_new(struct nvkm_device * device,int index,struct nvkm_mc ** pmc)114 gf100_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
115 {
116 return nvkm_mc_new_(&gf100_mc, device, index, pmc);
117 }
118