| /drivers/gpu/drm/amd/powerplay/hwmgr/ |
| D | hardwaremanager.c | 35 bool phm_is_hw_access_blocked(struct pp_hwmgr *hwmgr) in phm_is_hw_access_blocked()
40 int phm_block_hw_access(struct pp_hwmgr *hwmgr, bool block) in phm_block_hw_access()
46 int phm_setup_asic(struct pp_hwmgr *hwmgr) in phm_setup_asic()
62 int phm_power_down_asic(struct pp_hwmgr *hwmgr) in phm_power_down_asic()
78 int phm_set_power_state(struct pp_hwmgr *hwmgr, in phm_set_power_state()
100 int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr) in phm_enable_dynamic_state_management()
123 int phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr) in phm_disable_dynamic_state_management()
147 int phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) in phm_force_dpm_levels()
157 int phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, in phm_apply_state_adjust_rules()
171 int phm_powerdown_uvd(struct pp_hwmgr *hwmgr) in phm_powerdown_uvd()
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| D | smu7_hwmgr.c | 118 int smu7_get_mc_microcode_version (struct pp_hwmgr *hwmgr) in smu7_get_mc_microcode_version()
127 uint16_t smu7_get_current_pcie_speed(struct pp_hwmgr *hwmgr) in smu7_get_current_pcie_speed()
138 int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr) in smu7_get_current_pcie_lane_number()
158 int smu7_enable_smc_voltage_controller(struct pp_hwmgr *hwmgr) in smu7_enable_smc_voltage_controller()
171 static bool smu7_voltage_control(const struct pp_hwmgr *hwmgr) in smu7_voltage_control()
185 static int smu7_enable_voltage_control(struct pp_hwmgr *hwmgr) in smu7_enable_voltage_control()
223 static int smu7_construct_voltage_tables(struct pp_hwmgr *hwmgr) in smu7_construct_voltage_tables()
336 struct pp_hwmgr *hwmgr) in smu7_program_static_screen_threshold_parameters()
358 static int smu7_enable_display_gap(struct pp_hwmgr *hwmgr) in smu7_enable_display_gap()
382 static int smu7_program_voting_clients(struct pp_hwmgr *hwmgr) in smu7_program_voting_clients()
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| D | smu7_clockpowergating.c | 28 static int smu7_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable) in smu7_enable_disable_uvd_dpm()
35 static int smu7_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) in smu7_enable_disable_vce_dpm()
42 static int smu7_enable_disable_samu_dpm(struct pp_hwmgr *hwmgr, bool enable) in smu7_enable_disable_samu_dpm()
49 static int smu7_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate) in smu7_update_uvd_dpm()
56 static int smu7_update_vce_dpm(struct pp_hwmgr *hwmgr, bool bgate) in smu7_update_vce_dpm()
63 static int smu7_update_samu_dpm(struct pp_hwmgr *hwmgr, bool bgate) in smu7_update_samu_dpm()
70 int smu7_powerdown_uvd(struct pp_hwmgr *hwmgr) in smu7_powerdown_uvd()
78 int smu7_powerup_uvd(struct pp_hwmgr *hwmgr) in smu7_powerup_uvd()
94 int smu7_powerdown_vce(struct pp_hwmgr *hwmgr) in smu7_powerdown_vce()
102 int smu7_powerup_vce(struct pp_hwmgr *hwmgr) in smu7_powerup_vce()
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| D | smu7_thermal.c | 29 int smu7_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr, in smu7_fan_ctrl_get_fan_speed_info()
55 int smu7_fan_ctrl_get_fan_speed_percent(struct pp_hwmgr *hwmgr, in smu7_fan_ctrl_get_fan_speed_percent()
84 int smu7_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed) in smu7_fan_ctrl_get_fan_speed_rpm()
113 int smu7_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode) in smu7_fan_ctrl_set_static_mode()
139 int smu7_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr) in smu7_fan_ctrl_set_default_mode()
152 static int smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr) in smu7_fan_ctrl_start_smc_fan_control()
187 int smu7_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr) in smu7_fan_ctrl_stop_smc_fan_control()
198 int smu7_fan_ctrl_set_fan_speed_percent(struct pp_hwmgr *hwmgr, in smu7_fan_ctrl_set_fan_speed_percent()
236 int smu7_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr) in smu7_fan_ctrl_reset_fan_speed_to_default()
260 int smu7_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) in smu7_fan_ctrl_set_fan_speed_rpm()
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| D | cz_hwmgr.c | 69 uint32_t cz_get_eclk_level(struct pp_hwmgr *hwmgr, in cz_get_eclk_level()
100 static uint32_t cz_get_sclk_level(struct pp_hwmgr *hwmgr, in cz_get_sclk_level()
130 static uint32_t cz_get_uvd_level(struct pp_hwmgr *hwmgr, in cz_get_uvd_level()
161 static uint32_t cz_get_max_sclk_level(struct pp_hwmgr *hwmgr) in cz_get_max_sclk_level()
173 static int cz_initialize_dpm_defaults(struct pp_hwmgr *hwmgr) in cz_initialize_dpm_defaults()
257 struct pp_hwmgr *hwmgr, uint16_t voltage) in cz_convert_8Bit_index_to_voltage()
262 static int cz_construct_max_power_limits_table(struct pp_hwmgr *hwmgr, in cz_construct_max_power_limits_table()
280 struct pp_hwmgr *hwmgr, in cz_init_dynamic_state_adjustment_rule_settings()
317 static int cz_get_system_info_data(struct pp_hwmgr *hwmgr) in cz_get_system_info_data()
422 static int cz_construct_boot_state(struct pp_hwmgr *hwmgr) in cz_construct_boot_state()
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| D | processpptables.c | 48 static uint16_t get_vce_table_offset(struct pp_hwmgr *hwmgr, in get_vce_table_offset()
72 static uint16_t get_vce_clock_info_array_offset(struct pp_hwmgr *hwmgr, in get_vce_clock_info_array_offset()
84 static uint16_t get_vce_clock_info_array_size(struct pp_hwmgr *hwmgr, in get_vce_clock_info_array_size()
100 static uint16_t get_vce_clock_voltage_limit_table_offset(struct pp_hwmgr *hwmgr, in get_vce_clock_voltage_limit_table_offset()
113 static uint16_t get_vce_clock_voltage_limit_table_size(struct pp_hwmgr *hwmgr, in get_vce_clock_voltage_limit_table_size()
128 static uint16_t get_vce_state_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE … in get_vce_state_table_offset()
139 struct pp_hwmgr *hwmgr, in get_vce_state_table()
150 static uint16_t get_uvd_table_offset(struct pp_hwmgr *hwmgr, in get_uvd_table_offset()
172 static uint16_t get_uvd_clock_info_array_offset(struct pp_hwmgr *hwmgr, in get_uvd_clock_info_array_offset()
183 static uint16_t get_uvd_clock_info_array_size(struct pp_hwmgr *hwmgr, in get_uvd_clock_info_array_size()
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| D | cz_clockpowergating.c | 42 int cz_phm_set_asic_block_gating(struct pp_hwmgr *hwmgr, enum PHM_AsicBlock block, enum PHM_ClockGa… in cz_phm_set_asic_block_gating()
65 bool cz_phm_is_safe_for_asic_block(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, e… in cz_phm_is_safe_for_asic_block()
71 int cz_phm_enable_disable_gfx_power_gating(struct pp_hwmgr *hwmgr, bool enable) in cz_phm_enable_disable_gfx_power_gating()
76 int cz_phm_smu_power_up_down_pcie(struct pp_hwmgr *hwmgr, uint32_t target, bool up, uint32_t args) in cz_phm_smu_power_up_down_pcie()
82 int cz_phm_initialize_display_phy_access(struct pp_hwmgr *hwmgr, bool initialize, bool accesshw) in cz_phm_initialize_display_phy_access()
88 int cz_phm_get_display_phy_access_info(struct pp_hwmgr *hwmgr) in cz_phm_get_display_phy_access_info()
94 int cz_phm_gate_unused_display_phys(struct pp_hwmgr *hwmgr) in cz_phm_gate_unused_display_phys()
100 int cz_phm_ungate_all_display_phys(struct pp_hwmgr *hwmgr) in cz_phm_ungate_all_display_phys()
106 static int cz_tf_uvd_power_gating_initialize(struct pp_hwmgr *hwmgr, void *pInput, void *pOutput, v… in cz_tf_uvd_power_gating_initialize()
111 static int cz_tf_vce_power_gating_initialize(struct pp_hwmgr *hwmgr, void *pInput, void *pOutput, v… in cz_tf_vce_power_gating_initialize()
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| D | process_pptables_v1_0.c | 40 static void set_hw_cap(struct pp_hwmgr *hwmgr, bool setIt, enum phm_platform_caps cap) in set_hw_cap()
55 static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps) in set_platform_caps()
134 const void *get_powerplay_table(struct pp_hwmgr *hwmgr) in get_powerplay_table()
154 struct pp_hwmgr *hwmgr, in get_vddc_lookup_table()
206 struct pp_hwmgr *hwmgr, in get_platform_power_management_table()
249 struct pp_hwmgr *hwmgr, in init_dpm_2_parameters()
318 struct pp_hwmgr *hwmgr, in get_valid_clk()
354 struct pp_hwmgr *hwmgr, in get_hard_limits()
372 struct pp_hwmgr *hwmgr, in get_mclk_voltage_dependency_table()
417 struct pp_hwmgr *hwmgr, in get_sclk_voltage_dependency_table()
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| D | hwmgr.c | 54 struct pp_hwmgr *hwmgr; in hwmgr_init() local
116 int hwmgr_fini(struct pp_hwmgr *hwmgr) in hwmgr_fini()
137 int hw_init_power_state_table(struct pp_hwmgr *hwmgr) in hw_init_power_state_table()
195 int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index, in phm_wait_on_register()
225 void phm_wait_on_indirect_register(struct pp_hwmgr *hwmgr, in phm_wait_on_indirect_register()
242 bool phm_cf_want_uvd_power_gating(struct pp_hwmgr *hwmgr) in phm_cf_want_uvd_power_gating()
247 bool phm_cf_want_vce_power_gating(struct pp_hwmgr *hwmgr) in phm_cf_want_vce_power_gating()
510 int phm_get_sclk_for_voltage_evv(struct pp_hwmgr *hwmgr, in phm_get_sclk_for_voltage_evv()
543 int phm_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr) in phm_initializa_dynamic_state_adjustment_rule_settings()
574 int phm_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) in phm_hwmgr_backend_fini()
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| D | smu7_powertune.c | 380 static int smu7_enable_didt(struct pp_hwmgr *hwmgr, const bool enable) in smu7_enable_didt()
429 static int smu7_program_pt_config_registers(struct pp_hwmgr *hwmgr, in smu7_program_pt_config_registers()
490 int smu7_enable_didt_config(struct pp_hwmgr *hwmgr) in smu7_enable_didt_config()
542 int smu7_disable_didt_config(struct pp_hwmgr *hwmgr) in smu7_disable_didt_config()
560 int smu7_enable_smc_cac(struct pp_hwmgr *hwmgr) in smu7_enable_smc_cac()
578 int smu7_disable_smc_cac(struct pp_hwmgr *hwmgr) in smu7_disable_smc_cac()
595 int smu7_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n) in smu7_set_power_limit()
612 int smu7_enable_power_containment(struct pp_hwmgr *hwmgr) in smu7_enable_power_containment()
660 int smu7_disable_power_containment(struct pp_hwmgr *hwmgr) in smu7_disable_power_containment()
702 int smu7_power_control_set_level(struct pp_hwmgr *hwmgr) in smu7_power_control_set_level()
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| D | ppatomctrl.c | 133 struct pp_hwmgr *hwmgr, in atomctrl_initialize_mc_reg_table()
173 struct pp_hwmgr *hwmgr, in atomctrl_set_engine_dram_timings_rv770()
245 struct pp_hwmgr *hwmgr, in atomctrl_get_memory_pll_dividers_si()
295 int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr, in atomctrl_get_memory_pll_dividers_vi()
314 int atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr, in atomctrl_get_engine_pll_dividers_kong()
337 struct pp_hwmgr *hwmgr, in atomctrl_get_engine_pll_dividers_vi()
374 int atomctrl_get_engine_pll_dividers_ai(struct pp_hwmgr *hwmgr, in atomctrl_get_engine_pll_dividers_ai()
406 struct pp_hwmgr *hwmgr, in atomctrl_get_dfs_pll_dividers_vi()
447 uint32_t atomctrl_get_reference_clock(struct pp_hwmgr *hwmgr) in atomctrl_get_reference_clock()
474 struct pp_hwmgr *hwmgr, in atomctrl_is_voltage_controled_by_gpio_v3()
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| D | functiontables.c | 28 static int phm_run_table(struct pp_hwmgr *hwmgr, in phm_run_table()
58 int phm_dispatch_table(struct pp_hwmgr *hwmgr, in phm_dispatch_table()
87 int phm_construct_table(struct pp_hwmgr *hwmgr, in phm_construct_table()
143 int phm_destroy_table(struct pp_hwmgr *hwmgr, in phm_destroy_table()
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| /drivers/gpu/drm/amd/powerplay/ |
| D | amd_powerplay.c | 41 #define PP_CHECK_HW(hwmgr) \ argument
55 struct pp_hwmgr *hwmgr; in pp_sw_init() local
93 struct pp_hwmgr *hwmgr; in pp_sw_fini() local
196 struct pp_hwmgr *hwmgr; in amd_set_clockgating_by_smu() local
216 struct pp_hwmgr *hwmgr; in pp_set_powergating_state() local
312 struct pp_hwmgr *hwmgr; in pp_dpm_force_performance_level() local
336 struct pp_hwmgr *hwmgr; in pp_dpm_get_performance_level() local
351 struct pp_hwmgr *hwmgr; in pp_dpm_get_sclk() local
370 struct pp_hwmgr *hwmgr; in pp_dpm_get_mclk() local
389 struct pp_hwmgr *hwmgr; in pp_dpm_powergate_vce() local
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| /drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | fiji_smc.c | 84 static int fiji_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, in fiji_get_dependency_volt_by_clk()
199 static void fiji_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr) in fiji_initialize_power_tune_defaults()
216 static int fiji_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr) in fiji_populate_bapm_parameters_in_dpm_table()
300 static int fiji_populate_svi_load_line(struct pp_hwmgr *hwmgr) in fiji_populate_svi_load_line()
314 static int fiji_populate_tdc_limit(struct pp_hwmgr *hwmgr) in fiji_populate_tdc_limit()
335 static int fiji_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset) in fiji_populate_dw8()
359 static int fiji_populate_temperature_scaler(struct pp_hwmgr *hwmgr) in fiji_populate_temperature_scaler()
371 static int fiji_populate_fuzzy_fan(struct pp_hwmgr *hwmgr) in fiji_populate_fuzzy_fan()
389 static int fiji_populate_gnb_lpml(struct pp_hwmgr *hwmgr) in fiji_populate_gnb_lpml()
401 static int fiji_min_max_vgnb_lpml_id_from_bapm_vddc(struct pp_hwmgr *hwmgr) in fiji_min_max_vgnb_lpml_id_from_bapm_vddc()
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| D | iceland_smc.c | 102 static void iceland_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr) in iceland_initialize_power_tune_defaults()
131 static int iceland_populate_svi_load_line(struct pp_hwmgr *hwmgr) in iceland_populate_svi_load_line()
144 static int iceland_populate_tdc_limit(struct pp_hwmgr *hwmgr) in iceland_populate_tdc_limit()
160 static int iceland_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset) in iceland_populate_dw8()
179 static int iceland_populate_temperature_scaler(struct pp_hwmgr *hwmgr) in iceland_populate_temperature_scaler()
184 static int iceland_populate_gnb_lpml(struct pp_hwmgr *hwmgr) in iceland_populate_gnb_lpml()
196 static int iceland_min_max_vgnb_lpml_id_from_bapm_vddc(struct pp_hwmgr *hwmgr) in iceland_min_max_vgnb_lpml_id_from_bapm_vddc()
201 static int iceland_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr *hwmgr) in iceland_populate_bapm_vddc_base_leakage_sidd()
219 static int iceland_populate_bapm_vddc_vid_sidd(struct pp_hwmgr *hwmgr) in iceland_populate_bapm_vddc_vid_sidd()
245 static int iceland_populate_vddc_vid(struct pp_hwmgr *hwmgr) in iceland_populate_vddc_vid()
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| D | polaris10_smc.c | 77 static int polaris10_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, in polaris10_get_dependency_volt_by_clk()
149 static int polaris10_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr) in polaris10_populate_bapm_parameters_in_dpm_table()
197 static int polaris10_populate_svi_load_line(struct pp_hwmgr *hwmgr) in polaris10_populate_svi_load_line()
210 static int polaris10_populate_tdc_limit(struct pp_hwmgr *hwmgr) in polaris10_populate_tdc_limit()
228 static int polaris10_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset) in polaris10_populate_dw8()
252 static int polaris10_populate_temperature_scaler(struct pp_hwmgr *hwmgr) in polaris10_populate_temperature_scaler()
264 static int polaris10_populate_fuzzy_fan(struct pp_hwmgr *hwmgr) in polaris10_populate_fuzzy_fan()
279 static int polaris10_populate_gnb_lpml(struct pp_hwmgr *hwmgr) in polaris10_populate_gnb_lpml()
291 static int polaris10_min_max_vgnb_lpml_id_from_bapm_vddc(struct pp_hwmgr *hwmgr) in polaris10_min_max_vgnb_lpml_id_from_bapm_vddc()
296 static int polaris10_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr *hwmgr) in polaris10_populate_bapm_vddc_base_leakage_sidd()
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| D | tonga_smc.c | 100 static int tonga_get_dependecy_volt_by_clk(struct pp_hwmgr *hwmgr, in tonga_get_dependecy_volt_by_clk()
164 static int tonga_populate_smc_vddc_table(struct pp_hwmgr *hwmgr, in tonga_populate_smc_vddc_table()
188 static int tonga_populate_smc_vdd_gfx_table(struct pp_hwmgr *hwmgr, in tonga_populate_smc_vdd_gfx_table()
212 static int tonga_populate_smc_vdd_ci_table(struct pp_hwmgr *hwmgr, in tonga_populate_smc_vdd_ci_table()
249 static int tonga_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr, in tonga_populate_smc_mvdd_table()
281 static int tonga_populate_cac_tables(struct pp_hwmgr *hwmgr, in tonga_populate_cac_tables()
344 static int tonga_populate_smc_voltage_tables(struct pp_hwmgr *hwmgr, in tonga_populate_smc_voltage_tables()
377 static int tonga_populate_ulv_level(struct pp_hwmgr *hwmgr, in tonga_populate_ulv_level()
399 static int tonga_populate_ulv_state(struct pp_hwmgr *hwmgr, in tonga_populate_ulv_state()
405 static int tonga_populate_smc_link_level(struct pp_hwmgr *hwmgr, SMU72_Discrete_DpmTable *table) in tonga_populate_smc_link_level()
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| D | smumgr.c | 89 int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr, in smum_thermal_avfs_enable()
98 int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr, in smum_thermal_setup_fan_table()
107 int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr) in smum_update_sclk_threshold()
116 int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type) in smum_update_smc_table()
133 int smum_process_firmware_header(struct pp_hwmgr *hwmgr) in smum_process_firmware_header()
329 int smum_init_smc_table(struct pp_hwmgr *hwmgr) in smum_init_smc_table()
337 int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) in smum_populate_all_graphic_levels()
345 int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr) in smum_populate_all_memory_levels()
354 int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) in smum_initialize_mc_reg_table()
362 bool smum_is_dpm_running(struct pp_hwmgr *hwmgr) in smum_is_dpm_running()
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| /drivers/gpu/drm/amd/powerplay/eventmgr/ |
| D | psm.c | 29 struct pp_hwmgr *hwmgr = eventmgr->hwmgr; in psm_get_ui_state() local
49 struct pp_hwmgr *hwmgr = eventmgr->hwmgr; in psm_get_state_by_classification() local
69 struct pp_hwmgr *hwmgr = eventmgr->hwmgr; in psm_set_states() local
91 struct pp_hwmgr *hwmgr; in psm_adjust_power_state_dynamic() local
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| D | eventtasks.c | 52 struct pp_hwmgr *hwmgr; in pem_task_adjust_power_state() local
392 struct pp_hwmgr *hwmgr = eventmgr->hwmgr; in pem_task_create_user_performance_state() local
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| /drivers/gpu/drm/amd/powerplay/inc/ |
| D | pp_instance.h | 35 struct pp_hwmgr *hwmgr; member
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| D | eventmgr.h | 102 struct pp_hwmgr *hwmgr; member
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| D | hwmgr.h | 756 #define PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \ argument
760 #define PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \ argument
763 #define PHM_WAIT_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \ argument
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