1 /*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9 /*
10 * Handle hardware traps and faults.
11 */
12
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15 #include <linux/context_tracking.h>
16 #include <linux/interrupt.h>
17 #include <linux/kallsyms.h>
18 #include <linux/spinlock.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/kdebug.h>
22 #include <linux/kgdb.h>
23 #include <linux/kernel.h>
24 #include <linux/export.h>
25 #include <linux/ptrace.h>
26 #include <linux/uprobes.h>
27 #include <linux/string.h>
28 #include <linux/delay.h>
29 #include <linux/errno.h>
30 #include <linux/kexec.h>
31 #include <linux/sched.h>
32 #include <linux/timer.h>
33 #include <linux/init.h>
34 #include <linux/bug.h>
35 #include <linux/nmi.h>
36 #include <linux/mm.h>
37 #include <linux/smp.h>
38 #include <linux/io.h>
39
40 #ifdef CONFIG_EISA
41 #include <linux/ioport.h>
42 #include <linux/eisa.h>
43 #endif
44
45 #if defined(CONFIG_EDAC)
46 #include <linux/edac.h>
47 #endif
48
49 #include <asm/kmemcheck.h>
50 #include <asm/stacktrace.h>
51 #include <asm/processor.h>
52 #include <asm/debugreg.h>
53 #include <linux/atomic.h>
54 #include <asm/text-patching.h>
55 #include <asm/ftrace.h>
56 #include <asm/traps.h>
57 #include <asm/desc.h>
58 #include <asm/fpu/internal.h>
59 #include <asm/mce.h>
60 #include <asm/fixmap.h>
61 #include <asm/mach_traps.h>
62 #include <asm/alternative.h>
63 #include <asm/fpu/xstate.h>
64 #include <asm/trace/mpx.h>
65 #include <asm/mpx.h>
66 #include <asm/vm86.h>
67
68 #ifdef CONFIG_X86_64
69 #include <asm/x86_init.h>
70 #include <asm/pgalloc.h>
71 #include <asm/proto.h>
72
73 /* No need to be aligned, but done to keep all IDTs defined the same way. */
74 gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
75 #else
76 #include <asm/processor-flags.h>
77 #include <asm/setup.h>
78 #include <asm/proto.h>
79 #endif
80
81 /* Must be page-aligned because the real IDT is used in a fixmap. */
82 gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
83
84 DECLARE_BITMAP(used_vectors, NR_VECTORS);
85 EXPORT_SYMBOL_GPL(used_vectors);
86
cond_local_irq_enable(struct pt_regs * regs)87 static inline void cond_local_irq_enable(struct pt_regs *regs)
88 {
89 if (regs->flags & X86_EFLAGS_IF)
90 local_irq_enable();
91 }
92
cond_local_irq_disable(struct pt_regs * regs)93 static inline void cond_local_irq_disable(struct pt_regs *regs)
94 {
95 if (regs->flags & X86_EFLAGS_IF)
96 local_irq_disable();
97 }
98
99 /*
100 * In IST context, we explicitly disable preemption. This serves two
101 * purposes: it makes it much less likely that we would accidentally
102 * schedule in IST context and it will force a warning if we somehow
103 * manage to schedule by accident.
104 */
ist_enter(struct pt_regs * regs)105 void ist_enter(struct pt_regs *regs)
106 {
107 if (user_mode(regs)) {
108 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
109 } else {
110 /*
111 * We might have interrupted pretty much anything. In
112 * fact, if we're a machine check, we can even interrupt
113 * NMI processing. We don't want in_nmi() to return true,
114 * but we need to notify RCU.
115 */
116 rcu_nmi_enter();
117 }
118
119 preempt_disable();
120
121 /* This code is a bit fragile. Test it. */
122 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
123 }
124
ist_exit(struct pt_regs * regs)125 void ist_exit(struct pt_regs *regs)
126 {
127 preempt_enable_no_resched();
128
129 if (!user_mode(regs))
130 rcu_nmi_exit();
131 }
132
133 /**
134 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
135 * @regs: regs passed to the IST exception handler
136 *
137 * IST exception handlers normally cannot schedule. As a special
138 * exception, if the exception interrupted userspace code (i.e.
139 * user_mode(regs) would return true) and the exception was not
140 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
141 * begins a non-atomic section within an ist_enter()/ist_exit() region.
142 * Callers are responsible for enabling interrupts themselves inside
143 * the non-atomic section, and callers must call ist_end_non_atomic()
144 * before ist_exit().
145 */
ist_begin_non_atomic(struct pt_regs * regs)146 void ist_begin_non_atomic(struct pt_regs *regs)
147 {
148 BUG_ON(!user_mode(regs));
149
150 /*
151 * Sanity check: we need to be on the normal thread stack. This
152 * will catch asm bugs and any attempt to use ist_preempt_enable
153 * from double_fault.
154 */
155 BUG_ON((unsigned long)(current_top_of_stack() -
156 current_stack_pointer) >= THREAD_SIZE);
157
158 preempt_enable_no_resched();
159 }
160
161 /**
162 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
163 *
164 * Ends a non-atomic section started with ist_begin_non_atomic().
165 */
ist_end_non_atomic(void)166 void ist_end_non_atomic(void)
167 {
168 preempt_disable();
169 }
170
171 static nokprobe_inline int
do_trap_no_signal(struct task_struct * tsk,int trapnr,char * str,struct pt_regs * regs,long error_code)172 do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
173 struct pt_regs *regs, long error_code)
174 {
175 if (v8086_mode(regs)) {
176 /*
177 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
178 * On nmi (interrupt 2), do_trap should not be called.
179 */
180 if (trapnr < X86_TRAP_UD) {
181 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
182 error_code, trapnr))
183 return 0;
184 }
185 return -1;
186 }
187
188 if (!user_mode(regs)) {
189 if (!fixup_exception(regs, trapnr)) {
190 tsk->thread.error_code = error_code;
191 tsk->thread.trap_nr = trapnr;
192 die(str, regs, error_code);
193 }
194 return 0;
195 }
196
197 return -1;
198 }
199
fill_trap_info(struct pt_regs * regs,int signr,int trapnr,siginfo_t * info)200 static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
201 siginfo_t *info)
202 {
203 unsigned long siaddr;
204 int sicode;
205
206 switch (trapnr) {
207 default:
208 return SEND_SIG_PRIV;
209
210 case X86_TRAP_DE:
211 sicode = FPE_INTDIV;
212 siaddr = uprobe_get_trap_addr(regs);
213 break;
214 case X86_TRAP_UD:
215 sicode = ILL_ILLOPN;
216 siaddr = uprobe_get_trap_addr(regs);
217 break;
218 case X86_TRAP_AC:
219 sicode = BUS_ADRALN;
220 siaddr = 0;
221 break;
222 }
223
224 info->si_signo = signr;
225 info->si_errno = 0;
226 info->si_code = sicode;
227 info->si_addr = (void __user *)siaddr;
228 return info;
229 }
230
231 static void
do_trap(int trapnr,int signr,char * str,struct pt_regs * regs,long error_code,siginfo_t * info)232 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
233 long error_code, siginfo_t *info)
234 {
235 struct task_struct *tsk = current;
236
237
238 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
239 return;
240 /*
241 * We want error_code and trap_nr set for userspace faults and
242 * kernelspace faults which result in die(), but not
243 * kernelspace faults which are fixed up. die() gives the
244 * process no chance to handle the signal and notice the
245 * kernel fault information, so that won't result in polluting
246 * the information about previously queued, but not yet
247 * delivered, faults. See also do_general_protection below.
248 */
249 tsk->thread.error_code = error_code;
250 tsk->thread.trap_nr = trapnr;
251
252 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
253 printk_ratelimit()) {
254 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
255 tsk->comm, tsk->pid, str,
256 regs->ip, regs->sp, error_code);
257 print_vma_addr(" in ", regs->ip);
258 pr_cont("\n");
259 }
260
261 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
262 }
263 NOKPROBE_SYMBOL(do_trap);
264
do_error_trap(struct pt_regs * regs,long error_code,char * str,unsigned long trapnr,int signr)265 static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
266 unsigned long trapnr, int signr)
267 {
268 siginfo_t info;
269
270 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
271
272 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
273 NOTIFY_STOP) {
274 cond_local_irq_enable(regs);
275 do_trap(trapnr, signr, str, regs, error_code,
276 fill_trap_info(regs, signr, trapnr, &info));
277 }
278 }
279
280 #define DO_ERROR(trapnr, signr, str, name) \
281 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
282 { \
283 do_error_trap(regs, error_code, str, trapnr, signr); \
284 }
285
286 DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
287 DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
288 DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
289 DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
290 DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
291 DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
292 DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
293 DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
294
295 #ifdef CONFIG_VMAP_STACK
handle_stack_overflow(const char * message,struct pt_regs * regs,unsigned long fault_address)296 __visible void __noreturn handle_stack_overflow(const char *message,
297 struct pt_regs *regs,
298 unsigned long fault_address)
299 {
300 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
301 (void *)fault_address, current->stack,
302 (char *)current->stack + THREAD_SIZE - 1);
303 die(message, regs, 0);
304
305 /* Be absolutely certain we don't return. */
306 panic(message);
307 }
308 #endif
309
310 #ifdef CONFIG_X86_64
311 /* Runs on IST stack */
do_double_fault(struct pt_regs * regs,long error_code)312 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
313 {
314 static const char str[] = "double fault";
315 struct task_struct *tsk = current;
316 #ifdef CONFIG_VMAP_STACK
317 unsigned long cr2;
318 #endif
319
320 #ifdef CONFIG_X86_ESPFIX64
321 extern unsigned char native_irq_return_iret[];
322
323 /*
324 * If IRET takes a non-IST fault on the espfix64 stack, then we
325 * end up promoting it to a doublefault. In that case, modify
326 * the stack to make it look like we just entered the #GP
327 * handler from user space, similar to bad_iret.
328 *
329 * No need for ist_enter here because we don't use RCU.
330 */
331 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
332 regs->cs == __KERNEL_CS &&
333 regs->ip == (unsigned long)native_irq_return_iret)
334 {
335 struct pt_regs *normal_regs = task_pt_regs(current);
336
337 /* Fake a #GP(0) from userspace. */
338 memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
339 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */
340 regs->ip = (unsigned long)general_protection;
341 regs->sp = (unsigned long)&normal_regs->orig_ax;
342
343 return;
344 }
345 #endif
346
347 ist_enter(regs);
348 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
349
350 tsk->thread.error_code = error_code;
351 tsk->thread.trap_nr = X86_TRAP_DF;
352
353 #ifdef CONFIG_VMAP_STACK
354 /*
355 * If we overflow the stack into a guard page, the CPU will fail
356 * to deliver #PF and will send #DF instead. Similarly, if we
357 * take any non-IST exception while too close to the bottom of
358 * the stack, the processor will get a page fault while
359 * delivering the exception and will generate a double fault.
360 *
361 * According to the SDM (footnote in 6.15 under "Interrupt 14 -
362 * Page-Fault Exception (#PF):
363 *
364 * Processors update CR2 whenever a page fault is detected. If a
365 * second page fault occurs while an earlier page fault is being
366 * deliv- ered, the faulting linear address of the second fault will
367 * overwrite the contents of CR2 (replacing the previous
368 * address). These updates to CR2 occur even if the page fault
369 * results in a double fault or occurs during the delivery of a
370 * double fault.
371 *
372 * The logic below has a small possibility of incorrectly diagnosing
373 * some errors as stack overflows. For example, if the IDT or GDT
374 * gets corrupted such that #GP delivery fails due to a bad descriptor
375 * causing #GP and we hit this condition while CR2 coincidentally
376 * points to the stack guard page, we'll think we overflowed the
377 * stack. Given that we're going to panic one way or another
378 * if this happens, this isn't necessarily worth fixing.
379 *
380 * If necessary, we could improve the test by only diagnosing
381 * a stack overflow if the saved RSP points within 47 bytes of
382 * the bottom of the stack: if RSP == tsk_stack + 48 and we
383 * take an exception, the stack is already aligned and there
384 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
385 * possible error code, so a stack overflow would *not* double
386 * fault. With any less space left, exception delivery could
387 * fail, and, as a practical matter, we've overflowed the
388 * stack even if the actual trigger for the double fault was
389 * something else.
390 */
391 cr2 = read_cr2();
392 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
393 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
394 #endif
395
396 #ifdef CONFIG_DOUBLEFAULT
397 df_debug(regs, error_code);
398 #endif
399 /*
400 * This is always a kernel trap and never fixable (and thus must
401 * never return).
402 */
403 for (;;)
404 die(str, regs, error_code);
405 }
406 #endif
407
do_bounds(struct pt_regs * regs,long error_code)408 dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
409 {
410 const struct mpx_bndcsr *bndcsr;
411 siginfo_t *info;
412
413 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
414 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
415 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
416 return;
417 cond_local_irq_enable(regs);
418
419 if (!user_mode(regs))
420 die("bounds", regs, error_code);
421
422 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
423 /* The exception is not from Intel MPX */
424 goto exit_trap;
425 }
426
427 /*
428 * We need to look at BNDSTATUS to resolve this exception.
429 * A NULL here might mean that it is in its 'init state',
430 * which is all zeros which indicates MPX was not
431 * responsible for the exception.
432 */
433 bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);
434 if (!bndcsr)
435 goto exit_trap;
436
437 trace_bounds_exception_mpx(bndcsr);
438 /*
439 * The error code field of the BNDSTATUS register communicates status
440 * information of a bound range exception #BR or operation involving
441 * bound directory.
442 */
443 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
444 case 2: /* Bound directory has invalid entry. */
445 if (mpx_handle_bd_fault())
446 goto exit_trap;
447 break; /* Success, it was handled */
448 case 1: /* Bound violation. */
449 info = mpx_generate_siginfo(regs);
450 if (IS_ERR(info)) {
451 /*
452 * We failed to decode the MPX instruction. Act as if
453 * the exception was not caused by MPX.
454 */
455 goto exit_trap;
456 }
457 /*
458 * Success, we decoded the instruction and retrieved
459 * an 'info' containing the address being accessed
460 * which caused the exception. This information
461 * allows and application to possibly handle the
462 * #BR exception itself.
463 */
464 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
465 kfree(info);
466 break;
467 case 0: /* No exception caused by Intel MPX operations. */
468 goto exit_trap;
469 default:
470 die("bounds", regs, error_code);
471 }
472
473 return;
474
475 exit_trap:
476 /*
477 * This path out is for all the cases where we could not
478 * handle the exception in some way (like allocating a
479 * table or telling userspace about it. We will also end
480 * up here if the kernel has MPX turned off at compile
481 * time..
482 */
483 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
484 }
485
486 dotraplinkage void
do_general_protection(struct pt_regs * regs,long error_code)487 do_general_protection(struct pt_regs *regs, long error_code)
488 {
489 struct task_struct *tsk;
490
491 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
492 cond_local_irq_enable(regs);
493
494 if (v8086_mode(regs)) {
495 local_irq_enable();
496 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
497 return;
498 }
499
500 tsk = current;
501 if (!user_mode(regs)) {
502 if (fixup_exception(regs, X86_TRAP_GP))
503 return;
504
505 tsk->thread.error_code = error_code;
506 tsk->thread.trap_nr = X86_TRAP_GP;
507 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
508 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
509 die("general protection fault", regs, error_code);
510 return;
511 }
512
513 tsk->thread.error_code = error_code;
514 tsk->thread.trap_nr = X86_TRAP_GP;
515
516 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
517 printk_ratelimit()) {
518 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
519 tsk->comm, task_pid_nr(tsk),
520 regs->ip, regs->sp, error_code);
521 print_vma_addr(" in ", regs->ip);
522 pr_cont("\n");
523 }
524
525 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
526 }
527 NOKPROBE_SYMBOL(do_general_protection);
528
do_int3(struct pt_regs * regs,long error_code)529 dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
530 {
531 #ifdef CONFIG_DYNAMIC_FTRACE
532 /*
533 * ftrace must be first, everything else may cause a recursive crash.
534 * See note by declaration of modifying_ftrace_code in ftrace.c
535 */
536 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
537 ftrace_int3_handler(regs))
538 return;
539 #endif
540 if (poke_int3_handler(regs))
541 return;
542
543 /*
544 * Use ist_enter despite the fact that we don't use an IST stack.
545 * We can be called from a kprobe in non-CONTEXT_KERNEL kernel
546 * mode or even during context tracking state changes.
547 *
548 * This means that we can't schedule. That's okay.
549 */
550 ist_enter(regs);
551
552 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
553 #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
554 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
555 SIGTRAP) == NOTIFY_STOP)
556 goto exit;
557 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
558
559 #ifdef CONFIG_KPROBES
560 if (kprobe_int3_handler(regs))
561 goto exit;
562 #endif
563
564 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
565 SIGTRAP) == NOTIFY_STOP)
566 goto exit;
567
568 preempt_disable();
569 cond_local_irq_enable(regs);
570 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
571 cond_local_irq_disable(regs);
572 preempt_enable_no_resched();
573 exit:
574 ist_exit(regs);
575 }
576 NOKPROBE_SYMBOL(do_int3);
577
578 #ifdef CONFIG_X86_64
579 /*
580 * Help handler running on IST stack to switch off the IST stack if the
581 * interrupted code was in user mode. The actual stack switch is done in
582 * entry_64.S
583 */
sync_regs(struct pt_regs * eregs)584 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
585 {
586 struct pt_regs *regs = task_pt_regs(current);
587 *regs = *eregs;
588 return regs;
589 }
590 NOKPROBE_SYMBOL(sync_regs);
591
592 struct bad_iret_stack {
593 void *error_entry_ret;
594 struct pt_regs regs;
595 };
596
597 asmlinkage __visible notrace
fixup_bad_iret(struct bad_iret_stack * s)598 struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
599 {
600 /*
601 * This is called from entry_64.S early in handling a fault
602 * caused by a bad iret to user mode. To handle the fault
603 * correctly, we want move our stack frame to task_pt_regs
604 * and we want to pretend that the exception came from the
605 * iret target.
606 */
607 struct bad_iret_stack *new_stack =
608 container_of(task_pt_regs(current),
609 struct bad_iret_stack, regs);
610
611 /* Copy the IRET target to the new stack. */
612 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
613
614 /* Copy the remainder of the stack from the current stack. */
615 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
616
617 BUG_ON(!user_mode(&new_stack->regs));
618 return new_stack;
619 }
620 NOKPROBE_SYMBOL(fixup_bad_iret);
621 #endif
622
is_sysenter_singlestep(struct pt_regs * regs)623 static bool is_sysenter_singlestep(struct pt_regs *regs)
624 {
625 /*
626 * We don't try for precision here. If we're anywhere in the region of
627 * code that can be single-stepped in the SYSENTER entry path, then
628 * assume that this is a useless single-step trap due to SYSENTER
629 * being invoked with TF set. (We don't know in advance exactly
630 * which instructions will be hit because BTF could plausibly
631 * be set.)
632 */
633 #ifdef CONFIG_X86_32
634 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
635 (unsigned long)__end_SYSENTER_singlestep_region -
636 (unsigned long)__begin_SYSENTER_singlestep_region;
637 #elif defined(CONFIG_IA32_EMULATION)
638 return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
639 (unsigned long)__end_entry_SYSENTER_compat -
640 (unsigned long)entry_SYSENTER_compat;
641 #else
642 return false;
643 #endif
644 }
645
646 /*
647 * Our handling of the processor debug registers is non-trivial.
648 * We do not clear them on entry and exit from the kernel. Therefore
649 * it is possible to get a watchpoint trap here from inside the kernel.
650 * However, the code in ./ptrace.c has ensured that the user can
651 * only set watchpoints on userspace addresses. Therefore the in-kernel
652 * watchpoint trap can only occur in code which is reading/writing
653 * from user space. Such code must not hold kernel locks (since it
654 * can equally take a page fault), therefore it is safe to call
655 * force_sig_info even though that claims and releases locks.
656 *
657 * Code in ./signal.c ensures that the debug control register
658 * is restored before we deliver any signal, and therefore that
659 * user code runs with the correct debug control register even though
660 * we clear it here.
661 *
662 * Being careful here means that we don't have to be as careful in a
663 * lot of more complicated places (task switching can be a bit lazy
664 * about restoring all the debug state, and ptrace doesn't have to
665 * find every occurrence of the TF bit that could be saved away even
666 * by user code)
667 *
668 * May run on IST stack.
669 */
do_debug(struct pt_regs * regs,long error_code)670 dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
671 {
672 struct task_struct *tsk = current;
673 int user_icebp = 0;
674 unsigned long dr6;
675 int si_code;
676
677 ist_enter(regs);
678
679 get_debugreg(dr6, 6);
680 /*
681 * The Intel SDM says:
682 *
683 * Certain debug exceptions may clear bits 0-3. The remaining
684 * contents of the DR6 register are never cleared by the
685 * processor. To avoid confusion in identifying debug
686 * exceptions, debug handlers should clear the register before
687 * returning to the interrupted task.
688 *
689 * Keep it simple: clear DR6 immediately.
690 */
691 set_debugreg(0, 6);
692
693 /* Filter out all the reserved bits which are preset to 1 */
694 dr6 &= ~DR6_RESERVED;
695
696 /*
697 * The SDM says "The processor clears the BTF flag when it
698 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
699 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
700 */
701 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
702
703 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
704 is_sysenter_singlestep(regs))) {
705 dr6 &= ~DR_STEP;
706 if (!dr6)
707 goto exit;
708 /*
709 * else we might have gotten a single-step trap and hit a
710 * watchpoint at the same time, in which case we should fall
711 * through and handle the watchpoint.
712 */
713 }
714
715 /*
716 * If dr6 has no reason to give us about the origin of this trap,
717 * then it's very likely the result of an icebp/int01 trap.
718 * User wants a sigtrap for that.
719 */
720 if (!dr6 && user_mode(regs))
721 user_icebp = 1;
722
723 /* Catch kmemcheck conditions! */
724 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
725 goto exit;
726
727 /* Store the virtualized DR6 value */
728 tsk->thread.debugreg6 = dr6;
729
730 #ifdef CONFIG_KPROBES
731 if (kprobe_debug_handler(regs))
732 goto exit;
733 #endif
734
735 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
736 SIGTRAP) == NOTIFY_STOP)
737 goto exit;
738
739 /*
740 * Let others (NMI) know that the debug stack is in use
741 * as we may switch to the interrupt stack.
742 */
743 debug_stack_usage_inc();
744
745 /* It's safe to allow irq's after DR6 has been saved */
746 preempt_disable();
747 cond_local_irq_enable(regs);
748
749 if (v8086_mode(regs)) {
750 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
751 X86_TRAP_DB);
752 cond_local_irq_disable(regs);
753 preempt_enable_no_resched();
754 debug_stack_usage_dec();
755 goto exit;
756 }
757
758 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
759 /*
760 * Historical junk that used to handle SYSENTER single-stepping.
761 * This should be unreachable now. If we survive for a while
762 * without anyone hitting this warning, we'll turn this into
763 * an oops.
764 */
765 tsk->thread.debugreg6 &= ~DR_STEP;
766 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
767 regs->flags &= ~X86_EFLAGS_TF;
768 }
769 si_code = get_si_code(tsk->thread.debugreg6);
770 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
771 send_sigtrap(tsk, regs, error_code, si_code);
772 cond_local_irq_disable(regs);
773 preempt_enable_no_resched();
774 debug_stack_usage_dec();
775
776 exit:
777 #if defined(CONFIG_X86_32)
778 /*
779 * This is the most likely code path that involves non-trivial use
780 * of the SYSENTER stack. Check that we haven't overrun it.
781 */
782 WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC,
783 "Overran or corrupted SYSENTER stack\n");
784 #endif
785 ist_exit(regs);
786 }
787 NOKPROBE_SYMBOL(do_debug);
788
789 /*
790 * Note that we play around with the 'TS' bit in an attempt to get
791 * the correct behaviour even in the presence of the asynchronous
792 * IRQ13 behaviour
793 */
math_error(struct pt_regs * regs,int error_code,int trapnr)794 static void math_error(struct pt_regs *regs, int error_code, int trapnr)
795 {
796 struct task_struct *task = current;
797 struct fpu *fpu = &task->thread.fpu;
798 siginfo_t info;
799 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
800 "simd exception";
801
802 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
803 return;
804 cond_local_irq_enable(regs);
805
806 if (!user_mode(regs)) {
807 if (!fixup_exception(regs, trapnr)) {
808 task->thread.error_code = error_code;
809 task->thread.trap_nr = trapnr;
810 die(str, regs, error_code);
811 }
812 return;
813 }
814
815 /*
816 * Save the info for the exception handler and clear the error.
817 */
818 fpu__save(fpu);
819
820 task->thread.trap_nr = trapnr;
821 task->thread.error_code = error_code;
822 info.si_signo = SIGFPE;
823 info.si_errno = 0;
824 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
825
826 info.si_code = fpu__exception_code(fpu, trapnr);
827
828 /* Retry when we get spurious exceptions: */
829 if (!info.si_code)
830 return;
831
832 force_sig_info(SIGFPE, &info, task);
833 }
834
do_coprocessor_error(struct pt_regs * regs,long error_code)835 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
836 {
837 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
838 math_error(regs, error_code, X86_TRAP_MF);
839 }
840
841 dotraplinkage void
do_simd_coprocessor_error(struct pt_regs * regs,long error_code)842 do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
843 {
844 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
845 math_error(regs, error_code, X86_TRAP_XF);
846 }
847
848 dotraplinkage void
do_spurious_interrupt_bug(struct pt_regs * regs,long error_code)849 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
850 {
851 cond_local_irq_enable(regs);
852 }
853
854 dotraplinkage void
do_device_not_available(struct pt_regs * regs,long error_code)855 do_device_not_available(struct pt_regs *regs, long error_code)
856 {
857 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
858
859 #ifdef CONFIG_MATH_EMULATION
860 if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) {
861 struct math_emu_info info = { };
862
863 cond_local_irq_enable(regs);
864
865 info.regs = regs;
866 math_emulate(&info);
867 return;
868 }
869 #endif
870 fpu__restore(¤t->thread.fpu); /* interrupts still off */
871 #ifdef CONFIG_X86_32
872 cond_local_irq_enable(regs);
873 #endif
874 }
875 NOKPROBE_SYMBOL(do_device_not_available);
876
877 #ifdef CONFIG_X86_32
do_iret_error(struct pt_regs * regs,long error_code)878 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
879 {
880 siginfo_t info;
881
882 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
883 local_irq_enable();
884
885 info.si_signo = SIGILL;
886 info.si_errno = 0;
887 info.si_code = ILL_BADSTK;
888 info.si_addr = NULL;
889 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
890 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
891 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
892 &info);
893 }
894 }
895 #endif
896
897 /* Set of traps needed for early debugging. */
early_trap_init(void)898 void __init early_trap_init(void)
899 {
900 /*
901 * Don't use IST to set DEBUG_STACK as it doesn't work until TSS
902 * is ready in cpu_init() <-- trap_init(). Before trap_init(),
903 * CPU runs at ring 0 so it is impossible to hit an invalid
904 * stack. Using the original stack works well enough at this
905 * early stage. DEBUG_STACK will be equipped after cpu_init() in
906 * trap_init().
907 *
908 * We don't need to set trace_idt_table like set_intr_gate(),
909 * since we don't have trace_debug and it will be reset to
910 * 'debug' in trap_init() by set_intr_gate_ist().
911 */
912 set_intr_gate_notrace(X86_TRAP_DB, debug);
913 /* int3 can be called from all */
914 set_system_intr_gate(X86_TRAP_BP, &int3);
915 #ifdef CONFIG_X86_32
916 set_intr_gate(X86_TRAP_PF, page_fault);
917 #endif
918 load_idt(&idt_descr);
919 }
920
early_trap_pf_init(void)921 void __init early_trap_pf_init(void)
922 {
923 #ifdef CONFIG_X86_64
924 set_intr_gate(X86_TRAP_PF, page_fault);
925 #endif
926 }
927
trap_init(void)928 void __init trap_init(void)
929 {
930 int i;
931
932 #ifdef CONFIG_EISA
933 void __iomem *p = early_ioremap(0x0FFFD9, 4);
934
935 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
936 EISA_bus = 1;
937 early_iounmap(p, 4);
938 #endif
939
940 set_intr_gate(X86_TRAP_DE, divide_error);
941 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
942 /* int4 can be called from all */
943 set_system_intr_gate(X86_TRAP_OF, &overflow);
944 set_intr_gate(X86_TRAP_BR, bounds);
945 set_intr_gate(X86_TRAP_UD, invalid_op);
946 set_intr_gate(X86_TRAP_NM, device_not_available);
947 #ifdef CONFIG_X86_32
948 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
949 #else
950 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
951 #endif
952 set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
953 set_intr_gate(X86_TRAP_TS, invalid_TSS);
954 set_intr_gate(X86_TRAP_NP, segment_not_present);
955 set_intr_gate(X86_TRAP_SS, stack_segment);
956 set_intr_gate(X86_TRAP_GP, general_protection);
957 set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
958 set_intr_gate(X86_TRAP_MF, coprocessor_error);
959 set_intr_gate(X86_TRAP_AC, alignment_check);
960 #ifdef CONFIG_X86_MCE
961 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
962 #endif
963 set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
964
965 /* Reserve all the builtin and the syscall vector: */
966 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
967 set_bit(i, used_vectors);
968
969 #ifdef CONFIG_IA32_EMULATION
970 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_compat);
971 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
972 #endif
973
974 #ifdef CONFIG_X86_32
975 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_32);
976 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
977 #endif
978
979 /*
980 * Set the IDT descriptor to a fixed read-only location, so that the
981 * "sidt" instruction will not leak the location of the kernel, and
982 * to defend the IDT against arbitrary memory write vulnerabilities.
983 * It will be reloaded in cpu_init() */
984 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
985 idt_descr.address = fix_to_virt(FIX_RO_IDT);
986
987 /*
988 * Should be a barrier for any external CPU state:
989 */
990 cpu_init();
991
992 /*
993 * X86_TRAP_DB was installed in early_trap_init(). However,
994 * IST works only after cpu_init() loads TSS. See comments
995 * in early_trap_init().
996 */
997 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
998
999 x86_init.irqs.trap_init();
1000
1001 #ifdef CONFIG_X86_64
1002 memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
1003 set_nmi_gate(X86_TRAP_DB, &debug);
1004 #endif
1005 }
1006