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1 /*
2  * Intel SKL IPC Support
3  *
4  * Copyright (C) 2014-15, Intel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as version 2, as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * General Public License for more details.
14  */
15 
16 #ifndef __SKL_IPC_H
17 #define __SKL_IPC_H
18 
19 #include <linux/kthread.h>
20 #include <linux/irqreturn.h>
21 #include "../common/sst-ipc.h"
22 
23 struct sst_dsp;
24 struct skl_sst;
25 struct sst_generic_ipc;
26 
27 enum skl_ipc_pipeline_state {
28 	PPL_INVALID_STATE =	0,
29 	PPL_UNINITIALIZED =	1,
30 	PPL_RESET =		2,
31 	PPL_PAUSED =		3,
32 	PPL_RUNNING =		4,
33 	PPL_ERROR_STOP =	5,
34 	PPL_SAVED =		6,
35 	PPL_RESTORED =		7
36 };
37 
38 struct skl_ipc_dxstate_info {
39 	u32 core_mask;
40 	u32 dx_mask;
41 };
42 
43 struct skl_ipc_header {
44 	u32 primary;
45 	u32 extension;
46 };
47 
48 #define SKL_DSP_CORES_MAX  2
49 
50 struct skl_dsp_cores {
51 	unsigned int count;
52 	enum skl_dsp_states state[SKL_DSP_CORES_MAX];
53 	int usage_count[SKL_DSP_CORES_MAX];
54 };
55 
56 struct skl_sst {
57 	struct device *dev;
58 	struct sst_dsp *dsp;
59 
60 	/* boot */
61 	wait_queue_head_t boot_wait;
62 	bool boot_complete;
63 
64 	/* IPC messaging */
65 	struct sst_generic_ipc ipc;
66 
67 	/* callback for miscbdge */
68 	void (*enable_miscbdcge)(struct device *dev, bool enable);
69 	/* Is CGCTL.MISCBDCGE disabled */
70 	bool miscbdcg_disabled;
71 
72 	/* Populate module information */
73 	struct list_head uuid_list;
74 
75 	/* Is firmware loaded */
76 	bool fw_loaded;
77 
78 	/* first boot ? */
79 	bool is_first_boot;
80 
81 	/* multi-core */
82 	struct skl_dsp_cores cores;
83 
84 	/* tplg manifest */
85 	struct skl_dfw_manifest manifest;
86 };
87 
88 struct skl_ipc_init_instance_msg {
89 	u32 module_id;
90 	u32 instance_id;
91 	u16 param_data_size;
92 	u8 ppl_instance_id;
93 	u8 core_id;
94 	u8 domain;
95 };
96 
97 struct skl_ipc_bind_unbind_msg {
98 	u32 module_id;
99 	u32 instance_id;
100 	u32 dst_module_id;
101 	u32 dst_instance_id;
102 	u8 src_queue;
103 	u8 dst_queue;
104 	bool bind;
105 };
106 
107 struct skl_ipc_large_config_msg {
108 	u32 module_id;
109 	u32 instance_id;
110 	u32 large_param_id;
111 	u32 param_data_size;
112 };
113 
114 #define SKL_IPC_BOOT_MSECS		3000
115 
116 #define SKL_IPC_D3_MASK	0
117 #define SKL_IPC_D0_MASK	3
118 
119 irqreturn_t skl_dsp_irq_thread_handler(int irq, void *context);
120 
121 int skl_ipc_create_pipeline(struct sst_generic_ipc *sst_ipc,
122 		u16 ppl_mem_size, u8 ppl_type, u8 instance_id);
123 
124 int skl_ipc_delete_pipeline(struct sst_generic_ipc *sst_ipc, u8 instance_id);
125 
126 int skl_ipc_set_pipeline_state(struct sst_generic_ipc *sst_ipc,
127 		u8 instance_id,	enum skl_ipc_pipeline_state state);
128 
129 int skl_ipc_save_pipeline(struct sst_generic_ipc *ipc,
130 		u8 instance_id, int dma_id);
131 
132 int skl_ipc_restore_pipeline(struct sst_generic_ipc *ipc, u8 instance_id);
133 
134 int skl_ipc_init_instance(struct sst_generic_ipc *sst_ipc,
135 		struct skl_ipc_init_instance_msg *msg, void *param_data);
136 
137 int skl_ipc_bind_unbind(struct sst_generic_ipc *sst_ipc,
138 		struct skl_ipc_bind_unbind_msg *msg);
139 
140 int skl_ipc_load_modules(struct sst_generic_ipc *ipc,
141 				u8 module_cnt, void *data);
142 
143 int skl_ipc_unload_modules(struct sst_generic_ipc *ipc,
144 				u8 module_cnt, void *data);
145 
146 int skl_ipc_set_dx(struct sst_generic_ipc *ipc,
147 		u8 instance_id, u16 module_id, struct skl_ipc_dxstate_info *dx);
148 
149 int skl_ipc_set_large_config(struct sst_generic_ipc *ipc,
150 		struct skl_ipc_large_config_msg *msg, u32 *param);
151 
152 int skl_ipc_get_large_config(struct sst_generic_ipc *ipc,
153 		struct skl_ipc_large_config_msg *msg, u32 *param);
154 
155 int skl_sst_ipc_load_library(struct sst_generic_ipc *ipc,
156 			u8 dma_id, u8 table_id);
157 
158 void skl_ipc_int_enable(struct sst_dsp *dsp);
159 void skl_ipc_op_int_enable(struct sst_dsp *ctx);
160 void skl_ipc_op_int_disable(struct sst_dsp *ctx);
161 void skl_ipc_int_disable(struct sst_dsp *dsp);
162 
163 bool skl_ipc_int_status(struct sst_dsp *dsp);
164 void skl_ipc_free(struct sst_generic_ipc *ipc);
165 int skl_ipc_init(struct device *dev, struct skl_sst *skl);
166 void skl_clear_module_cnt(struct sst_dsp *ctx);
167 
168 #endif /* __SKL_IPC_H */
169