1 #ifndef _ASM_X86_PARAVIRT_TYPES_H 2 #define _ASM_X86_PARAVIRT_TYPES_H 3 4 /* Bitmask of what can be clobbered: usually at least eax. */ 5 #define CLBR_NONE 0 6 #define CLBR_EAX (1 << 0) 7 #define CLBR_ECX (1 << 1) 8 #define CLBR_EDX (1 << 2) 9 #define CLBR_EDI (1 << 3) 10 11 #ifdef CONFIG_X86_32 12 /* CLBR_ANY should match all regs platform has. For i386, that's just it */ 13 #define CLBR_ANY ((1 << 4) - 1) 14 15 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX) 16 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX) 17 #define CLBR_SCRATCH (0) 18 #else 19 #define CLBR_RAX CLBR_EAX 20 #define CLBR_RCX CLBR_ECX 21 #define CLBR_RDX CLBR_EDX 22 #define CLBR_RDI CLBR_EDI 23 #define CLBR_RSI (1 << 4) 24 #define CLBR_R8 (1 << 5) 25 #define CLBR_R9 (1 << 6) 26 #define CLBR_R10 (1 << 7) 27 #define CLBR_R11 (1 << 8) 28 29 #define CLBR_ANY ((1 << 9) - 1) 30 31 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \ 32 CLBR_RCX | CLBR_R8 | CLBR_R9) 33 #define CLBR_RET_REG (CLBR_RAX) 34 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11) 35 36 #endif /* X86_64 */ 37 38 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG) 39 40 #ifndef __ASSEMBLY__ 41 42 #include <asm/desc_defs.h> 43 #include <asm/kmap_types.h> 44 #include <asm/pgtable_types.h> 45 #include <asm/nospec-branch.h> 46 47 struct page; 48 struct thread_struct; 49 struct desc_ptr; 50 struct tss_struct; 51 struct mm_struct; 52 struct desc_struct; 53 struct task_struct; 54 struct cpumask; 55 56 /* 57 * Wrapper type for pointers to code which uses the non-standard 58 * calling convention. See PV_CALL_SAVE_REGS_THUNK below. 59 */ 60 struct paravirt_callee_save { 61 void *func; 62 }; 63 64 /* general info */ 65 struct pv_info { 66 unsigned int kernel_rpl; 67 int shared_kernel_pmd; 68 69 #ifdef CONFIG_X86_64 70 u16 extra_user_64bit_cs; /* __USER_CS if none */ 71 #endif 72 73 const char *name; 74 }; 75 76 struct pv_init_ops { 77 /* 78 * Patch may replace one of the defined code sequences with 79 * arbitrary code, subject to the same register constraints. 80 * This generally means the code is not free to clobber any 81 * registers other than EAX. The patch function should return 82 * the number of bytes of code generated, as we nop pad the 83 * rest in generic code. 84 */ 85 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf, 86 unsigned long addr, unsigned len); 87 }; 88 89 90 struct pv_lazy_ops { 91 /* Set deferred update mode, used for batching operations. */ 92 void (*enter)(void); 93 void (*leave)(void); 94 void (*flush)(void); 95 }; 96 97 struct pv_time_ops { 98 unsigned long long (*sched_clock)(void); 99 unsigned long long (*steal_clock)(int cpu); 100 }; 101 102 struct pv_cpu_ops { 103 /* hooks for various privileged instructions */ 104 unsigned long (*get_debugreg)(int regno); 105 void (*set_debugreg)(int regno, unsigned long value); 106 107 void (*clts)(void); 108 109 unsigned long (*read_cr0)(void); 110 void (*write_cr0)(unsigned long); 111 112 unsigned long (*read_cr4)(void); 113 void (*write_cr4)(unsigned long); 114 115 #ifdef CONFIG_X86_64 116 unsigned long (*read_cr8)(void); 117 void (*write_cr8)(unsigned long); 118 #endif 119 120 /* Segment descriptor handling */ 121 void (*load_tr_desc)(void); 122 void (*load_gdt)(const struct desc_ptr *); 123 void (*load_idt)(const struct desc_ptr *); 124 /* store_gdt has been removed. */ 125 void (*store_idt)(struct desc_ptr *); 126 void (*set_ldt)(const void *desc, unsigned entries); 127 unsigned long (*store_tr)(void); 128 void (*load_tls)(struct thread_struct *t, unsigned int cpu); 129 #ifdef CONFIG_X86_64 130 void (*load_gs_index)(unsigned int idx); 131 #endif 132 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, 133 const void *desc); 134 void (*write_gdt_entry)(struct desc_struct *, 135 int entrynum, const void *desc, int size); 136 void (*write_idt_entry)(gate_desc *, 137 int entrynum, const gate_desc *gate); 138 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries); 139 void (*free_ldt)(struct desc_struct *ldt, unsigned entries); 140 141 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t); 142 143 void (*set_iopl_mask)(unsigned mask); 144 145 void (*wbinvd)(void); 146 void (*io_delay)(void); 147 148 /* cpuid emulation, mostly so that caps bits can be disabled */ 149 void (*cpuid)(unsigned int *eax, unsigned int *ebx, 150 unsigned int *ecx, unsigned int *edx); 151 152 /* Unsafe MSR operations. These will warn or panic on failure. */ 153 u64 (*read_msr)(unsigned int msr); 154 void (*write_msr)(unsigned int msr, unsigned low, unsigned high); 155 156 /* 157 * Safe MSR operations. 158 * read sets err to 0 or -EIO. write returns 0 or -EIO. 159 */ 160 u64 (*read_msr_safe)(unsigned int msr, int *err); 161 int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high); 162 163 u64 (*read_pmc)(int counter); 164 165 /* 166 * Switch to usermode gs and return to 64-bit usermode using 167 * sysret. Only used in 64-bit kernels to return to 64-bit 168 * processes. Usermode register state, including %rsp, must 169 * already be restored. 170 */ 171 void (*usergs_sysret64)(void); 172 173 /* Normal iret. Jump to this with the standard iret stack 174 frame set up. */ 175 void (*iret)(void); 176 177 void (*swapgs)(void); 178 179 void (*start_context_switch)(struct task_struct *prev); 180 void (*end_context_switch)(struct task_struct *next); 181 }; 182 183 struct pv_irq_ops { 184 /* 185 * Get/set interrupt state. save_fl and restore_fl are only 186 * expected to use X86_EFLAGS_IF; all other bits 187 * returned from save_fl are undefined, and may be ignored by 188 * restore_fl. 189 * 190 * NOTE: These functions callers expect the callee to preserve 191 * more registers than the standard C calling convention. 192 */ 193 struct paravirt_callee_save save_fl; 194 struct paravirt_callee_save restore_fl; 195 struct paravirt_callee_save irq_disable; 196 struct paravirt_callee_save irq_enable; 197 198 void (*safe_halt)(void); 199 void (*halt)(void); 200 201 #ifdef CONFIG_X86_64 202 void (*adjust_exception_frame)(void); 203 #endif 204 }; 205 206 struct pv_mmu_ops { 207 unsigned long (*read_cr2)(void); 208 void (*write_cr2)(unsigned long); 209 210 unsigned long (*read_cr3)(void); 211 void (*write_cr3)(unsigned long); 212 213 /* 214 * Hooks for intercepting the creation/use/destruction of an 215 * mm_struct. 216 */ 217 void (*activate_mm)(struct mm_struct *prev, 218 struct mm_struct *next); 219 void (*dup_mmap)(struct mm_struct *oldmm, 220 struct mm_struct *mm); 221 void (*exit_mmap)(struct mm_struct *mm); 222 223 224 /* TLB operations */ 225 void (*flush_tlb_user)(void); 226 void (*flush_tlb_kernel)(void); 227 void (*flush_tlb_single)(unsigned long addr); 228 void (*flush_tlb_others)(const struct cpumask *cpus, 229 struct mm_struct *mm, 230 unsigned long start, 231 unsigned long end); 232 233 /* Hooks for allocating and freeing a pagetable top-level */ 234 int (*pgd_alloc)(struct mm_struct *mm); 235 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd); 236 237 /* 238 * Hooks for allocating/releasing pagetable pages when they're 239 * attached to a pagetable 240 */ 241 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn); 242 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn); 243 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn); 244 void (*release_pte)(unsigned long pfn); 245 void (*release_pmd)(unsigned long pfn); 246 void (*release_pud)(unsigned long pfn); 247 248 /* Pagetable manipulation functions */ 249 void (*set_pte)(pte_t *ptep, pte_t pteval); 250 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr, 251 pte_t *ptep, pte_t pteval); 252 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); 253 void (*set_pmd_at)(struct mm_struct *mm, unsigned long addr, 254 pmd_t *pmdp, pmd_t pmdval); 255 void (*pte_update)(struct mm_struct *mm, unsigned long addr, 256 pte_t *ptep); 257 258 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr, 259 pte_t *ptep); 260 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr, 261 pte_t *ptep, pte_t pte); 262 263 struct paravirt_callee_save pte_val; 264 struct paravirt_callee_save make_pte; 265 266 struct paravirt_callee_save pgd_val; 267 struct paravirt_callee_save make_pgd; 268 269 #if CONFIG_PGTABLE_LEVELS >= 3 270 #ifdef CONFIG_X86_PAE 271 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); 272 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, 273 pte_t *ptep); 274 void (*pmd_clear)(pmd_t *pmdp); 275 276 #endif /* CONFIG_X86_PAE */ 277 278 void (*set_pud)(pud_t *pudp, pud_t pudval); 279 280 struct paravirt_callee_save pmd_val; 281 struct paravirt_callee_save make_pmd; 282 283 #if CONFIG_PGTABLE_LEVELS == 4 284 struct paravirt_callee_save pud_val; 285 struct paravirt_callee_save make_pud; 286 287 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval); 288 #endif /* CONFIG_PGTABLE_LEVELS == 4 */ 289 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */ 290 291 struct pv_lazy_ops lazy_mode; 292 293 /* dom0 ops */ 294 295 /* Sometimes the physical address is a pfn, and sometimes its 296 an mfn. We can tell which is which from the index. */ 297 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx, 298 phys_addr_t phys, pgprot_t flags); 299 }; 300 301 struct arch_spinlock; 302 #ifdef CONFIG_SMP 303 #include <asm/spinlock_types.h> 304 #endif 305 306 struct qspinlock; 307 308 struct pv_lock_ops { 309 void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); 310 struct paravirt_callee_save queued_spin_unlock; 311 312 void (*wait)(u8 *ptr, u8 val); 313 void (*kick)(int cpu); 314 }; 315 316 /* This contains all the paravirt structures: we get a convenient 317 * number for each function using the offset which we use to indicate 318 * what to patch. */ 319 struct paravirt_patch_template { 320 struct pv_init_ops pv_init_ops; 321 struct pv_time_ops pv_time_ops; 322 struct pv_cpu_ops pv_cpu_ops; 323 struct pv_irq_ops pv_irq_ops; 324 struct pv_mmu_ops pv_mmu_ops; 325 struct pv_lock_ops pv_lock_ops; 326 }; 327 328 extern struct pv_info pv_info; 329 extern struct pv_init_ops pv_init_ops; 330 extern struct pv_time_ops pv_time_ops; 331 extern struct pv_cpu_ops pv_cpu_ops; 332 extern struct pv_irq_ops pv_irq_ops; 333 extern struct pv_mmu_ops pv_mmu_ops; 334 extern struct pv_lock_ops pv_lock_ops; 335 336 #define PARAVIRT_PATCH(x) \ 337 (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) 338 339 #define paravirt_type(op) \ 340 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ 341 [paravirt_opptr] "i" (&(op)) 342 #define paravirt_clobber(clobber) \ 343 [paravirt_clobber] "i" (clobber) 344 345 /* 346 * Generate some code, and mark it as patchable by the 347 * apply_paravirt() alternate instruction patcher. 348 */ 349 #define _paravirt_alt(insn_string, type, clobber) \ 350 "771:\n\t" insn_string "\n" "772:\n" \ 351 ".pushsection .parainstructions,\"a\"\n" \ 352 _ASM_ALIGN "\n" \ 353 _ASM_PTR " 771b\n" \ 354 " .byte " type "\n" \ 355 " .byte 772b-771b\n" \ 356 " .short " clobber "\n" \ 357 ".popsection\n" 358 359 /* Generate patchable code, with the default asm parameters. */ 360 #define paravirt_alt(insn_string) \ 361 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") 362 363 /* Simple instruction patching code. */ 364 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t" 365 366 #define DEF_NATIVE(ops, name, code) \ 367 __visible extern const char start_##ops##_##name[], end_##ops##_##name[]; \ 368 asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, name)) 369 370 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len); 371 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len); 372 unsigned paravirt_patch_call(void *insnbuf, 373 const void *target, u16 tgt_clobbers, 374 unsigned long addr, u16 site_clobbers, 375 unsigned len); 376 unsigned paravirt_patch_jmp(void *insnbuf, const void *target, 377 unsigned long addr, unsigned len); 378 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, 379 unsigned long addr, unsigned len); 380 381 unsigned paravirt_patch_insns(void *insnbuf, unsigned len, 382 const char *start, const char *end); 383 384 unsigned native_patch(u8 type, u16 clobbers, void *ibuf, 385 unsigned long addr, unsigned len); 386 387 int paravirt_disable_iospace(void); 388 389 /* 390 * This generates an indirect call based on the operation type number. 391 * The type number, computed in PARAVIRT_PATCH, is derived from the 392 * offset into the paravirt_patch_template structure, and can therefore be 393 * freely converted back into a structure offset. 394 */ 395 #define PARAVIRT_CALL \ 396 ANNOTATE_RETPOLINE_SAFE \ 397 "call *%c[paravirt_opptr];" 398 399 /* 400 * These macros are intended to wrap calls through one of the paravirt 401 * ops structs, so that they can be later identified and patched at 402 * runtime. 403 * 404 * Normally, a call to a pv_op function is a simple indirect call: 405 * (pv_op_struct.operations)(args...). 406 * 407 * Unfortunately, this is a relatively slow operation for modern CPUs, 408 * because it cannot necessarily determine what the destination 409 * address is. In this case, the address is a runtime constant, so at 410 * the very least we can patch the call to e a simple direct call, or 411 * ideally, patch an inline implementation into the callsite. (Direct 412 * calls are essentially free, because the call and return addresses 413 * are completely predictable.) 414 * 415 * For i386, these macros rely on the standard gcc "regparm(3)" calling 416 * convention, in which the first three arguments are placed in %eax, 417 * %edx, %ecx (in that order), and the remaining arguments are placed 418 * on the stack. All caller-save registers (eax,edx,ecx) are expected 419 * to be modified (either clobbered or used for return values). 420 * X86_64, on the other hand, already specifies a register-based calling 421 * conventions, returning at %rax, with parameteres going on %rdi, %rsi, 422 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any 423 * special handling for dealing with 4 arguments, unlike i386. 424 * However, x86_64 also have to clobber all caller saved registers, which 425 * unfortunately, are quite a bit (r8 - r11) 426 * 427 * The call instruction itself is marked by placing its start address 428 * and size into the .parainstructions section, so that 429 * apply_paravirt() in arch/i386/kernel/alternative.c can do the 430 * appropriate patching under the control of the backend pv_init_ops 431 * implementation. 432 * 433 * Unfortunately there's no way to get gcc to generate the args setup 434 * for the call, and then allow the call itself to be generated by an 435 * inline asm. Because of this, we must do the complete arg setup and 436 * return value handling from within these macros. This is fairly 437 * cumbersome. 438 * 439 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. 440 * It could be extended to more arguments, but there would be little 441 * to be gained from that. For each number of arguments, there are 442 * the two VCALL and CALL variants for void and non-void functions. 443 * 444 * When there is a return value, the invoker of the macro must specify 445 * the return type. The macro then uses sizeof() on that type to 446 * determine whether its a 32 or 64 bit value, and places the return 447 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for 448 * 64-bit). For x86_64 machines, it just returns at %rax regardless of 449 * the return value size. 450 * 451 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments 452 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments 453 * in low,high order 454 * 455 * Small structures are passed and returned in registers. The macro 456 * calling convention can't directly deal with this, so the wrapper 457 * functions must do this. 458 * 459 * These PVOP_* macros are only defined within this header. This 460 * means that all uses must be wrapped in inline functions. This also 461 * makes sure the incoming and outgoing types are always correct. 462 */ 463 #ifdef CONFIG_X86_32 464 #define PVOP_VCALL_ARGS \ 465 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx; 466 467 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 468 469 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x)) 470 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x)) 471 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x)) 472 473 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ 474 "=c" (__ecx) 475 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS 476 477 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx) 478 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 479 480 #define EXTRA_CLOBBERS 481 #define VEXTRA_CLOBBERS 482 #else /* CONFIG_X86_64 */ 483 /* [re]ax isn't an arg, but the return val */ 484 #define PVOP_VCALL_ARGS \ 485 unsigned long __edi = __edi, __esi = __esi, \ 486 __edx = __edx, __ecx = __ecx, __eax = __eax; 487 488 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 489 490 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) 491 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) 492 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x)) 493 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x)) 494 495 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ 496 "=S" (__esi), "=d" (__edx), \ 497 "=c" (__ecx) 498 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) 499 500 /* void functions are still allowed [re]ax for scratch */ 501 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) 502 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 503 504 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" 505 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" 506 #endif /* CONFIG_X86_32 */ 507 508 #ifdef CONFIG_PARAVIRT_DEBUG 509 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL) 510 #else 511 #define PVOP_TEST_NULL(op) ((void)op) 512 #endif 513 514 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \ 515 pre, post, ...) \ 516 ({ \ 517 rettype __ret; \ 518 PVOP_CALL_ARGS; \ 519 PVOP_TEST_NULL(op); \ 520 /* This is 32-bit specific, but is okay in 64-bit */ \ 521 /* since this condition will never hold */ \ 522 if (sizeof(rettype) > sizeof(unsigned long)) { \ 523 asm volatile(pre \ 524 paravirt_alt(PARAVIRT_CALL) \ 525 post \ 526 : call_clbr, ASM_CALL_CONSTRAINT \ 527 : paravirt_type(op), \ 528 paravirt_clobber(clbr), \ 529 ##__VA_ARGS__ \ 530 : "memory", "cc" extra_clbr); \ 531 __ret = (rettype)((((u64)__edx) << 32) | __eax); \ 532 } else { \ 533 asm volatile(pre \ 534 paravirt_alt(PARAVIRT_CALL) \ 535 post \ 536 : call_clbr, ASM_CALL_CONSTRAINT \ 537 : paravirt_type(op), \ 538 paravirt_clobber(clbr), \ 539 ##__VA_ARGS__ \ 540 : "memory", "cc" extra_clbr); \ 541 __ret = (rettype)__eax; \ 542 } \ 543 __ret; \ 544 }) 545 546 #define __PVOP_CALL(rettype, op, pre, post, ...) \ 547 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \ 548 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__) 549 550 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \ 551 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ 552 PVOP_CALLEE_CLOBBERS, , \ 553 pre, post, ##__VA_ARGS__) 554 555 556 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \ 557 ({ \ 558 PVOP_VCALL_ARGS; \ 559 PVOP_TEST_NULL(op); \ 560 asm volatile(pre \ 561 paravirt_alt(PARAVIRT_CALL) \ 562 post \ 563 : call_clbr, ASM_CALL_CONSTRAINT \ 564 : paravirt_type(op), \ 565 paravirt_clobber(clbr), \ 566 ##__VA_ARGS__ \ 567 : "memory", "cc" extra_clbr); \ 568 }) 569 570 #define __PVOP_VCALL(op, pre, post, ...) \ 571 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \ 572 VEXTRA_CLOBBERS, \ 573 pre, post, ##__VA_ARGS__) 574 575 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \ 576 ____PVOP_VCALL(op.func, CLBR_RET_REG, \ 577 PVOP_VCALLEE_CLOBBERS, , \ 578 pre, post, ##__VA_ARGS__) 579 580 581 582 #define PVOP_CALL0(rettype, op) \ 583 __PVOP_CALL(rettype, op, "", "") 584 #define PVOP_VCALL0(op) \ 585 __PVOP_VCALL(op, "", "") 586 587 #define PVOP_CALLEE0(rettype, op) \ 588 __PVOP_CALLEESAVE(rettype, op, "", "") 589 #define PVOP_VCALLEE0(op) \ 590 __PVOP_VCALLEESAVE(op, "", "") 591 592 593 #define PVOP_CALL1(rettype, op, arg1) \ 594 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 595 #define PVOP_VCALL1(op, arg1) \ 596 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1)) 597 598 #define PVOP_CALLEE1(rettype, op, arg1) \ 599 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 600 #define PVOP_VCALLEE1(op, arg1) \ 601 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1)) 602 603 604 #define PVOP_CALL2(rettype, op, arg1, arg2) \ 605 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 606 PVOP_CALL_ARG2(arg2)) 607 #define PVOP_VCALL2(op, arg1, arg2) \ 608 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 609 PVOP_CALL_ARG2(arg2)) 610 611 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \ 612 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 613 PVOP_CALL_ARG2(arg2)) 614 #define PVOP_VCALLEE2(op, arg1, arg2) \ 615 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \ 616 PVOP_CALL_ARG2(arg2)) 617 618 619 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ 620 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 621 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 622 #define PVOP_VCALL3(op, arg1, arg2, arg3) \ 623 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 624 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 625 626 /* This is the only difference in x86_64. We can make it much simpler */ 627 #ifdef CONFIG_X86_32 628 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 629 __PVOP_CALL(rettype, op, \ 630 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 631 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 632 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4))) 633 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 634 __PVOP_VCALL(op, \ 635 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 636 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ 637 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) 638 #else 639 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 640 __PVOP_CALL(rettype, op, "", "", \ 641 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 642 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 643 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 644 __PVOP_VCALL(op, "", "", \ 645 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 646 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 647 #endif 648 649 /* Lazy mode for batching updates / context switch */ 650 enum paravirt_lazy_mode { 651 PARAVIRT_LAZY_NONE, 652 PARAVIRT_LAZY_MMU, 653 PARAVIRT_LAZY_CPU, 654 }; 655 656 enum paravirt_lazy_mode paravirt_get_lazy_mode(void); 657 void paravirt_start_context_switch(struct task_struct *prev); 658 void paravirt_end_context_switch(struct task_struct *next); 659 660 void paravirt_enter_lazy_mmu(void); 661 void paravirt_leave_lazy_mmu(void); 662 void paravirt_flush_lazy_mmu(void); 663 664 void _paravirt_nop(void); 665 u32 _paravirt_ident_32(u32); 666 u64 _paravirt_ident_64(u64); 667 668 #define paravirt_nop ((void *)_paravirt_nop) 669 670 /* These all sit in the .parainstructions section to tell us what to patch. */ 671 struct paravirt_patch_site { 672 u8 *instr; /* original instructions */ 673 u8 instrtype; /* type of this instruction */ 674 u8 len; /* length of original instruction */ 675 u16 clobbers; /* what registers you may clobber */ 676 }; 677 678 extern struct paravirt_patch_site __parainstructions[], 679 __parainstructions_end[]; 680 681 #endif /* __ASSEMBLY__ */ 682 683 #endif /* _ASM_X86_PARAVIRT_TYPES_H */ 684