1 /*
2 * This file is part of wlcore
3 *
4 * Copyright (C) 2011 Texas Instruments Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22 #ifndef __WLCORE_H__
23 #define __WLCORE_H__
24
25 #include <linux/platform_device.h>
26
27 #include "wlcore_i.h"
28 #include "event.h"
29 #include "boot.h"
30
31 /* The maximum number of Tx descriptors in all chip families */
32 #define WLCORE_MAX_TX_DESCRIPTORS 32
33
34 /*
35 * We always allocate this number of mac addresses. If we don't
36 * have enough allocated addresses, the LAA bit is used
37 */
38 #define WLCORE_NUM_MAC_ADDRESSES 3
39
40 /* wl12xx/wl18xx maximum transmission power (in dBm) */
41 #define WLCORE_MAX_TXPWR 25
42
43 /* forward declaration */
44 struct wl1271_tx_hw_descr;
45 enum wl_rx_buf_align;
46 struct wl1271_rx_descriptor;
47
48 struct wlcore_ops {
49 int (*setup)(struct wl1271 *wl);
50 int (*identify_chip)(struct wl1271 *wl);
51 int (*identify_fw)(struct wl1271 *wl);
52 int (*boot)(struct wl1271 *wl);
53 int (*plt_init)(struct wl1271 *wl);
54 int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr,
55 void *buf, size_t len);
56 int (*ack_event)(struct wl1271 *wl);
57 int (*wait_for_event)(struct wl1271 *wl, enum wlcore_wait_event event,
58 bool *timeout);
59 int (*process_mailbox_events)(struct wl1271 *wl);
60 u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks);
61 void (*set_tx_desc_blocks)(struct wl1271 *wl,
62 struct wl1271_tx_hw_descr *desc,
63 u32 blks, u32 spare_blks);
64 void (*set_tx_desc_data_len)(struct wl1271 *wl,
65 struct wl1271_tx_hw_descr *desc,
66 struct sk_buff *skb);
67 enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl,
68 u32 rx_desc);
69 int (*prepare_read)(struct wl1271 *wl, u32 rx_desc, u32 len);
70 u32 (*get_rx_packet_len)(struct wl1271 *wl, void *rx_data,
71 u32 data_len);
72 int (*tx_delayed_compl)(struct wl1271 *wl);
73 void (*tx_immediate_compl)(struct wl1271 *wl);
74 int (*hw_init)(struct wl1271 *wl);
75 int (*init_vif)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
76 void (*convert_fw_status)(struct wl1271 *wl, void *raw_fw_status,
77 struct wl_fw_status *fw_status);
78 u32 (*sta_get_ap_rate_mask)(struct wl1271 *wl,
79 struct wl12xx_vif *wlvif);
80 int (*get_pg_ver)(struct wl1271 *wl, s8 *ver);
81 int (*get_mac)(struct wl1271 *wl);
82 void (*set_tx_desc_csum)(struct wl1271 *wl,
83 struct wl1271_tx_hw_descr *desc,
84 struct sk_buff *skb);
85 void (*set_rx_csum)(struct wl1271 *wl,
86 struct wl1271_rx_descriptor *desc,
87 struct sk_buff *skb);
88 u32 (*ap_get_mimo_wide_rate_mask)(struct wl1271 *wl,
89 struct wl12xx_vif *wlvif);
90 int (*debugfs_init)(struct wl1271 *wl, struct dentry *rootdir);
91 int (*handle_static_data)(struct wl1271 *wl,
92 struct wl1271_static_data *static_data);
93 int (*scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
94 struct cfg80211_scan_request *req);
95 int (*scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
96 int (*sched_scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
97 struct cfg80211_sched_scan_request *req,
98 struct ieee80211_scan_ies *ies);
99 void (*sched_scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
100 int (*get_spare_blocks)(struct wl1271 *wl, bool is_gem);
101 int (*set_key)(struct wl1271 *wl, enum set_key_cmd cmd,
102 struct ieee80211_vif *vif,
103 struct ieee80211_sta *sta,
104 struct ieee80211_key_conf *key_conf);
105 int (*channel_switch)(struct wl1271 *wl,
106 struct wl12xx_vif *wlvif,
107 struct ieee80211_channel_switch *ch_switch);
108 u32 (*pre_pkt_send)(struct wl1271 *wl, u32 buf_offset, u32 last_len);
109 void (*sta_rc_update)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
110 int (*set_peer_cap)(struct wl1271 *wl,
111 struct ieee80211_sta_ht_cap *ht_cap,
112 bool allow_ht_operation,
113 u32 rate_set, u8 hlid);
114 u32 (*convert_hwaddr)(struct wl1271 *wl, u32 hwaddr);
115 bool (*lnk_high_prio)(struct wl1271 *wl, u8 hlid,
116 struct wl1271_link *lnk);
117 bool (*lnk_low_prio)(struct wl1271 *wl, u8 hlid,
118 struct wl1271_link *lnk);
119 int (*interrupt_notify)(struct wl1271 *wl, bool action);
120 int (*rx_ba_filter)(struct wl1271 *wl, bool action);
121 int (*ap_sleep)(struct wl1271 *wl);
122 int (*smart_config_start)(struct wl1271 *wl, u32 group_bitmap);
123 int (*smart_config_stop)(struct wl1271 *wl);
124 int (*smart_config_set_group_key)(struct wl1271 *wl, u16 group_id,
125 u8 key_len, u8 *key);
126 int (*set_cac)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
127 bool start);
128 int (*dfs_master_restart)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
129 };
130
131 enum wlcore_partitions {
132 PART_DOWN,
133 PART_WORK,
134 PART_BOOT,
135 PART_DRPW,
136 PART_TOP_PRCM_ELP_SOC,
137 PART_PHY_INIT,
138
139 PART_TABLE_LEN,
140 };
141
142 struct wlcore_partition {
143 u32 size;
144 u32 start;
145 };
146
147 struct wlcore_partition_set {
148 struct wlcore_partition mem;
149 struct wlcore_partition reg;
150 struct wlcore_partition mem2;
151 struct wlcore_partition mem3;
152 };
153
154 enum wlcore_registers {
155 /* register addresses, used with partition translation */
156 REG_ECPU_CONTROL,
157 REG_INTERRUPT_NO_CLEAR,
158 REG_INTERRUPT_ACK,
159 REG_COMMAND_MAILBOX_PTR,
160 REG_EVENT_MAILBOX_PTR,
161 REG_INTERRUPT_TRIG,
162 REG_INTERRUPT_MASK,
163 REG_PC_ON_RECOVERY,
164 REG_CHIP_ID_B,
165 REG_CMD_MBOX_ADDRESS,
166
167 /* data access memory addresses, used with partition translation */
168 REG_SLV_MEM_DATA,
169 REG_SLV_REG_DATA,
170
171 /* raw data access memory addresses */
172 REG_RAW_FW_STATUS_ADDR,
173
174 REG_TABLE_LEN,
175 };
176
177 struct wl1271_stats {
178 void *fw_stats;
179 unsigned long fw_stats_update;
180 size_t fw_stats_len;
181
182 unsigned int retry_count;
183 unsigned int excessive_retries;
184 };
185
186 struct wl1271 {
187 bool initialized;
188 struct ieee80211_hw *hw;
189 bool mac80211_registered;
190
191 struct device *dev;
192 struct platform_device *pdev;
193
194 void *if_priv;
195
196 struct wl1271_if_operations *if_ops;
197
198 int irq;
199
200 int irq_flags;
201
202 spinlock_t wl_lock;
203
204 enum wlcore_state state;
205 enum wl12xx_fw_type fw_type;
206 bool plt;
207 enum plt_mode plt_mode;
208 u8 fem_manuf;
209 u8 last_vif_count;
210 struct mutex mutex;
211
212 unsigned long flags;
213
214 struct wlcore_partition_set curr_part;
215
216 struct wl1271_chip chip;
217
218 int cmd_box_addr;
219
220 u8 *fw;
221 size_t fw_len;
222 void *nvs;
223 size_t nvs_len;
224
225 s8 hw_pg_ver;
226
227 /* address read from the fuse ROM */
228 u32 fuse_oui_addr;
229 u32 fuse_nic_addr;
230
231 /* we have up to 2 MAC addresses */
232 struct mac_address addresses[WLCORE_NUM_MAC_ADDRESSES];
233 int channel;
234 u8 system_hlid;
235
236 unsigned long links_map[BITS_TO_LONGS(WLCORE_MAX_LINKS)];
237 unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
238 unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
239 unsigned long rate_policies_map[
240 BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)];
241 unsigned long klv_templates_map[
242 BITS_TO_LONGS(WLCORE_MAX_KLV_TEMPLATES)];
243
244 u8 session_ids[WLCORE_MAX_LINKS];
245
246 struct list_head wlvif_list;
247
248 u8 sta_count;
249 u8 ap_count;
250
251 struct wl1271_acx_mem_map *target_mem_map;
252
253 /* Accounting for allocated / available TX blocks on HW */
254 u32 tx_blocks_freed;
255 u32 tx_blocks_available;
256 u32 tx_allocated_blocks;
257 u32 tx_results_count;
258
259 /* Accounting for allocated / available Tx packets in HW */
260 u32 tx_pkts_freed[NUM_TX_QUEUES];
261 u32 tx_allocated_pkts[NUM_TX_QUEUES];
262
263 /* Transmitted TX packets counter for chipset interface */
264 u32 tx_packets_count;
265
266 /* Time-offset between host and chipset clocks */
267 s64 time_offset;
268
269 /* Frames scheduled for transmission, not handled yet */
270 int tx_queue_count[NUM_TX_QUEUES];
271 unsigned long queue_stop_reasons[
272 NUM_TX_QUEUES * WLCORE_NUM_MAC_ADDRESSES];
273
274 /* Frames received, not handled yet by mac80211 */
275 struct sk_buff_head deferred_rx_queue;
276
277 /* Frames sent, not returned yet to mac80211 */
278 struct sk_buff_head deferred_tx_queue;
279
280 struct work_struct tx_work;
281 struct workqueue_struct *freezable_wq;
282
283 /* Pending TX frames */
284 unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)];
285 struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS];
286 int tx_frames_cnt;
287
288 /* FW Rx counter */
289 u32 rx_counter;
290
291 /* Intermediate buffer, used for packet aggregation */
292 u8 *aggr_buf;
293 u32 aggr_buf_size;
294
295 /* Reusable dummy packet template */
296 struct sk_buff *dummy_packet;
297
298 /* Network stack work */
299 struct work_struct netstack_work;
300
301 /* FW log buffer */
302 u8 *fwlog;
303
304 /* Number of valid bytes in the FW log buffer */
305 ssize_t fwlog_size;
306
307 /* FW log end marker */
308 u32 fwlog_end;
309
310 /* FW memory block size */
311 u32 fw_mem_block_size;
312
313 /* Hardware recovery work */
314 struct work_struct recovery_work;
315 bool watchdog_recovery;
316
317 /* Reg domain last configuration */
318 u32 reg_ch_conf_last[2] __aligned(8);
319 /* Reg domain pending configuration */
320 u32 reg_ch_conf_pending[2];
321
322 /* Pointer that holds DMA-friendly block for the mailbox */
323 void *mbox;
324
325 /* The mbox event mask */
326 u32 event_mask;
327 /* events to unmask only when ap interface is up */
328 u32 ap_event_mask;
329
330 /* Mailbox pointers */
331 u32 mbox_size;
332 u32 mbox_ptr[2];
333
334 /* Are we currently scanning */
335 struct wl12xx_vif *scan_wlvif;
336 struct wl1271_scan scan;
337 struct delayed_work scan_complete_work;
338
339 struct ieee80211_vif *roc_vif;
340 struct delayed_work roc_complete_work;
341
342 struct wl12xx_vif *sched_vif;
343
344 /* The current band */
345 enum nl80211_band band;
346
347 struct completion *elp_compl;
348 struct delayed_work elp_work;
349
350 /* in dBm */
351 int power_level;
352
353 struct wl1271_stats stats;
354
355 __le32 *buffer_32;
356 u32 buffer_cmd;
357 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
358
359 void *raw_fw_status;
360 struct wl_fw_status *fw_status;
361 struct wl1271_tx_hw_res_if *tx_res_if;
362
363 /* Current chipset configuration */
364 struct wlcore_conf conf;
365
366 bool sg_enabled;
367
368 bool enable_11a;
369
370 int recovery_count;
371
372 /* Most recently reported noise in dBm */
373 s8 noise;
374
375 /* bands supported by this instance of wl12xx */
376 struct ieee80211_supported_band bands[WLCORE_NUM_BANDS];
377
378 /*
379 * wowlan trigger was configured during suspend.
380 * (currently, only "ANY" trigger is supported)
381 */
382 bool wow_enabled;
383 bool irq_wake_enabled;
384
385 /*
386 * AP-mode - links indexed by HLID. The global and broadcast links
387 * are always active.
388 */
389 struct wl1271_link links[WLCORE_MAX_LINKS];
390
391 /* number of currently active links */
392 int active_link_count;
393
394 /* Fast/slow links bitmap according to FW */
395 unsigned long fw_fast_lnk_map;
396
397 /* AP-mode - a bitmap of links currently in PS mode according to FW */
398 unsigned long ap_fw_ps_map;
399
400 /* AP-mode - a bitmap of links currently in PS mode in mac80211 */
401 unsigned long ap_ps_map;
402
403 /* Quirks of specific hardware revisions */
404 unsigned int quirks;
405
406 /* number of currently active RX BA sessions */
407 int ba_rx_session_count;
408
409 /* Maximum number of supported RX BA sessions */
410 int ba_rx_session_count_max;
411
412 /* AP-mode - number of currently connected stations */
413 int active_sta_count;
414
415 /* Flag determining whether AP should broadcast OFDM-only rates */
416 bool ofdm_only_ap;
417
418 /* last wlvif we transmitted from */
419 struct wl12xx_vif *last_wlvif;
420
421 /* work to fire when Tx is stuck */
422 struct delayed_work tx_watchdog_work;
423
424 struct wlcore_ops *ops;
425 /* pointer to the lower driver partition table */
426 const struct wlcore_partition_set *ptable;
427 /* pointer to the lower driver register table */
428 const int *rtable;
429 /* name of the firmwares to load - for PLT, single role, multi-role */
430 const char *plt_fw_name;
431 const char *sr_fw_name;
432 const char *mr_fw_name;
433
434 u8 scan_templ_id_2_4;
435 u8 scan_templ_id_5;
436 u8 sched_scan_templ_id_2_4;
437 u8 sched_scan_templ_id_5;
438 u8 max_channels_5;
439
440 /* per-chip-family private structure */
441 void *priv;
442
443 /* number of TX descriptors the HW supports. */
444 u32 num_tx_desc;
445 /* number of RX descriptors the HW supports. */
446 u32 num_rx_desc;
447 /* number of links the HW supports */
448 u8 num_links;
449 /* max stations a single AP can support */
450 u8 max_ap_stations;
451
452 /* translate HW Tx rates to standard rate-indices */
453 const u8 **band_rate_to_idx;
454
455 /* size of table for HW rates that can be received from chip */
456 u8 hw_tx_rate_tbl_size;
457
458 /* this HW rate and below are considered HT rates for this chip */
459 u8 hw_min_ht_rate;
460
461 /* HW HT (11n) capabilities */
462 struct ieee80211_sta_ht_cap ht_cap[WLCORE_NUM_BANDS];
463
464 /* the current dfs region */
465 enum nl80211_dfs_regions dfs_region;
466 bool radar_debug_mode;
467
468 /* size of the private FW status data */
469 size_t fw_status_len;
470 size_t fw_status_priv_len;
471
472 /* RX Data filter rule state - enabled/disabled */
473 unsigned long rx_filter_enabled[BITS_TO_LONGS(WL1271_MAX_RX_FILTERS)];
474
475 /* size of the private static data */
476 size_t static_data_priv_len;
477
478 /* the current channel type */
479 enum nl80211_channel_type channel_type;
480
481 /* mutex for protecting the tx_flush function */
482 struct mutex flush_mutex;
483
484 /* sleep auth value currently configured to FW */
485 int sleep_auth;
486
487 /* the number of allocated MAC addresses in this chip */
488 int num_mac_addr;
489
490 /* minimum FW version required for the driver to work in single-role */
491 unsigned int min_sr_fw_ver[NUM_FW_VER];
492
493 /* minimum FW version required for the driver to work in multi-role */
494 unsigned int min_mr_fw_ver[NUM_FW_VER];
495
496 struct completion nvs_loading_complete;
497
498 /* interface combinations supported by the hw */
499 const struct ieee80211_iface_combination *iface_combinations;
500 u8 n_iface_combinations;
501
502 /* dynamic fw traces */
503 u32 dynamic_fw_traces;
504
505 /* time sync zone master */
506 u8 zone_master_mac_addr[ETH_ALEN];
507 };
508
509 int wlcore_probe(struct wl1271 *wl, struct platform_device *pdev);
510 int wlcore_remove(struct platform_device *pdev);
511 struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size, u32 aggr_buf_size,
512 u32 mbox_size);
513 int wlcore_free_hw(struct wl1271 *wl);
514 int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd,
515 struct ieee80211_vif *vif,
516 struct ieee80211_sta *sta,
517 struct ieee80211_key_conf *key_conf);
518 void wlcore_regdomain_config(struct wl1271 *wl);
519 void wlcore_update_inconn_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif,
520 struct wl1271_station *wl_sta, bool in_conn);
521
522 static inline void
wlcore_set_ht_cap(struct wl1271 * wl,enum nl80211_band band,struct ieee80211_sta_ht_cap * ht_cap)523 wlcore_set_ht_cap(struct wl1271 *wl, enum nl80211_band band,
524 struct ieee80211_sta_ht_cap *ht_cap)
525 {
526 memcpy(&wl->ht_cap[band], ht_cap, sizeof(*ht_cap));
527 }
528
529 /* Tell wlcore not to care about this element when checking the version */
530 #define WLCORE_FW_VER_IGNORE -1
531
532 static inline void
wlcore_set_min_fw_ver(struct wl1271 * wl,unsigned int chip,unsigned int iftype_sr,unsigned int major_sr,unsigned int subtype_sr,unsigned int minor_sr,unsigned int iftype_mr,unsigned int major_mr,unsigned int subtype_mr,unsigned int minor_mr)533 wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip,
534 unsigned int iftype_sr, unsigned int major_sr,
535 unsigned int subtype_sr, unsigned int minor_sr,
536 unsigned int iftype_mr, unsigned int major_mr,
537 unsigned int subtype_mr, unsigned int minor_mr)
538 {
539 wl->min_sr_fw_ver[FW_VER_CHIP] = chip;
540 wl->min_sr_fw_ver[FW_VER_IF_TYPE] = iftype_sr;
541 wl->min_sr_fw_ver[FW_VER_MAJOR] = major_sr;
542 wl->min_sr_fw_ver[FW_VER_SUBTYPE] = subtype_sr;
543 wl->min_sr_fw_ver[FW_VER_MINOR] = minor_sr;
544
545 wl->min_mr_fw_ver[FW_VER_CHIP] = chip;
546 wl->min_mr_fw_ver[FW_VER_IF_TYPE] = iftype_mr;
547 wl->min_mr_fw_ver[FW_VER_MAJOR] = major_mr;
548 wl->min_mr_fw_ver[FW_VER_SUBTYPE] = subtype_mr;
549 wl->min_mr_fw_ver[FW_VER_MINOR] = minor_mr;
550 }
551
552 /* Firmware image load chunk size */
553 #define CHUNK_SIZE 16384
554
555 /* Quirks */
556
557 /* Each RX/TX transaction requires an end-of-transaction transfer */
558 #define WLCORE_QUIRK_END_OF_TRANSACTION BIT(0)
559
560 /* the first start_role(sta) sometimes doesn't work on wl12xx */
561 #define WLCORE_QUIRK_START_STA_FAILS BIT(1)
562
563 /* wl127x and SPI don't support SDIO block size alignment */
564 #define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN BIT(2)
565
566 /* means aggregated Rx packets are aligned to a SDIO block */
567 #define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN BIT(3)
568
569 /* Older firmwares did not implement the FW logger over bus feature */
570 #define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED BIT(4)
571
572 /* Older firmwares use an old NVS format */
573 #define WLCORE_QUIRK_LEGACY_NVS BIT(5)
574
575 /* pad only the last frame in the aggregate buffer */
576 #define WLCORE_QUIRK_TX_PAD_LAST_FRAME BIT(7)
577
578 /* extra header space is required for TKIP */
579 #define WLCORE_QUIRK_TKIP_HEADER_SPACE BIT(8)
580
581 /* Some firmwares not support sched scans while connected */
582 #define WLCORE_QUIRK_NO_SCHED_SCAN_WHILE_CONN BIT(9)
583
584 /* separate probe response templates for one-shot and sched scans */
585 #define WLCORE_QUIRK_DUAL_PROBE_TMPL BIT(10)
586
587 /* Firmware requires reg domain configuration for active calibration */
588 #define WLCORE_QUIRK_REGDOMAIN_CONF BIT(11)
589
590 /* The FW only support a zero session id for AP */
591 #define WLCORE_QUIRK_AP_ZERO_SESSION_ID BIT(12)
592
593 /* TODO: move all these common registers and values elsewhere */
594 #define HW_ACCESS_ELP_CTRL_REG 0x1FFFC
595
596 /* ELP register commands */
597 #define ELPCTRL_WAKE_UP 0x1
598 #define ELPCTRL_WAKE_UP_WLAN_READY 0x5
599 #define ELPCTRL_SLEEP 0x0
600 /* ELP WLAN_READY bit */
601 #define ELPCTRL_WLAN_READY 0x2
602
603 /*************************************************************************
604
605 Interrupt Trigger Register (Host -> WiLink)
606
607 **************************************************************************/
608
609 /* Hardware to Embedded CPU Interrupts - first 32-bit register set */
610
611 /*
612 * The host sets this bit to inform the Wlan
613 * FW that a TX packet is in the XFER
614 * Buffer #0.
615 */
616 #define INTR_TRIG_TX_PROC0 BIT(2)
617
618 /*
619 * The host sets this bit to inform the FW
620 * that it read a packet from RX XFER
621 * Buffer #0.
622 */
623 #define INTR_TRIG_RX_PROC0 BIT(3)
624
625 #define INTR_TRIG_DEBUG_ACK BIT(4)
626
627 #define INTR_TRIG_STATE_CHANGED BIT(5)
628
629 /* Hardware to Embedded CPU Interrupts - second 32-bit register set */
630
631 /*
632 * The host sets this bit to inform the FW
633 * that it read a packet from RX XFER
634 * Buffer #1.
635 */
636 #define INTR_TRIG_RX_PROC1 BIT(17)
637
638 /*
639 * The host sets this bit to inform the Wlan
640 * hardware that a TX packet is in the XFER
641 * Buffer #1.
642 */
643 #define INTR_TRIG_TX_PROC1 BIT(18)
644
645 #define ACX_SLV_SOFT_RESET_BIT BIT(1)
646 #define SOFT_RESET_MAX_TIME 1000000
647 #define SOFT_RESET_STALL_TIME 1000
648
649 #define ECPU_CONTROL_HALT 0x00000101
650
651 #define WELP_ARM_COMMAND_VAL 0x4
652
653 #endif /* __WLCORE_H__ */
654