/arch/blackfin/mach-bf561/ |
D | atomic.S | 41 r1 = -L1_CACHE_BYTES; define 42 r1 = r0 & r1; define 95 r1 = 0; define 210 r1 = 1; define 214 r1 = [p1]; define 217 r1 = [p1]; define 227 r1 = 0; define 263 r1 = 1; define 268 r1 = p1; define 285 r1 = p1; define [all …]
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D | secondary.S | 67 r1 = [p5 + (IMEM_CONTROL - COREMMR_BASE)]; define 73 r1 = [p5 + (DMEM_CONTROL - COREMMR_BASE)]; define 89 r1 = [p0 + PDA_DF_DCPLB]; define
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/arch/hexagon/kernel/ |
D | head.S | 85 r1 = sub(r1, r2); define 88 r1 = add(r1, r3); /* + (4M-1) */ define 91 r1 = r25; define 94 r1 = and(r1,r2); define 99 r1 = add(r1,r2) /* r1 = 4MB PTE for the first entry */ define 113 r1 = r25; define 116 r1 = and(r1,r2); /* for huge page */ define 118 r1 = add(r1,r2); define 135 r1 = #VM_TRANS_TYPE_TABLE define 162 r1 = add(r1,r2); define [all …]
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D | vm_ops.S | 58 r1 = #VM_NEWMAP_TYPE_PGTABLES; define
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/arch/blackfin/kernel/ |
D | ftrace-entry.S | 48 r1 = [sp + 16]; /* skip the 4 local regs on stack */ define 64 r1 = [sp++]; define 132 r1 = [sp + 16]; /* skip the 4 local regs on stack */ define 141 r1 = [sp++]; define 167 r1 = rets; /* unsigned long self_addr */ define 170 r1 = [sp]; /* unsigned long self_addr */ define 202 r1 = [sp++]; define
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/arch/arc/include/asm/ |
D | tlb-mmu1.h | 40 asr r0,r1,12 ; get set # <<1, note bit 12=R=0 variable 60 ; lr r1,[ARC_REG_TLBPD0] /* Data VPN+ASID - already in r1 from TLB_RELOAD*/ variable 82 mov_s r3, r1 ; save PD0 prepared by TLB_RELOAD in r3 variable
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/arch/blackfin/mach-common/ |
D | interrupt.S | 86 r1 = 0x3f; define 100 r1 = 0 (x); define 111 r1 = sp; define 224 r1 = retn; define
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D | head.S | 76 r1 = [p5 + (IMEM_CONTROL - COREMMR_BASE)]; define 82 r1 = [p5 + (DMEM_CONTROL - COREMMR_BASE)]; define 98 r1 = [p0 + PDA_DF_DCPLB]; define
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D | entry.S | 592 r1 = [sp + PT_R1]; define 691 r1 = [sp + PT_R1]; define 795 r1 = (EVT_IVG14 | EVT_IVG15) (z); define 891 r1 = LO(~0x8000) (Z); define 892 r1 = r0 & r1; define 975 r1 = 0x17(Z); define 979 r1 = 1; define 980 r1 = r0 - r1; define 1212 r1 = RETX; define
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/arch/blackfin/lib/ |
D | divsi3.S | 47 */ 76 r1 = r3 >> 31; /* add overflow issue back in */ define 78 r1 = -r0; define 138 r1 = r3 >> 31; define 188 r1 = r3 >> 31; define
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/arch/x86/crypto/ |
D | aes-x86_64-asm_64.S | 52 #define prologue(FUNC,KEY,B128,B192,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11) \ argument 73 #define epilogue(FUNC,r1,r2,r3,r4,r5,r6,r7,r8,r9) \ argument 83 #define round(TAB,OFFSET,r1,r2,r3,r4,r5,r6,r7,r8,ra,rb,rc,rd) \ argument 129 #define move_regs(r1,r2,r3,r4) \ argument
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/arch/mips/kernel/ |
D | linux32.c | 57 #define merge_64(r1, r2) ((((r1) & 0xffffffffUL) << 32) + ((r2) & 0xffffffffUL)) argument 60 #define merge_64(r1, r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL)) argument
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/arch/sparc/include/asm/ |
D | sfp-machine_32.h | 78 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument 93 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument 108 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument 133 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
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/arch/powerpc/math-emu/ |
D | udivmodti4.c | 13 _FP_W_TYPE q0, q1, r0, r1; in _fp_udivmodti4() local
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/arch/parisc/lib/ |
D | checksum.c | 65 unsigned int r1, r2, r3, r4; in do_csum() local
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/arch/avr32/include/uapi/asm/ |
D | sigcontext.h | 30 unsigned long r1; member
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/arch/blackfin/include/asm/ |
D | context.S | 193 r1 = sp; define 211 r1 = [p1]; define
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/arch/powerpc/boot/ |
D | ppc_asm.h | 30 #define r1 1 macro
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/arch/cris/include/uapi/asm/ |
D | ptrace_v10.h | 74 unsigned long r1; member 104 unsigned long r1; member
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D | ptrace_v32.h | 60 unsigned long r1; member 97 unsigned long r1; member
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/arch/x86/kernel/ |
D | mmconf-fam10h_64.c | 36 const struct range *r1 = x1; in cmp_range() local
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/arch/tile/include/arch/ |
D | trio_pcie_rc.h | 53 uint_reg_t r1 : 1; member
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/arch/m32r/kernel/ |
D | signal.c | 89 sys_rt_sigreturn(unsigned long r0, unsigned long r1, in sys_rt_sigreturn()
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/arch/cris/include/uapi/arch-v32/arch/ |
D | user.h | 8 unsigned long r1; member
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/arch/parisc/math-emu/ |
D | fpudispatch.c | 290 u_int r1,r2,t; /* operand register offsets */ in decode_0c() local 709 u_int r1,r2,t; /* operand register offsets */ local
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