1 /*
2 * Copyright (c) 2016 MediaTek Inc.
3 * Author: PC Chen <pc.chen@mediatek.com>
4 * Tiffany Lin <tiffany.lin@mediatek.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16 #ifndef _MTK_VCODEC_DRV_H_
17 #define _MTK_VCODEC_DRV_H_
18
19 #include <linux/platform_device.h>
20 #include <linux/videodev2.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-device.h>
23 #include <media/v4l2-ioctl.h>
24 #include <media/videobuf2-core.h>
25
26
27 #define MTK_VCODEC_DRV_NAME "mtk_vcodec_drv"
28 #define MTK_VCODEC_ENC_NAME "mtk-vcodec-enc"
29 #define MTK_PLATFORM_STR "platform:mt8173"
30
31
32 #define MTK_VCODEC_MAX_PLANES 3
33 #define MTK_V4L2_BENCHMARK 0
34 #define WAIT_INTR_TIMEOUT_MS 1000
35
36 /**
37 * enum mtk_hw_reg_idx - MTK hw register base index
38 */
39 enum mtk_hw_reg_idx {
40 VDEC_SYS,
41 VDEC_MISC,
42 VDEC_LD,
43 VDEC_TOP,
44 VDEC_CM,
45 VDEC_AD,
46 VDEC_AV,
47 VDEC_PP,
48 VDEC_HWD,
49 VDEC_HWQ,
50 VDEC_HWB,
51 VDEC_HWG,
52 NUM_MAX_VDEC_REG_BASE,
53 /* h264 encoder */
54 VENC_SYS = NUM_MAX_VDEC_REG_BASE,
55 /* vp8 encoder */
56 VENC_LT_SYS,
57 NUM_MAX_VCODEC_REG_BASE
58 };
59
60 /**
61 * enum mtk_instance_type - The type of an MTK Vcodec instance.
62 */
63 enum mtk_instance_type {
64 MTK_INST_DECODER = 0,
65 MTK_INST_ENCODER = 1,
66 };
67
68 /**
69 * enum mtk_instance_state - The state of an MTK Vcodec instance.
70 * @MTK_STATE_FREE - default state when instance is created
71 * @MTK_STATE_INIT - vcodec instance is initialized
72 * @MTK_STATE_HEADER - vdec had sps/pps header parsed or venc
73 * had sps/pps header encoded
74 * @MTK_STATE_FLUSH - vdec is flushing. Only used by decoder
75 * @MTK_STATE_ABORT - vcodec should be aborted
76 */
77 enum mtk_instance_state {
78 MTK_STATE_FREE = 0,
79 MTK_STATE_INIT = 1,
80 MTK_STATE_HEADER = 2,
81 MTK_STATE_FLUSH = 3,
82 MTK_STATE_ABORT = 4,
83 };
84
85 /**
86 * struct mtk_encode_param - General encoding parameters type
87 */
88 enum mtk_encode_param {
89 MTK_ENCODE_PARAM_NONE = 0,
90 MTK_ENCODE_PARAM_BITRATE = (1 << 0),
91 MTK_ENCODE_PARAM_FRAMERATE = (1 << 1),
92 MTK_ENCODE_PARAM_INTRA_PERIOD = (1 << 2),
93 MTK_ENCODE_PARAM_FORCE_INTRA = (1 << 3),
94 MTK_ENCODE_PARAM_GOP_SIZE = (1 << 4),
95 };
96
97 enum mtk_fmt_type {
98 MTK_FMT_DEC = 0,
99 MTK_FMT_ENC = 1,
100 MTK_FMT_FRAME = 2,
101 };
102
103 /**
104 * struct mtk_video_fmt - Structure used to store information about pixelformats
105 */
106 struct mtk_video_fmt {
107 u32 fourcc;
108 enum mtk_fmt_type type;
109 u32 num_planes;
110 };
111
112 /**
113 * struct mtk_codec_framesizes - Structure used to store information about
114 * framesizes
115 */
116 struct mtk_codec_framesizes {
117 u32 fourcc;
118 struct v4l2_frmsize_stepwise stepwise;
119 };
120
121 /**
122 * struct mtk_q_type - Type of queue
123 */
124 enum mtk_q_type {
125 MTK_Q_DATA_SRC = 0,
126 MTK_Q_DATA_DST = 1,
127 };
128
129 /**
130 * struct mtk_q_data - Structure used to store information about queue
131 */
132 struct mtk_q_data {
133 unsigned int visible_width;
134 unsigned int visible_height;
135 unsigned int coded_width;
136 unsigned int coded_height;
137 enum v4l2_field field;
138 unsigned int bytesperline[MTK_VCODEC_MAX_PLANES];
139 unsigned int sizeimage[MTK_VCODEC_MAX_PLANES];
140 struct mtk_video_fmt *fmt;
141 };
142
143 /**
144 * struct mtk_enc_params - General encoding parameters
145 * @bitrate: target bitrate in bits per second
146 * @num_b_frame: number of b frames between p-frame
147 * @rc_frame: frame based rate control
148 * @rc_mb: macroblock based rate control
149 * @seq_hdr_mode: H.264 sequence header is encoded separately or joined
150 * with the first frame
151 * @intra_period: I frame period
152 * @gop_size: group of picture size, it's used as the intra frame period
153 * @framerate_num: frame rate numerator. ex: framerate_num=30 and
154 * framerate_denom=1 menas FPS is 30
155 * @framerate_denom: frame rate denominator. ex: framerate_num=30 and
156 * framerate_denom=1 menas FPS is 30
157 * @h264_max_qp: Max value for H.264 quantization parameter
158 * @h264_profile: V4L2 defined H.264 profile
159 * @h264_level: V4L2 defined H.264 level
160 * @force_intra: force/insert intra frame
161 */
162 struct mtk_enc_params {
163 unsigned int bitrate;
164 unsigned int num_b_frame;
165 unsigned int rc_frame;
166 unsigned int rc_mb;
167 unsigned int seq_hdr_mode;
168 unsigned int intra_period;
169 unsigned int gop_size;
170 unsigned int framerate_num;
171 unsigned int framerate_denom;
172 unsigned int h264_max_qp;
173 unsigned int h264_profile;
174 unsigned int h264_level;
175 unsigned int force_intra;
176 };
177
178 /**
179 * struct mtk_vcodec_pm - Power management data structure
180 */
181 struct mtk_vcodec_pm {
182 struct clk *vcodecpll;
183 struct clk *univpll_d2;
184 struct clk *clk_cci400_sel;
185 struct clk *vdecpll;
186 struct clk *vdec_sel;
187 struct clk *vencpll_d2;
188 struct clk *venc_sel;
189 struct clk *univpll1_d2;
190 struct clk *venc_lt_sel;
191 struct device *larbvdec;
192 struct device *larbvenc;
193 struct device *larbvenclt;
194 struct device *dev;
195 struct mtk_vcodec_dev *mtkdev;
196 };
197
198 /**
199 * struct mtk_vcodec_ctx - Context (instance) private data.
200 *
201 * @type: type of the instance - decoder or encoder
202 * @dev: pointer to the mtk_vcodec_dev of the device
203 * @list: link to ctx_list of mtk_vcodec_dev
204 * @fh: struct v4l2_fh
205 * @m2m_ctx: pointer to the v4l2_m2m_ctx of the context
206 * @q_data: store information of input and output queue
207 * of the context
208 * @id: index of the context that this structure describes
209 * @state: state of the context
210 * @param_change: indicate encode parameter type
211 * @enc_params: encoding parameters
212 * @enc_if: hoooked encoder driver interface
213 * @drv_handle: driver handle for specific decode/encode instance
214 *
215 * @int_cond: variable used by the waitqueue
216 * @int_type: type of the last interrupt
217 * @queue: waitqueue that can be used to wait for this context to
218 * finish
219 * @irq_status: irq status
220 *
221 * @ctrl_hdl: handler for v4l2 framework
222 * @encode_work: worker for the encoding
223 *
224 * @colorspace: enum v4l2_colorspace; supplemental to pixelformat
225 * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding
226 * @quantization: enum v4l2_quantization, colorspace quantization
227 * @xfer_func: enum v4l2_xfer_func, colorspace transfer function
228 */
229 struct mtk_vcodec_ctx {
230 enum mtk_instance_type type;
231 struct mtk_vcodec_dev *dev;
232 struct list_head list;
233
234 struct v4l2_fh fh;
235 struct v4l2_m2m_ctx *m2m_ctx;
236 struct mtk_q_data q_data[2];
237 int id;
238 enum mtk_instance_state state;
239 enum mtk_encode_param param_change;
240 struct mtk_enc_params enc_params;
241
242 const struct venc_common_if *enc_if;
243 unsigned long drv_handle;
244
245 int int_cond;
246 int int_type;
247 wait_queue_head_t queue;
248 unsigned int irq_status;
249
250 struct v4l2_ctrl_handler ctrl_hdl;
251 struct work_struct encode_work;
252
253 enum v4l2_colorspace colorspace;
254 enum v4l2_ycbcr_encoding ycbcr_enc;
255 enum v4l2_quantization quantization;
256 enum v4l2_xfer_func xfer_func;
257 };
258
259 /**
260 * struct mtk_vcodec_dev - driver data
261 * @v4l2_dev: V4L2 device to register video devices for.
262 * @vfd_enc: Video device for encoder.
263 *
264 * @m2m_dev_enc: m2m device for encoder.
265 * @plat_dev: platform device
266 * @vpu_plat_dev: mtk vpu platform device
267 * @ctx_list: list of struct mtk_vcodec_ctx
268 * @irqlock: protect data access by irq handler and work thread
269 * @curr_ctx: The context that is waiting for codec hardware
270 *
271 * @reg_base: Mapped address of MTK Vcodec registers.
272 *
273 * @id_counter: used to identify current opened instance
274 * @num_instances: counter of active MTK Vcodec instances
275 *
276 * @encode_workqueue: encode work queue
277 *
278 * @int_cond: used to identify interrupt condition happen
279 * @int_type: used to identify what kind of interrupt condition happen
280 * @dev_mutex: video_device lock
281 * @queue: waitqueue for waiting for completion of device commands
282 *
283 * @enc_irq: h264 encoder irq resource
284 * @enc_lt_irq: vp8 encoder irq resource
285 *
286 * @enc_mutex: encoder hardware lock.
287 *
288 * @pm: power management control
289 * @dec_capability: used to identify decode capability, ex: 4k
290 * @enc_capability: used to identify encode capability
291 */
292 struct mtk_vcodec_dev {
293 struct v4l2_device v4l2_dev;
294 struct video_device *vfd_enc;
295
296 struct v4l2_m2m_dev *m2m_dev_enc;
297 struct platform_device *plat_dev;
298 struct platform_device *vpu_plat_dev;
299 struct list_head ctx_list;
300 spinlock_t irqlock;
301 struct mtk_vcodec_ctx *curr_ctx;
302 void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE];
303
304 unsigned long id_counter;
305 int num_instances;
306
307 struct workqueue_struct *encode_workqueue;
308
309 int int_cond;
310 int int_type;
311 struct mutex dev_mutex;
312 wait_queue_head_t queue;
313
314 int enc_irq;
315 int enc_lt_irq;
316
317 struct mutex enc_mutex;
318
319 struct mtk_vcodec_pm pm;
320 unsigned int dec_capability;
321 unsigned int enc_capability;
322 };
323
fh_to_ctx(struct v4l2_fh * fh)324 static inline struct mtk_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh)
325 {
326 return container_of(fh, struct mtk_vcodec_ctx, fh);
327 }
328
ctrl_to_ctx(struct v4l2_ctrl * ctrl)329 static inline struct mtk_vcodec_ctx *ctrl_to_ctx(struct v4l2_ctrl *ctrl)
330 {
331 return container_of(ctrl->handler, struct mtk_vcodec_ctx, ctrl_hdl);
332 }
333
334 #endif /* _MTK_VCODEC_DRV_H_ */
335