1 /*
2 * w1_io.c
3 *
4 * Copyright (c) 2004 Evgeniy Polyakov <zbr@ioremap.net>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #include <asm/io.h>
23
24 #include <linux/delay.h>
25 #include <linux/moduleparam.h>
26 #include <linux/module.h>
27
28 #include "w1.h"
29 #include "w1_log.h"
30
31 static int w1_delay_parm = 1;
32 module_param_named(delay_coef, w1_delay_parm, int, 0);
33
34 static int w1_disable_irqs = 0;
35 module_param_named(disable_irqs, w1_disable_irqs, int, 0);
36
37 static u8 w1_crc8_table[] = {
38 0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65,
39 157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220,
40 35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98,
41 190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255,
42 70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7,
43 219, 133, 103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154,
44 101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36,
45 248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185,
46 140, 210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113, 147, 205,
47 17, 79, 173, 243, 112, 46, 204, 146, 211, 141, 111, 49, 178, 236, 14, 80,
48 175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82, 176, 238,
49 50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115,
50 202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139,
51 87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22,
52 233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168,
53 116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53
54 };
55
w1_delay(unsigned long tm)56 static void w1_delay(unsigned long tm)
57 {
58 udelay(tm * w1_delay_parm);
59 }
60
61 static void w1_write_bit(struct w1_master *dev, int bit);
62 static u8 w1_read_bit(struct w1_master *dev);
63
64 /**
65 * w1_touch_bit() - Generates a write-0 or write-1 cycle and samples the level.
66 * @dev: the master device
67 * @bit: 0 - write a 0, 1 - write a 0 read the level
68 */
w1_touch_bit(struct w1_master * dev,int bit)69 static u8 w1_touch_bit(struct w1_master *dev, int bit)
70 {
71 if (dev->bus_master->touch_bit)
72 return dev->bus_master->touch_bit(dev->bus_master->data, bit);
73 else if (bit)
74 return w1_read_bit(dev);
75 else {
76 w1_write_bit(dev, 0);
77 return 0;
78 }
79 }
80
81 /**
82 * w1_write_bit() - Generates a write-0 or write-1 cycle.
83 * @dev: the master device
84 * @bit: bit to write
85 *
86 * Only call if dev->bus_master->touch_bit is NULL
87 */
w1_write_bit(struct w1_master * dev,int bit)88 static void w1_write_bit(struct w1_master *dev, int bit)
89 {
90 unsigned long flags = 0;
91
92 if(w1_disable_irqs) local_irq_save(flags);
93
94 if (bit) {
95 dev->bus_master->write_bit(dev->bus_master->data, 0);
96 w1_delay(6);
97 dev->bus_master->write_bit(dev->bus_master->data, 1);
98 w1_delay(64);
99 } else {
100 dev->bus_master->write_bit(dev->bus_master->data, 0);
101 w1_delay(60);
102 dev->bus_master->write_bit(dev->bus_master->data, 1);
103 w1_delay(10);
104 }
105
106 if(w1_disable_irqs) local_irq_restore(flags);
107 }
108
109 /**
110 * w1_pre_write() - pre-write operations
111 * @dev: the master device
112 *
113 * Pre-write operation, currently only supporting strong pullups.
114 * Program the hardware for a strong pullup, if one has been requested and
115 * the hardware supports it.
116 */
w1_pre_write(struct w1_master * dev)117 static void w1_pre_write(struct w1_master *dev)
118 {
119 if (dev->pullup_duration &&
120 dev->enable_pullup && dev->bus_master->set_pullup) {
121 dev->bus_master->set_pullup(dev->bus_master->data,
122 dev->pullup_duration);
123 }
124 }
125
126 /**
127 * w1_post_write() - post-write options
128 * @dev: the master device
129 *
130 * Post-write operation, currently only supporting strong pullups.
131 * If a strong pullup was requested, clear it if the hardware supports
132 * them, or execute the delay otherwise, in either case clear the request.
133 */
w1_post_write(struct w1_master * dev)134 static void w1_post_write(struct w1_master *dev)
135 {
136 if (dev->pullup_duration) {
137 if (dev->enable_pullup && dev->bus_master->set_pullup)
138 dev->bus_master->set_pullup(dev->bus_master->data, 0);
139 else
140 msleep(dev->pullup_duration);
141 dev->pullup_duration = 0;
142 }
143 }
144
145 /**
146 * w1_write_8() - Writes 8 bits.
147 * @dev: the master device
148 * @byte: the byte to write
149 */
w1_write_8(struct w1_master * dev,u8 byte)150 void w1_write_8(struct w1_master *dev, u8 byte)
151 {
152 int i;
153
154 if (dev->bus_master->write_byte) {
155 w1_pre_write(dev);
156 dev->bus_master->write_byte(dev->bus_master->data, byte);
157 }
158 else
159 for (i = 0; i < 8; ++i) {
160 if (i == 7)
161 w1_pre_write(dev);
162 w1_touch_bit(dev, (byte >> i) & 0x1);
163 }
164 w1_post_write(dev);
165 }
166 EXPORT_SYMBOL_GPL(w1_write_8);
167
168
169 /**
170 * w1_read_bit() - Generates a write-1 cycle and samples the level.
171 * @dev: the master device
172 *
173 * Only call if dev->bus_master->touch_bit is NULL
174 */
w1_read_bit(struct w1_master * dev)175 static u8 w1_read_bit(struct w1_master *dev)
176 {
177 int result;
178 unsigned long flags = 0;
179
180 /* sample timing is critical here */
181 local_irq_save(flags);
182 dev->bus_master->write_bit(dev->bus_master->data, 0);
183 w1_delay(6);
184 dev->bus_master->write_bit(dev->bus_master->data, 1);
185 w1_delay(9);
186
187 result = dev->bus_master->read_bit(dev->bus_master->data);
188 local_irq_restore(flags);
189
190 w1_delay(55);
191
192 return result & 0x1;
193 }
194
195 /**
196 * w1_triplet() - * Does a triplet - used for searching ROM addresses.
197 * @dev: the master device
198 * @bdir: the bit to write if both id_bit and comp_bit are 0
199 *
200 * Return bits:
201 * bit 0 = id_bit
202 * bit 1 = comp_bit
203 * bit 2 = dir_taken
204 * If both bits 0 & 1 are set, the search should be restarted.
205 *
206 * Return: bit fields - see above
207 */
w1_triplet(struct w1_master * dev,int bdir)208 u8 w1_triplet(struct w1_master *dev, int bdir)
209 {
210 if (dev->bus_master->triplet)
211 return dev->bus_master->triplet(dev->bus_master->data, bdir);
212 else {
213 u8 id_bit = w1_touch_bit(dev, 1);
214 u8 comp_bit = w1_touch_bit(dev, 1);
215 u8 retval;
216
217 if (id_bit && comp_bit)
218 return 0x03; /* error */
219
220 if (!id_bit && !comp_bit) {
221 /* Both bits are valid, take the direction given */
222 retval = bdir ? 0x04 : 0;
223 } else {
224 /* Only one bit is valid, take that direction */
225 bdir = id_bit;
226 retval = id_bit ? 0x05 : 0x02;
227 }
228
229 if (dev->bus_master->touch_bit)
230 w1_touch_bit(dev, bdir);
231 else
232 w1_write_bit(dev, bdir);
233 return retval;
234 }
235 }
236
237 /**
238 * w1_read_8() - Reads 8 bits.
239 * @dev: the master device
240 *
241 * Return: the byte read
242 */
w1_read_8(struct w1_master * dev)243 u8 w1_read_8(struct w1_master *dev)
244 {
245 int i;
246 u8 res = 0;
247
248 if (dev->bus_master->read_byte)
249 res = dev->bus_master->read_byte(dev->bus_master->data);
250 else
251 for (i = 0; i < 8; ++i)
252 res |= (w1_touch_bit(dev,1) << i);
253
254 return res;
255 }
256 EXPORT_SYMBOL_GPL(w1_read_8);
257
258 /**
259 * w1_write_block() - Writes a series of bytes.
260 * @dev: the master device
261 * @buf: pointer to the data to write
262 * @len: the number of bytes to write
263 */
w1_write_block(struct w1_master * dev,const u8 * buf,int len)264 void w1_write_block(struct w1_master *dev, const u8 *buf, int len)
265 {
266 int i;
267
268 if (dev->bus_master->write_block) {
269 w1_pre_write(dev);
270 dev->bus_master->write_block(dev->bus_master->data, buf, len);
271 }
272 else
273 for (i = 0; i < len; ++i)
274 w1_write_8(dev, buf[i]); /* calls w1_pre_write */
275 w1_post_write(dev);
276 }
277 EXPORT_SYMBOL_GPL(w1_write_block);
278
279 /**
280 * w1_touch_block() - Touches a series of bytes.
281 * @dev: the master device
282 * @buf: pointer to the data to write
283 * @len: the number of bytes to write
284 */
w1_touch_block(struct w1_master * dev,u8 * buf,int len)285 void w1_touch_block(struct w1_master *dev, u8 *buf, int len)
286 {
287 int i, j;
288 u8 tmp;
289
290 for (i = 0; i < len; ++i) {
291 tmp = 0;
292 for (j = 0; j < 8; ++j) {
293 if (j == 7)
294 w1_pre_write(dev);
295 tmp |= w1_touch_bit(dev, (buf[i] >> j) & 0x1) << j;
296 }
297
298 buf[i] = tmp;
299 }
300 }
301 EXPORT_SYMBOL_GPL(w1_touch_block);
302
303 /**
304 * w1_read_block() - Reads a series of bytes.
305 * @dev: the master device
306 * @buf: pointer to the buffer to fill
307 * @len: the number of bytes to read
308 * Return: the number of bytes read
309 */
w1_read_block(struct w1_master * dev,u8 * buf,int len)310 u8 w1_read_block(struct w1_master *dev, u8 *buf, int len)
311 {
312 int i;
313 u8 ret;
314
315 if (dev->bus_master->read_block)
316 ret = dev->bus_master->read_block(dev->bus_master->data, buf, len);
317 else {
318 for (i = 0; i < len; ++i)
319 buf[i] = w1_read_8(dev);
320 ret = len;
321 }
322
323 return ret;
324 }
325 EXPORT_SYMBOL_GPL(w1_read_block);
326
327 /**
328 * w1_reset_bus() - Issues a reset bus sequence.
329 * @dev: the master device
330 * Return: 0=Device present, 1=No device present or error
331 */
w1_reset_bus(struct w1_master * dev)332 int w1_reset_bus(struct w1_master *dev)
333 {
334 int result;
335 unsigned long flags = 0;
336
337 if(w1_disable_irqs) local_irq_save(flags);
338
339 if (dev->bus_master->reset_bus)
340 result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1;
341 else {
342 dev->bus_master->write_bit(dev->bus_master->data, 0);
343 /* minimum 480, max ? us
344 * be nice and sleep, except 18b20 spec lists 960us maximum,
345 * so until we can sleep with microsecond accuracy, spin.
346 * Feel free to come up with some other way to give up the
347 * cpu for such a short amount of time AND get it back in
348 * the maximum amount of time.
349 */
350 w1_delay(500);
351 dev->bus_master->write_bit(dev->bus_master->data, 1);
352 w1_delay(70);
353
354 result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
355 /* minimum 70 (above) + 430 = 500 us
356 * There aren't any timing requirements between a reset and
357 * the following transactions. Sleeping is safe here.
358 */
359 /* w1_delay(430); min required time */
360 msleep(1);
361 }
362
363 if(w1_disable_irqs) local_irq_restore(flags);
364
365 return result;
366 }
367 EXPORT_SYMBOL_GPL(w1_reset_bus);
368
w1_calc_crc8(u8 * data,int len)369 u8 w1_calc_crc8(u8 * data, int len)
370 {
371 u8 crc = 0;
372
373 while (len--)
374 crc = w1_crc8_table[crc ^ *data++];
375
376 return crc;
377 }
378 EXPORT_SYMBOL_GPL(w1_calc_crc8);
379
w1_search_devices(struct w1_master * dev,u8 search_type,w1_slave_found_callback cb)380 void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb)
381 {
382 dev->attempts++;
383 if (dev->bus_master->search)
384 dev->bus_master->search(dev->bus_master->data, dev,
385 search_type, cb);
386 else
387 w1_search(dev, search_type, cb);
388 }
389
390 /**
391 * w1_reset_select_slave() - reset and select a slave
392 * @sl: the slave to select
393 *
394 * Resets the bus and then selects the slave by sending either a skip rom
395 * or a rom match. A skip rom is issued if there is only one device
396 * registered on the bus.
397 * The w1 master lock must be held.
398 *
399 * Return: 0=success, anything else=error
400 */
w1_reset_select_slave(struct w1_slave * sl)401 int w1_reset_select_slave(struct w1_slave *sl)
402 {
403 if (w1_reset_bus(sl->master))
404 return -1;
405
406 if (sl->master->slave_count == 1)
407 w1_write_8(sl->master, W1_SKIP_ROM);
408 else {
409 u8 match[9] = {W1_MATCH_ROM, };
410 u64 rn = le64_to_cpu(*((u64*)&sl->reg_num));
411
412 memcpy(&match[1], &rn, 8);
413 w1_write_block(sl->master, match, 9);
414 }
415 return 0;
416 }
417 EXPORT_SYMBOL_GPL(w1_reset_select_slave);
418
419 /**
420 * w1_reset_resume_command() - resume instead of another match ROM
421 * @dev: the master device
422 *
423 * When the workflow with a slave amongst many requires several
424 * successive commands a reset between each, this function is similar
425 * to doing a reset then a match ROM for the last matched ROM. The
426 * advantage being that the matched ROM step is skipped in favor of the
427 * resume command. The slave must support the command of course.
428 *
429 * If the bus has only one slave, traditionnaly the match ROM is skipped
430 * and a "SKIP ROM" is done for efficiency. On multi-slave busses, this
431 * doesn't work of course, but the resume command is the next best thing.
432 *
433 * The w1 master lock must be held.
434 */
w1_reset_resume_command(struct w1_master * dev)435 int w1_reset_resume_command(struct w1_master *dev)
436 {
437 if (w1_reset_bus(dev))
438 return -1;
439
440 /* This will make only the last matched slave perform a skip ROM. */
441 w1_write_8(dev, W1_RESUME_CMD);
442 return 0;
443 }
444 EXPORT_SYMBOL_GPL(w1_reset_resume_command);
445
446 /**
447 * w1_next_pullup() - register for a strong pullup
448 * @dev: the master device
449 * @delay: time in milliseconds
450 *
451 * Put out a strong pull-up of the specified duration after the next write
452 * operation. Not all hardware supports strong pullups. Hardware that
453 * doesn't support strong pullups will sleep for the given time after the
454 * write operation without a strong pullup. This is a one shot request for
455 * the next write, specifying zero will clear a previous request.
456 * The w1 master lock must be held.
457 *
458 * Return: 0=success, anything else=error
459 */
w1_next_pullup(struct w1_master * dev,int delay)460 void w1_next_pullup(struct w1_master *dev, int delay)
461 {
462 dev->pullup_duration = delay;
463 }
464 EXPORT_SYMBOL_GPL(w1_next_pullup);
465