1 /*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2010 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25 #ifndef __IO_H__
26 #define __IO_H__
27
28 #include <linux/irqreturn.h>
29
30 #define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0
31
32 #define HW_PARTITION_REGISTERS_ADDR 0x1FFC0
33 #define HW_PART0_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR)
34 #define HW_PART0_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 4)
35 #define HW_PART1_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 8)
36 #define HW_PART1_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 12)
37 #define HW_PART2_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 16)
38 #define HW_PART2_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 20)
39 #define HW_PART3_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 24)
40 #define HW_PART3_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 28)
41
42 #define HW_ACCESS_REGISTER_SIZE 4
43
44 #define HW_ACCESS_PRAM_MAX_RANGE 0x3c000
45
46 struct wl1271;
47
48 void wlcore_disable_interrupts(struct wl1271 *wl);
49 void wlcore_disable_interrupts_nosync(struct wl1271 *wl);
50 void wlcore_enable_interrupts(struct wl1271 *wl);
51 void wlcore_synchronize_interrupts(struct wl1271 *wl);
52
53 void wl1271_io_reset(struct wl1271 *wl);
54 void wl1271_io_init(struct wl1271 *wl);
55 int wlcore_translate_addr(struct wl1271 *wl, int addr);
56
57 /* Raw target IO, address is not translated */
wlcore_raw_write(struct wl1271 * wl,int addr,void * buf,size_t len,bool fixed)58 static inline int __must_check wlcore_raw_write(struct wl1271 *wl, int addr,
59 void *buf, size_t len,
60 bool fixed)
61 {
62 int ret;
63
64 if (test_bit(WL1271_FLAG_IO_FAILED, &wl->flags) ||
65 WARN_ON((test_bit(WL1271_FLAG_IN_ELP, &wl->flags) &&
66 addr != HW_ACCESS_ELP_CTRL_REG)))
67 return -EIO;
68
69 ret = wl->if_ops->write(wl->dev, addr, buf, len, fixed);
70 if (ret && wl->state != WLCORE_STATE_OFF)
71 set_bit(WL1271_FLAG_IO_FAILED, &wl->flags);
72
73 return ret;
74 }
75
wlcore_raw_read(struct wl1271 * wl,int addr,void * buf,size_t len,bool fixed)76 static inline int __must_check wlcore_raw_read(struct wl1271 *wl, int addr,
77 void *buf, size_t len,
78 bool fixed)
79 {
80 int ret;
81
82 if (test_bit(WL1271_FLAG_IO_FAILED, &wl->flags) ||
83 WARN_ON((test_bit(WL1271_FLAG_IN_ELP, &wl->flags) &&
84 addr != HW_ACCESS_ELP_CTRL_REG)))
85 return -EIO;
86
87 ret = wl->if_ops->read(wl->dev, addr, buf, len, fixed);
88 if (ret && wl->state != WLCORE_STATE_OFF)
89 set_bit(WL1271_FLAG_IO_FAILED, &wl->flags);
90
91 return ret;
92 }
93
wlcore_raw_read_data(struct wl1271 * wl,int reg,void * buf,size_t len,bool fixed)94 static inline int __must_check wlcore_raw_read_data(struct wl1271 *wl, int reg,
95 void *buf, size_t len,
96 bool fixed)
97 {
98 return wlcore_raw_read(wl, wl->rtable[reg], buf, len, fixed);
99 }
100
wlcore_raw_write_data(struct wl1271 * wl,int reg,void * buf,size_t len,bool fixed)101 static inline int __must_check wlcore_raw_write_data(struct wl1271 *wl, int reg,
102 void *buf, size_t len,
103 bool fixed)
104 {
105 return wlcore_raw_write(wl, wl->rtable[reg], buf, len, fixed);
106 }
107
wlcore_raw_read32(struct wl1271 * wl,int addr,u32 * val)108 static inline int __must_check wlcore_raw_read32(struct wl1271 *wl, int addr,
109 u32 *val)
110 {
111 int ret;
112
113 ret = wlcore_raw_read(wl, addr, wl->buffer_32,
114 sizeof(*wl->buffer_32), false);
115 if (ret < 0)
116 return ret;
117
118 if (val)
119 *val = le32_to_cpu(*wl->buffer_32);
120
121 return 0;
122 }
123
wlcore_raw_write32(struct wl1271 * wl,int addr,u32 val)124 static inline int __must_check wlcore_raw_write32(struct wl1271 *wl, int addr,
125 u32 val)
126 {
127 *wl->buffer_32 = cpu_to_le32(val);
128 return wlcore_raw_write(wl, addr, wl->buffer_32,
129 sizeof(*wl->buffer_32), false);
130 }
131
wlcore_read(struct wl1271 * wl,int addr,void * buf,size_t len,bool fixed)132 static inline int __must_check wlcore_read(struct wl1271 *wl, int addr,
133 void *buf, size_t len, bool fixed)
134 {
135 int physical;
136
137 physical = wlcore_translate_addr(wl, addr);
138
139 return wlcore_raw_read(wl, physical, buf, len, fixed);
140 }
141
wlcore_write(struct wl1271 * wl,int addr,void * buf,size_t len,bool fixed)142 static inline int __must_check wlcore_write(struct wl1271 *wl, int addr,
143 void *buf, size_t len, bool fixed)
144 {
145 int physical;
146
147 physical = wlcore_translate_addr(wl, addr);
148
149 return wlcore_raw_write(wl, physical, buf, len, fixed);
150 }
151
wlcore_write_data(struct wl1271 * wl,int reg,void * buf,size_t len,bool fixed)152 static inline int __must_check wlcore_write_data(struct wl1271 *wl, int reg,
153 void *buf, size_t len,
154 bool fixed)
155 {
156 return wlcore_write(wl, wl->rtable[reg], buf, len, fixed);
157 }
158
wlcore_read_data(struct wl1271 * wl,int reg,void * buf,size_t len,bool fixed)159 static inline int __must_check wlcore_read_data(struct wl1271 *wl, int reg,
160 void *buf, size_t len,
161 bool fixed)
162 {
163 return wlcore_read(wl, wl->rtable[reg], buf, len, fixed);
164 }
165
wlcore_read_hwaddr(struct wl1271 * wl,int hwaddr,void * buf,size_t len,bool fixed)166 static inline int __must_check wlcore_read_hwaddr(struct wl1271 *wl, int hwaddr,
167 void *buf, size_t len,
168 bool fixed)
169 {
170 int physical;
171 int addr;
172
173 /* Convert from FW internal address which is chip arch dependent */
174 addr = wl->ops->convert_hwaddr(wl, hwaddr);
175
176 physical = wlcore_translate_addr(wl, addr);
177
178 return wlcore_raw_read(wl, physical, buf, len, fixed);
179 }
180
wlcore_read32(struct wl1271 * wl,int addr,u32 * val)181 static inline int __must_check wlcore_read32(struct wl1271 *wl, int addr,
182 u32 *val)
183 {
184 return wlcore_raw_read32(wl, wlcore_translate_addr(wl, addr), val);
185 }
186
wlcore_write32(struct wl1271 * wl,int addr,u32 val)187 static inline int __must_check wlcore_write32(struct wl1271 *wl, int addr,
188 u32 val)
189 {
190 return wlcore_raw_write32(wl, wlcore_translate_addr(wl, addr), val);
191 }
192
wlcore_read_reg(struct wl1271 * wl,int reg,u32 * val)193 static inline int __must_check wlcore_read_reg(struct wl1271 *wl, int reg,
194 u32 *val)
195 {
196 return wlcore_raw_read32(wl,
197 wlcore_translate_addr(wl, wl->rtable[reg]),
198 val);
199 }
200
wlcore_write_reg(struct wl1271 * wl,int reg,u32 val)201 static inline int __must_check wlcore_write_reg(struct wl1271 *wl, int reg,
202 u32 val)
203 {
204 return wlcore_raw_write32(wl,
205 wlcore_translate_addr(wl, wl->rtable[reg]),
206 val);
207 }
208
wl1271_power_off(struct wl1271 * wl)209 static inline void wl1271_power_off(struct wl1271 *wl)
210 {
211 int ret = 0;
212
213 if (!test_bit(WL1271_FLAG_GPIO_POWER, &wl->flags))
214 return;
215
216 if (wl->if_ops->power)
217 ret = wl->if_ops->power(wl->dev, false);
218 if (!ret)
219 clear_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
220 }
221
wl1271_power_on(struct wl1271 * wl)222 static inline int wl1271_power_on(struct wl1271 *wl)
223 {
224 int ret = 0;
225
226 if (wl->if_ops->power)
227 ret = wl->if_ops->power(wl->dev, true);
228 if (ret == 0)
229 set_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
230
231 return ret;
232 }
233
234 int wlcore_set_partition(struct wl1271 *wl,
235 const struct wlcore_partition_set *p);
236
237 bool wl1271_set_block_size(struct wl1271 *wl);
238
239 /* Functions from wl1271_main.c */
240
241 int wl1271_tx_dummy_packet(struct wl1271 *wl);
242
243 #endif
244