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1 /*
2  * Based on arch/arm/include/asm/processor.h
3  *
4  * Copyright (C) 1995-1999 Russell King
5  * Copyright (C) 2012 ARM Ltd.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 #ifndef __ASM_PROCESSOR_H
20 #define __ASM_PROCESSOR_H
21 
22 #define TASK_SIZE_64		(UL(1) << VA_BITS)
23 
24 #define KERNEL_DS	UL(-1)
25 #define USER_DS		(TASK_SIZE_64 - 1)
26 
27 #ifndef __ASSEMBLY__
28 
29 /*
30  * Default implementation of macro that returns current
31  * instruction pointer ("program counter").
32  */
33 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
34 
35 #ifdef __KERNEL__
36 
37 #include <linux/string.h>
38 
39 #include <asm/alternative.h>
40 #include <asm/fpsimd.h>
41 #include <asm/hw_breakpoint.h>
42 #include <asm/lse.h>
43 #include <asm/pgtable-hwdef.h>
44 #include <asm/ptrace.h>
45 #include <asm/types.h>
46 
47 /*
48  * TASK_SIZE - the maximum size of a user space task.
49  * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
50  */
51 #ifdef CONFIG_COMPAT
52 #define TASK_SIZE_32		UL(0x100000000)
53 #define TASK_SIZE		(test_thread_flag(TIF_32BIT) ? \
54 				TASK_SIZE_32 : TASK_SIZE_64)
55 #define TASK_SIZE_OF(tsk)	(test_tsk_thread_flag(tsk, TIF_32BIT) ? \
56 				TASK_SIZE_32 : TASK_SIZE_64)
57 #else
58 #define TASK_SIZE		TASK_SIZE_64
59 #endif /* CONFIG_COMPAT */
60 
61 #define TASK_UNMAPPED_BASE	(PAGE_ALIGN(TASK_SIZE / 4))
62 
63 #define STACK_TOP_MAX		TASK_SIZE_64
64 #ifdef CONFIG_COMPAT
65 #define AARCH32_VECTORS_BASE	0xffff0000
66 #define STACK_TOP		(test_thread_flag(TIF_32BIT) ? \
67 				AARCH32_VECTORS_BASE : STACK_TOP_MAX)
68 #else
69 #define STACK_TOP		STACK_TOP_MAX
70 #endif /* CONFIG_COMPAT */
71 
72 extern phys_addr_t arm64_dma_phys_limit;
73 #define ARCH_LOW_ADDRESS_LIMIT	(arm64_dma_phys_limit - 1)
74 
75 struct debug_info {
76 	/* Have we suspended stepping by a debugger? */
77 	int			suspended_step;
78 	/* Allow breakpoints and watchpoints to be disabled for this thread. */
79 	int			bps_disabled;
80 	int			wps_disabled;
81 	/* Hardware breakpoints pinned to this task. */
82 	struct perf_event	*hbp_break[ARM_MAX_BRP];
83 	struct perf_event	*hbp_watch[ARM_MAX_WRP];
84 };
85 
86 struct cpu_context {
87 	unsigned long x19;
88 	unsigned long x20;
89 	unsigned long x21;
90 	unsigned long x22;
91 	unsigned long x23;
92 	unsigned long x24;
93 	unsigned long x25;
94 	unsigned long x26;
95 	unsigned long x27;
96 	unsigned long x28;
97 	unsigned long fp;
98 	unsigned long sp;
99 	unsigned long pc;
100 };
101 
102 struct thread_struct {
103 	struct cpu_context	cpu_context;	/* cpu context */
104 	unsigned long		tp_value;	/* TLS register */
105 #ifdef CONFIG_COMPAT
106 	unsigned long		tp2_value;
107 #endif
108 	struct fpsimd_state	fpsimd_state;
109 	unsigned long		fault_address;	/* fault info */
110 	unsigned long		fault_code;	/* ESR_EL1 value */
111 	struct debug_info	debug;		/* debugging */
112 };
113 
114 #ifdef CONFIG_COMPAT
115 #define task_user_tls(t)						\
116 ({									\
117 	unsigned long *__tls;						\
118 	if (is_compat_thread(task_thread_info(t)))			\
119 		__tls = &(t)->thread.tp2_value;				\
120 	else								\
121 		__tls = &(t)->thread.tp_value;				\
122 	__tls;								\
123  })
124 #else
125 #define task_user_tls(t)	(&(t)->thread.tp_value)
126 #endif
127 
128 #define INIT_THREAD  {	}
129 
start_thread_common(struct pt_regs * regs,unsigned long pc)130 static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
131 {
132 	memset(regs, 0, sizeof(*regs));
133 	regs->syscallno = ~0UL;
134 	regs->pc = pc;
135 }
136 
start_thread(struct pt_regs * regs,unsigned long pc,unsigned long sp)137 static inline void start_thread(struct pt_regs *regs, unsigned long pc,
138 				unsigned long sp)
139 {
140 	start_thread_common(regs, pc);
141 	regs->pstate = PSR_MODE_EL0t;
142 	regs->sp = sp;
143 }
144 
145 #ifdef CONFIG_COMPAT
compat_start_thread(struct pt_regs * regs,unsigned long pc,unsigned long sp)146 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
147 				       unsigned long sp)
148 {
149 	start_thread_common(regs, pc);
150 	regs->pstate = COMPAT_PSR_MODE_USR;
151 	if (pc & 1)
152 		regs->pstate |= COMPAT_PSR_T_BIT;
153 
154 #ifdef __AARCH64EB__
155 	regs->pstate |= COMPAT_PSR_E_BIT;
156 #endif
157 
158 	regs->compat_sp = sp;
159 }
160 #endif
161 
162 /* Forward declaration, a strange C thing */
163 struct task_struct;
164 
165 /* Free all resources held by a thread. */
166 extern void release_thread(struct task_struct *);
167 
168 unsigned long get_wchan(struct task_struct *p);
169 
cpu_relax(void)170 static inline void cpu_relax(void)
171 {
172 	asm volatile("yield" ::: "memory");
173 }
174 
175 #define cpu_relax_lowlatency()                cpu_relax()
176 
177 /* Thread switching */
178 extern struct task_struct *cpu_switch_to(struct task_struct *prev,
179 					 struct task_struct *next);
180 
181 #define task_pt_regs(p) \
182 	((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
183 
184 #define KSTK_EIP(tsk)	((unsigned long)task_pt_regs(tsk)->pc)
185 #define KSTK_ESP(tsk)	user_stack_pointer(task_pt_regs(tsk))
186 
187 /*
188  * Prefetching support
189  */
190 #define ARCH_HAS_PREFETCH
prefetch(const void * ptr)191 static inline void prefetch(const void *ptr)
192 {
193 	asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
194 }
195 
196 #define ARCH_HAS_PREFETCHW
prefetchw(const void * ptr)197 static inline void prefetchw(const void *ptr)
198 {
199 	asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
200 }
201 
202 #define ARCH_HAS_SPINLOCK_PREFETCH
spin_lock_prefetch(const void * ptr)203 static inline void spin_lock_prefetch(const void *ptr)
204 {
205 	asm volatile(ARM64_LSE_ATOMIC_INSN(
206 		     "prfm pstl1strm, %a0",
207 		     "nop") : : "p" (ptr));
208 }
209 
210 #define HAVE_ARCH_PICK_MMAP_LAYOUT
211 
212 #endif
213 
214 int cpu_enable_pan(void *__unused);
215 int cpu_enable_uao(void *__unused);
216 int cpu_enable_cache_maint_trap(void *__unused);
217 
218 #endif /* __ASSEMBLY__ */
219 #endif /* __ASM_PROCESSOR_H */
220