1 /* swift.h: Specific definitions for the _broken_ Swift SRMMU 2 * MMU module. 3 * 4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 5 */ 6 7 #ifndef _SPARC_SWIFT_H 8 #define _SPARC_SWIFT_H 9 10 /* Swift is so brain damaged, here is the mmu control register. */ 11 #define SWIFT_ST 0x00800000 /* SW tablewalk enable */ 12 #define SWIFT_WP 0x00400000 /* Watchpoint enable */ 13 14 /* Branch folding (buggy, disable on production systems!) */ 15 #define SWIFT_BF 0x00200000 16 #define SWIFT_PMC 0x00180000 /* Page mode control */ 17 #define SWIFT_PE 0x00040000 /* Parity enable */ 18 #define SWIFT_PC 0x00020000 /* Parity control */ 19 #define SWIFT_AP 0x00010000 /* Graphics page mode control (TCX/SX) */ 20 #define SWIFT_AC 0x00008000 /* Alternate Cacheability (see viking.h) */ 21 #define SWIFT_BM 0x00004000 /* Boot mode */ 22 #define SWIFT_RC 0x00003c00 /* DRAM refresh control */ 23 #define SWIFT_IE 0x00000200 /* Instruction cache enable */ 24 #define SWIFT_DE 0x00000100 /* Data cache enable */ 25 #define SWIFT_SA 0x00000080 /* Store Allocate */ 26 #define SWIFT_NF 0x00000002 /* No fault mode */ 27 #define SWIFT_EN 0x00000001 /* MMU enable */ 28 29 /* Bits [13:5] select one of 512 instruction cache tags */ swift_inv_insn_tag(unsigned long addr)30 static inline void swift_inv_insn_tag(unsigned long addr) 31 { 32 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" 33 : /* no outputs */ 34 : "r" (addr), "i" (ASI_M_TXTC_TAG) 35 : "memory"); 36 } 37 38 /* Bits [12:4] select one of 512 data cache tags */ swift_inv_data_tag(unsigned long addr)39 static inline void swift_inv_data_tag(unsigned long addr) 40 { 41 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" 42 : /* no outputs */ 43 : "r" (addr), "i" (ASI_M_DATAC_TAG) 44 : "memory"); 45 } 46 swift_flush_dcache(void)47 static inline void swift_flush_dcache(void) 48 { 49 unsigned long addr; 50 51 for (addr = 0; addr < 0x2000; addr += 0x10) 52 swift_inv_data_tag(addr); 53 } 54 swift_flush_icache(void)55 static inline void swift_flush_icache(void) 56 { 57 unsigned long addr; 58 59 for (addr = 0; addr < 0x4000; addr += 0x20) 60 swift_inv_insn_tag(addr); 61 } 62 swift_idflash_clear(void)63 static inline void swift_idflash_clear(void) 64 { 65 unsigned long addr; 66 67 for (addr = 0; addr < 0x2000; addr += 0x10) { 68 swift_inv_insn_tag(addr<<1); 69 swift_inv_data_tag(addr); 70 } 71 } 72 73 /* Swift is so broken, it isn't even safe to use the following. */ swift_flush_page(unsigned long page)74 static inline void swift_flush_page(unsigned long page) 75 { 76 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" 77 : /* no outputs */ 78 : "r" (page), "i" (ASI_M_FLUSH_PAGE) 79 : "memory"); 80 } 81 swift_flush_segment(unsigned long addr)82 static inline void swift_flush_segment(unsigned long addr) 83 { 84 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" 85 : /* no outputs */ 86 : "r" (addr), "i" (ASI_M_FLUSH_SEG) 87 : "memory"); 88 } 89 swift_flush_region(unsigned long addr)90 static inline void swift_flush_region(unsigned long addr) 91 { 92 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" 93 : /* no outputs */ 94 : "r" (addr), "i" (ASI_M_FLUSH_REGION) 95 : "memory"); 96 } 97 swift_flush_context(void)98 static inline void swift_flush_context(void) 99 { 100 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" 101 : /* no outputs */ 102 : "i" (ASI_M_FLUSH_CTX) 103 : "memory"); 104 } 105 106 #endif /* !(_SPARC_SWIFT_H) */ 107