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Searched refs:BUILD_CM_RW (Results 1 – 1 of 1) sorted by relevance

/arch/mips/include/asm/
Dmips-cm.h169 #define BUILD_CM_RW(name, off) \ macro
187 BUILD_CM_RW(base, MIPS_CM_GCB_OFS + 0x08)
188 BUILD_CM_RW(access, MIPS_CM_GCB_OFS + 0x20)
190 BUILD_CM_RW(err_control, MIPS_CM_GCB_OFS + 0x38)
191 BUILD_CM_RW(error_mask, MIPS_CM_GCB_OFS + 0x40)
192 BUILD_CM_RW(error_cause, MIPS_CM_GCB_OFS + 0x48)
193 BUILD_CM_RW(error_addr, MIPS_CM_GCB_OFS + 0x50)
194 BUILD_CM_RW(error_mult, MIPS_CM_GCB_OFS + 0x58)
195 BUILD_CM_RW(l2_only_sync_base, MIPS_CM_GCB_OFS + 0x70)
196 BUILD_CM_RW(gic_base, MIPS_CM_GCB_OFS + 0x80)
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