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Searched refs:DCR (Results 1 – 8 of 8) sorted by relevance

/arch/sh/include/cpu-sh5/cpu/
Dregisters.h40 #define DCR cr16
99 #define __DCR __str(DCR)
/arch/mn10300/include/asm/
Dframe.inc77 movhu (DCR),d1
79 movhu d1,(DCR)
Dcpu-regs.h122 #define DCR __SYSREG(0xc0000030, u16) /* Debug control register */ macro
/arch/powerpc/boot/dts/
Darches.dts130 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
131 0x030 0x008>; /* L2 cache DCR's */
Dtaishan.dts111 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
112 0x030 0x008>; /* L2 cache DCR's */
Dcanyonlands.dts119 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
120 0x030 0x008>; /* L2 cache DCR's */
Dglacier.dts112 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
113 0x030 0x008>; /* L2 cache DCR's */
/arch/sh/kernel/cpu/sh5/
Dentry.S455 putcon SP, DCR
500 getcon DCR, SP
513 putcon SP, DCR
540 getcon DCR, SP