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Searched refs:MSR_ARCH_PERFMON_FIXED_CTR0 (Results 1 – 3 of 3) sorted by relevance

/arch/x86/include/asm/
Dperf_event.h141 #define MSR_ARCH_PERFMON_FIXED_CTR0 0x309 macro
/arch/x86/events/
Dcore.c1014 hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + (hwc->idx - INTEL_PMC_IDX_FIXED); in x86_assign_hw_event()
1328 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, pmc_count); in perf_event_print_debug()
/arch/x86/events/intel/
Dcore.c2038 wrmsrl_safe(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull); in intel_pmu_reset()