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/arch/powerpc/boot/
DREADME4 objcopy -j .kernel:vmlinux -O binary zImage vmlinux.gz
5 objcopy -j .kernel:System.map -O binary zImage System.map.gz
6 objcopy -j .kernel:.config -O binary zImage config.gz
7 objcopy -j .kernel:initrd -O binary zImage.initrd initrd.gz
/arch/sh/lib64/
Dmemcpy.S46 #define LDUAQ(P,O,D0,D1) ldlo.q P,O,D0; ldhi.q P,O+7,D1 argument
47 #define STUAQ(P,O,D0,D1) stlo.q P,O,D0; sthi.q P,O+7,D1 argument
48 #define LDUAL(P,O,D0,D1) ldlo.l P,O,D0; ldhi.l P,O+3,D1 argument
49 #define STUAL(P,O,D0,D1) stlo.l P,O,D0; sthi.l P,O+3,D1 argument
Dcopy_user_memcpy.S61 #define LDUAQ(P,O,D0,D1) ldlo.q P,O,D0; ldhi.q P,O+7,D1 argument
62 #define STUAQ(P,O,D0,D1) stlo.q P,O,D0; sthi.q P,O+7,D1 argument
63 #define LDUAL(P,O,D0,D1) ldlo.l P,O,D0; ldhi.l P,O+3,D1 argument
64 #define STUAL(P,O,D0,D1) stlo.l P,O,D0; sthi.l P,O+3,D1 argument
/arch/m68k/hp300/
Dhp300map.map195 compose 'O' 'A' to '�'
225 compose '`' 'O' to '�'
227 compose '\'' 'O' to '�'
229 compose '^' 'O' to '�'
231 compose '~' 'O' to '�'
233 compose '"' 'O' to '�'
235 compose '/' 'O' to '�'
/arch/ia64/kernel/
Drelocate_kernel.S63 #define O(member) IA64_CPUINFO_##member##_OFFSET macro
66 addl r17=O(PTCE_STRIDE),r2
67 addl r2=O(PTCE_BASE),r2
69 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
79 #undef O
Dmca_asm.S60 #define O(member) IA64_CPUINFO_##member##_OFFSET macro
64 addl r17=O(PTCE_STRIDE),r2
65 addl r2=O(PTCE_BASE),r2
67 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
77 #undef O
/arch/mips/dec/
Dint-handler.S248 FEXPORT(asic_all_int) # various I/O ASIC junk
257 FEXPORT(asic_dma_int) # I/O ASIC DMA events
/arch/tile/gxio/
DKconfig7 # Support direct access to the common I/O DMA facility within the
/arch/mn10300/
DKconfig.debug69 would like kernel messages to be formatted into GDB $O packets so
96 bool "Debug GDB stub I/O"
100 low-level I/O.
/arch/powerpc/boot/dts/
Damigaone.dts49 ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O
73 /* First 4k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
/arch/nios2/
DKconfig184 bool "Set custom I/O region base address"
187 This option allows you to set the virtual address of the I/O region.
192 hex "Virtual base address of the I/O region" if NIOS2_IO_REGION_BASE_BOOL
/arch/frv/kernel/
Dhead-uc-fr451.S58 # set the I/O region protection registers for FR401/3/5
64 movgs gr5,dampr11 ; General I/O tile
Dhead-mmu-fr451.S234 # DAMPR11 0xE0000000-0xFFFFFFFF Uncached I/O
241 # set the I/O region protection registers for FR451 in MMU mode
248 movgs gr5,damlr11 ; General I/O tile
/arch/sparc/boot/
DMakefile53 quiet_cmd_uimage.o = UIMAGE.O $@
/arch/arm/boot/dts/
Dspear1310.dtsi99 ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */
117 ranges = <0x81000000 0 0 0x90020000 0 0x00010000 /* downstream I/O */
135 ranges = <0x81000000 0 0 0xc0020000 0 0x00010000 /* downstream I/O */
Dversatile-pb.dts53 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
Dbcm-nsp.dtsi388 /* Note: The HW does not support I/O resources. So,
424 /* Note: The HW does not support I/O resources. So,
460 /* Note: The HW does not support I/O resources. So,
Dexynos5440.dtsi295 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */
316 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */
/arch/frv/
DKconfig.debug45 would like kernel messages to be formatted into GDB $O packets so
/arch/arm64/boot/dts/marvell/
Darmada-cp110-slave.dtsi183 /* downstream I/O */
209 /* downstream I/O */
236 /* downstream I/O */
Darmada-cp110-master.dtsi183 /* downstream I/O */
209 /* downstream I/O */
236 /* downstream I/O */
/arch/mn10300/kernel/
Dmn10300-serial-low.S65 # E2 I/O port base
111 # E2 I/O port base
Dgdb-io-ttysm-low.S3 # MN10300 On-chip serial Rx interrupt handler for GDB stub I/O
Dgdb-io-serial-low.S3 # 16550 serial Rx interrupt handler for gdbstub I/O
/arch/alpha/
DKconfig142 slices (Data Switch, DSW) - 208-pin PQFP and 1 control (Control, I/O
182 Bcache SIMMs. I/O sub-system provides SuperI/O (2S, 1P, FD), KBD,
192 A Digital DS group board. Uses 21066 or 21066A. I/O sub-system is
216 used programmable logic to interface a 486 EISA I/O bridge to the
383 ISA bus generated by Intel SaturnI/O PCI-ISA bridge. On-board SCSI
385 SuperI/O (2S, 1P, FD), RTC/NVRAM. Boot ROM is EPROM. PC-AT size.

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